Power Control Strategies for Single-Phase Voltage-Controlled Inverters with an Enhanced PLL


Vol. 18, No. 1, pp. 212-224, Jan. 2018
10.6113/JPE.2018.18.1.212


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 Abstract

For maintaining a reliable and secure power system, this paper describes the design and implement of a single-phase grid-connected inverter with an enhanced phase-locked loop (PLL) and excellent power control performance. For designing the enhanced PLL and power regulator, a full-bridge voltage-controlled inverter (VCI) is investigated. When the grid frequency deviates from its reference values, the output frequency of the VCI is unstable with an oscillation of 2 doubling harmonics. The reason for this oscillation is analyzed mathematically. This oscillation leads to an injection of harmonics into the grid and even causes an output active power oscillation of the VCI. For eliminating the oscillation caused by a PLL, an oscillation compensation method is proposed. With the proposed method, the VCI maintains the original PLL control characteristics and improves the PLL robustness under grid frequency deviations. On the basis of the above analysis, a power regulator with the primary frequency and voltage modulation characteristics is analyzed and designed. Meanwhile, a small-signal model of the power loops is established to determine the control parameters. The VCI can accurately output target power and has primary frequency and voltage modulation characteristics that can provide active and reactive power compensation to the grid. Finally, simulation and experimental results are given to verify the idea.


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Cite this article

[IEEE Style]

J. Gao, J. Zhao, C. He, S. Zhang, F. Li, "Power Control Strategies for Single-Phase Voltage-Controlled Inverters with an Enhanced PLL," Journal of Power Electronics, vol. 18, no. 1, pp. 212-224, 2018. DOI: 10.6113/JPE.2018.18.1.212.

[ACM Style]

Jiayuan Gao, Jinbin Zhao, Chaojie He, Shuaitao Zhang, and Fen Li. 2018. Power Control Strategies for Single-Phase Voltage-Controlled Inverters with an Enhanced PLL. Journal of Power Electronics, 18, 1, (2018), 212-224. DOI: 10.6113/JPE.2018.18.1.212.