Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination
Vol. 15, No. 4, pp. 1085-1092, Jul. 2015
10.6113/JPE.2015.15.4.1085
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Delay signal cancellation Enhanced phase-locked loop Input DC offset and harmonics Sliding Goertzel transform
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Cite this article
[IEEE Style]
L. Luo, H. Tian, F. Wu, "Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination," Journal of Power Electronics, vol. 15, no. 4, pp. 1085-1092, 2015. DOI: 10.6113/JPE.2015.15.4.1085.
[ACM Style]
Linsong Luo, Huixin Tian, and Fengjiang Wu. 2015. Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination. Journal of Power Electronics, 15, 4, (2015), 1085-1092. DOI: 10.6113/JPE.2015.15.4.1085.