Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages
Vol. 16, No. 2, pp. 447-454, Mar. 2016
10.6113/JPE.2016.16.2.447
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Output capacitor voltage balancing Switching loss Three-level single-ended primary-inductor converter (SEPIC) Voltage stress
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Cite this article
[IEEE Style]
W. Choi and S. Lee, "Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages," Journal of Power Electronics, vol. 16, no. 2, pp. 447-454, 2016. DOI: 10.6113/JPE.2016.16.2.447.
[ACM Style]
Woo-Young Choi and Seung-Jae Lee. 2016. Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages. Journal of Power Electronics, 16, 2, (2016), 447-454. DOI: 10.6113/JPE.2016.16.2.447.