Step-One in Pre-regulator Boost Power Factor-Correction Converter Design


Vol. 4, No. 1, pp. 18-27, Jan. 2004
10.6113/JPE.2004.4.1.18


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 Abstract

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-1 in deign, then apply for any other specification like hold-up time or ripple percentage.


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Cite this article

[IEEE Style]

M. Orabi and T. Ninomiya, "Step-One in Pre-regulator Boost Power Factor-Correction Converter Design," Journal of Power Electronics, vol. 4, no. 1, pp. 18-27, 2004. DOI: 10.6113/JPE.2004.4.1.18.

[ACM Style]

Mohamed Orabi and Tamotsu Ninomiya. 2004. Step-One in Pre-regulator Boost Power Factor-Correction Converter Design. Journal of Power Electronics, 4, 1, (2004), 18-27. DOI: 10.6113/JPE.2004.4.1.18.