A Gate Drive Circuit for Low Switching Losses and Snubber Energy Recovery

Toshihisa Shimizu; Keiji Wada

A Gate Drive Circuit for Low Switching Losses and Snubber Energy Recovery

Toshihisa Shimizu

Keiji Wada

Vol. 9, No. 2, pp. 259-266, Mar. 2009

10.6113/JPE.2009.9.2.259

Gate drive circuit

Switching loss

High-frequency switching

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Abstract

In order to increase the power density of power converters, reduction of the switching losses at high-frequency switching conditions is one of the most important issues. This paper presents a new gate drive circuit that enables the reduction of switching losses in both the Power MOSFET and the IGBT. A distinctive feature of this method is that both the turn-on loss and the turn-off loss are decreased simultaneously without using a conventional ZVS circuit, such as the quasi-resonant adjunctive circuit. Experimental results of the switching loss of both the Power MOSFET and the IGBT are shown. In addition, an energy recovery circuit suitable for use in IGBTs that can be realized by modifying the proposed gate drive circuit is also proposed. The effectiveness of both the proposed circuits was confirmed experimentally by the buck-chopper circuit.

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Cite this article

[IEEE Style]

T. Shimizu and K. Wada, "A Gate Drive Circuit for Low Switching Losses and Snubber Energy Recovery," Journal of Power Electronics, vol. 9, no. 2, pp. 259-266, 2009. DOI: 10.6113/JPE.2009.9.2.259.

[ACM Style]

Toshihisa Shimizu and Keiji Wada. 2009. A Gate Drive Circuit for Low Switching Losses and Snubber Energy Recovery. Journal of Power Electronics, 9, 2, (2009), 259-266. DOI: 10.6113/JPE.2009.9.2.259.