Low-Cost High-Efficiency PDP Sustaining Driver with a Resonance Bias Level Shift

Kyung-Hwa Park; Kang-Hyun Yi

Low-Cost High-Efficiency PDP Sustaining Driver with a Resonance Bias Level Shift

Kyung-Hwa Park

Kang-Hyun Yi

Vol. 13, No. 5, pp. 779-786, Sep. 2013

10.6113/JPE.2013.13.5.779

energy recovery circuit

Plasma display panel (PDP)

Sustaining driver

PDF

Abstract

A highly efficient sustaining driver is proposed for plasma display panels (PDPs). When the PDP is charged and discharged, the proposed sustaining driver employs an address voltage source used in an addressing period. A voltage source is used for fully charging the panel to the sustaining voltage, and an initial inductor current helps the panel discharge to 0 V. The resonance between the panel and an inductor is made by shifting the voltage and current bias level when charging and discharging the panel. As a result, the proposed circuit can reduce power consumption, switching loss, heat dissipation, and production cost. Experimental results of a 42-inch PDP are provided to verify the operation and features of the proposed circuit.

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Cite this article

[IEEE Style]

K. Park and K. Yi, "Low-Cost High-Efficiency PDP Sustaining Driver with a Resonance Bias Level Shift," Journal of Power Electronics, vol. 13, no. 5, pp. 779-786, 2013. DOI: 10.6113/JPE.2013.13.5.779.

[ACM Style]

Kyung-Hwa Park and Kang-Hyun Yi. 2013. Low-Cost High-Efficiency PDP Sustaining Driver with a Resonance Bias Level Shift. Journal of Power Electronics, 13, 5, (2013), 779-786. DOI: 10.6113/JPE.2013.13.5.779.