Gate driver for parallel connection SiC MOSFETs with over‑current protection and dynamic current balancing scheme


Vol. 20, No. 1, pp. 319-328, Jan. 2020
10.1007/s43236-019-00026-1




 Abstract

In this paper, a SiC MOSFETs gate driver for parallel connections is proposed and implemented. The proposed design enhances the reliability of parallel-connected SiC MOSFETs in high-frequency applications. High-speed over-current protections are applied for both over-voltage and under-voltage situations. In addition, a dynamic balancing current sharing scheme for SiC MOSFETs is proposed for high-speed parallel applications by current feedback and switching delay time compensation. With the proposed design, parallel-connected SiC MOSFETs can work at an operation frequency of 1 MHz with over-current protections. In addition, with the dynamic current balancing scheme, the operation temperature decreases from 115 to 86.9 °C, while the temperature difference for paralleled devices drops from 25.8 to 1.8 °C.


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Cite this article

[IEEE Style]

Y. Zhang, Q. Song, X. Tang, Y. Zhang, "Gate driver for parallel connection SiC MOSFETs with over‑current protection and dynamic current balancing scheme," Journal of Power Electronics, vol. 20, no. 1, pp. 319-328, 2020. DOI: 10.1007/s43236-019-00026-1.

[ACM Style]

Yimeng Zhang, Qingwen Song, Xiaoyan Tang, and Yuming Zhang. 2020. Gate driver for parallel connection SiC MOSFETs with over‑current protection and dynamic current balancing scheme. Journal of Power Electronics, 20, 1, (2020), 319-328. DOI: 10.1007/s43236-019-00026-1.