SVPWM technique for common-mode voltage elimination of dual-winding fault-tolerant permanent magnet motor drives


Vol. 20, No. 3, pp. 710-719, May  2020
10.1007/s43236-020-00062-2




 Abstract

A new space vector pulse-width modulation (SVPWM) technique to eliminate common-mode voltage (CMV) is proposed for a dual three-phase inverter fed-dual-winding fault-tolerant permanent magnet motor (FTPMM) drive. In general, since both the PWM module-1 of an inverter-1 drive and the PWM module-2 of an inverter-2 drive adopt the conventional SVPWM (CSVPWM) technique, two identical CMVs are generated in the drives. Each of the CMCs generated by the CMVs flows through the stray capacitances between the stator windings and the motor frame. These currents flow into the ground of the drive, where they are combined. Hence, in the proposed technique, each of the PWM modules adopts the remote-state PWM (RSPWM)2A and RSPWM2B. As a result, two CMVs with same absolute values and opposite polarities are generated at every switching period, and the corresponding generalized total CMV of the dual-winding FTPMM drive always becomes zero. Analytical and experimental results are provided to verify the validity of the proposed technique.


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Cite this article

[IEEE Style]

J. Baik, S. Yun, D. Kim, C. Kwon, J. Yoo, "SVPWM technique for common-mode voltage elimination of dual-winding fault-tolerant permanent magnet motor drives," Journal of Power Electronics, vol. 20, no. 3, pp. 710-719, 2020. DOI: 10.1007/s43236-020-00062-2.

[ACM Style]

Jae-Hyuk Baik, Sang-Won Yun, Dong-Sik Kim, Chun-Ki Kwon, and Ji-Yoon Yoo. 2020. SVPWM technique for common-mode voltage elimination of dual-winding fault-tolerant permanent magnet motor drives. Journal of Power Electronics, 20, 3, (2020), 710-719. DOI: 10.1007/s43236-020-00062-2.