Performance improvement of cascaded H‑bridge multilevel inverters with modified modulation scheme

Eui-Jae Lee; Kyo-Beum Lee

Performance improvement of cascaded H‑bridge multilevel inverters with modified modulation scheme

Eui-Jae Lee

Kyo-Beum Lee

Vol. 21, No. 3, pp. 541-552, Mar. 2021

10.1007/s43236-020-00200-w

Cascaded H-bridge multilevel inverter

Phase-shifted PWM

Discontinuous PWM

Switching loss reduction

Total harmonic distortion improvement

Abstract

This study proposes a modified modulation scheme based on the phase-shifted pulse-width modulation (PS-PWM) method to improve the output performance and reduce the switching loss in cascaded H-bridge multilevel inverters. The PS-PWM method is one of the most popular modulation schemes. However, it generates significant switching loss, which can lead to the failure of power semiconductor switches. Various studies have proposed modulation schemes to reduce switching loss. The clamped discontinuous PWM (DPWM) method achieves the best switching loss reduction performance in comparison with other modulation schemes. However, the clamped DPWM method has low output characteristics, such as total harmonic distortion. The proposed modulation scheme achieves the same switching loss reduction and improved output performance by modifying the dwell time order. The proposed evenly clamped DPWM method was compared with the conventional clamped DPWM method through simulations and experiments.

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Cite this article

[IEEE Style]

E. Lee and K. Lee, "Performance improvement of cascaded H‑bridge multilevel inverters with modified modulation scheme," Journal of Power Electronics, vol. 21, no. 3, pp. 541-552, 2021. DOI: 10.1007/s43236-020-00200-w.

[ACM Style]

Eui-Jae Lee and Kyo-Beum Lee. 2021. Performance improvement of cascaded H‑bridge multilevel inverters with modified modulation scheme. Journal of Power Electronics, 21, 3, (2021), 541-552. DOI: 10.1007/s43236-020-00200-w.