Novel submodule voltage balancing topology for hybrid modular multilevel converters

Yiqi Liu; Yanchao Liu; Yonglin Jin; Jianlong Chen

Novel submodule voltage balancing topology for hybrid modular multilevel converters

Vol. 21, No. 10, pp. 1416-1426, Oct. 2021

10.1007/s43236-021-00285-x

Diode-clamped circuit

Modular multilevel converter

Topology

Voltage balancing

Abstract

A hybrid modular multilevel converter (HMMC) topology based on a bidirectional diode clamp circuit is proposed in this paper. The proposed topology ensures that the voltages at the ends of the capacitance between the two leads of each submodule in the same phase are clamped to be equal to each other through the diode clamp circuit. The balancing process through the diode clamp circuit is bidirectional, which is only achieved by the diode clamp circuit. This topology has two advantages when compared with the traditional voltage balance control method. First, the framework used for controlling the entire structure is simplified while the link controlling the voltage balance is eliminated. Second, the control schemes used for the voltage balance are simplified, and the number of the corresponding high-frequency voltage sensors is reduced. Hence, the complexity of the system control is decreased, and communication is realized more easily. When compared with other voltage balancing circuits, the proposed circuit achieves bidirectional equalization and reduces the usage of the inductors. Then, the hardware cost is reduced. Finally, the feasibility of the proposed converter is verified by simulation results given in MATLAB/Simulink.

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Cite this article

[IEEE Style]

Y. Liu, Y. Liu, Y. Jin, J. Chen, "Novel submodule voltage balancing topology for hybrid modular multilevel converters," Journal of Power Electronics, vol. 21, no. 10, pp. 1416-1426, 2021. DOI: 10.1007/s43236-021-00285-x.

[ACM Style]

Yiqi Liu, Yanchao Liu, Yonglin Jin, and Jianlong Chen. 2021. Novel submodule voltage balancing topology for hybrid modular multilevel converters. Journal of Power Electronics, 21, 10, (2021), 1416-1426. DOI: 10.1007/s43236-021-00285-x.