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Search: "[ keyword: FPGA ]" (20)
FPGA‑based real‑time simulation of LCC‑HVDC systems with C‑NAM method
Ruolan Li  Danyong Li  Yang Gao  Chen Gu  Xiaoyi Sun 
Li Fan
Vol. 23, No. 6, pp. 913-922, Jun. 2023
10.1007/s43236-022-00586-9
Passivity‑based controller for a high‑energy‑quality active rectifier–DC motor system: an FPGA implementation
Ruben Heredia-Barba  Jose Antonio Juarez-Abad  Jesus Linares-Flores  Marco Antonio Contreras-Ordaz  Jorge Luis Barahona-Avalos

Vol. 23, No. 4, pp. 666-676, Apr. 2023
10.1007/s43236-022-00563-2
Hardware implementation for hybrid active NPC converters using FPGA‑based dual pulse width modulation
Laith M. Halabi  Ibrahim Mohd Alsofyani  Kyo-Beum Lee
Vol. 21, No. 11, pp. 1669-1679, Nov. 2021
10.1007/s43236-021-00305-w
Critical analysis of random frequency inverted sine carrier PWMfortification for half‑controlled bipolar three‑phase inverters
P. Muthukumar  L. Padmasuresh  K. Eswaramoorthy  S. Jeevananthan
Vol. 20, No. 2, pp. 479-491, Mar. 2020
10.1007/s43236-020-00034-6
Comparison of Capacitor Voltage Balancing Methods for 1GW MMC-HVDC Based on Real-Time Digital Simulator and Physical Control Systems
Jun-Min Lee  Jung-Woo Park  Dae-Wook Kang  Jong-Pil Lee  Dong-Wook Yoo 
Jang-Myung Lee
Vol. 19, No. 5, pp. 1171-1181, Sep. 2019
https://doi.org/10.6113/JPE.2019.19.5.1171
Investigations of Multi-Carrier Pulse Width Modulation Schemes for Diode Free Neutral Point Clamped Multilevel Inverters
Bharatiraja Chokkalingam  Mahajan Sagar Bhaskar  Sanjeevikumar Padmanaban  Vigna K. Ramachandaramurthy  Atif Iqbal

Vol. 19, No. 3, pp. 702-713, May  2019
10.6113/JPE.2019.19.3.702
Real-Time HIL Simulation of the Discontinuous Conduction Mode in Voltage Source PWM Power Converters
Andras Futo  Tamas Kokenyesi  Istvan Varjasi  Zoltan Suto  Istvan Vajk 
Attila Balogh  Gergely Gyorgy Balazs
Vol. 17, No. 6, pp. 1535-1544, Nov. 2017
10.6113/JPE.2019.17.6.1535
Quick Diagnosis of Short Circuit Faults in Cascaded H-Bridge Multilevel Inverters using FPGA
Saeed Ouni  Mohammad Reza Zolghadri  Jose Rodriguez  Mahmoud Shahbazi  Hashem Oraee 
Pablo Lezana  Andres Ulloa Schmeisser
Vol. 17, No. 1, pp. 56-66, Jan. 2017
10.6113/JPE.2019.17.1.56
Natural Balancing of the Neutral Point Potential of a Three-Level Inverter with Improved Firefly Algorithm
M. Gnanasundari  M. Rajaram  Sujatha Balaraman
Vol. 16, No. 4, pp. 1306-1315, Jul. 2016
10.6113/JPE.2016.16.4.1306
An FPGA-Based Modified Adaptive PID Controller for DC/DC Buck Converters
Ling Lv  Changyuan Chang  Zhiqi Zhou  Yubo Yuan
Vol. 15, No. 2, pp. 346-355, Mar. 2015
10.6113/JPE.2015.15.2.346

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  ISSN : 1598 - 2092
eISSN : 2093 - 4718