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Search: "[ keyword: Parasitic capacitance ]" (6)
Analyzing and mitigating parasitic capacitances in planar transformers for high‑frequency operation
Sujeong Lee Seokwon Kim Jongwon Shin Wonhee Kim
Vol. 24, No. 6, pp. 946-954, Jun. 2024
10.1007/s43236-024-00804-6
Vol. 24, No. 6, pp. 946-954, Jun. 2024
10.1007/s43236-024-00804-6
Fundamental impedance‑based digital synchronous rectification scheme for bidirectional CLLC resonant converters
Guopeng Zhang Xindi Sun Hao Wang Yonghui Liu Haijun Tao
Lulu Huang
Vol. 24, No. 1, pp. 9-19, Jan. 2024
10.1007/s43236-023-00697-x
Lulu Huang
Vol. 24, No. 1, pp. 9-19, Jan. 2024
10.1007/s43236-023-00697-x
Estimation of switching losses considering non‑linear parasitic capacitances of GaN E‑HEMT
Inwon Lee Dongkwan Yoon Younghoon Cho
Vol. 23, No. 8, pp. 1243-1251, Aug. 2023
10.1007/s43236-023-00653-9
Vol. 23, No. 8, pp. 1243-1251, Aug. 2023
10.1007/s43236-023-00653-9
Design of high efficiency phase‑shift full‑bridge converter with minimized power loss on primary‑side clamp diodes
Young-Eun Kwon Young-Woo Ju Da-un Kim Chong-Eun Kim
Vol. 23, No. 1, pp. 79-88, Jan. 2023
10.1007/s43236-022-00554-3
Vol. 23, No. 1, pp. 79-88, Jan. 2023
10.1007/s43236-022-00554-3
Single pulse width modulation for dual‑active‑bridge converters considering parasitic capacitance of MOSFETs
Seung Ho Lee Byung Ki Kim Sungmin Kim
Vol. 23, No. 1, pp. 68-78, Jan. 2023
10.1007/s43236-022-00544-5
Vol. 23, No. 1, pp. 68-78, Jan. 2023
10.1007/s43236-022-00544-5
Influence of Parasitic Parameters on Switching Characteristics and Layout Design Considerations of SiC MOSFETs
Haihong Qin Ceyu Ma Ziyue Zhu Yangguang Yan
Vol. 18, No. 4, pp. 1255-1267, Jul. 2018
10.6113/JPE.2018.18.4.1255
Vol. 18, No. 4, pp. 1255-1267, Jul. 2018
10.6113/JPE.2018.18.4.1255
ISSN : 1598 - 2092
eISSN : 2093 - 4718