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Search: "[ keyword: Phase-locked loop ]" (13)
Simple current control without grid voltage sensor for traction solid‑state transformer
Chun-Gi Yun  Seunghoon Baek  Hanyoung Bu  Younghoon Cho  Jin-Hyuk Park 
Myung-Yong Kim
Vol. 21, No. 4, pp. 703-712, Apr. 2021
10.1007/s43236-020-00214-4
An accurate and robust adaptive notch filter‑based phase‑locked loop
Jinbo Li  Qin Wang  Lan Xiao  Zehao Liu  Qunfang Wu

Vol. 20, No. 6, pp. 1514-1525, Nov. 2020
10.1007/s43236-020-00127-2
Improved virtual quadrature‑coordinate EPLL considering input harmonics and DC offset
Dong Yin  Guizhong Wang  Fengjiang Wu  Zhizhong Guo
Vol. 20, No. 1, pp. 212-220, Jan. 2020
10.1007/s43236-019-00020-7
Power Control Strategies for Single-Phase Voltage-Controlled Inverters with an Enhanced PLL
Jiayuan Gao  Jinbin Zhao  Chaojie He  Shuaitao Zhang  Fen Li

Vol. 18, No. 1, pp. 212-224, Jan. 2018
10.6113/JPE.2018.18.1.212
Design of a High-performance High-pass Generalized Integrator Based Single-phase PLL
Abhijit Kulkarni  Vinod John
Vol. 17, No. 5, pp. 1231-1243, Sep. 2017
10.6113/JPE.2019.17.5.1231
Performance Analysis of Three-Phase Phase-Locked Loops for Distorted and Unbalanced Grids
Kai Li  An Bo  Hong Zheng  Ningbo Sun
Vol. 17, No. 1, pp. 262-271, Jan. 2017
10.6113/JPE.2019.17.1.262
Performance Evaluations of Four MAF-Based PLL Algorithms for Grid-Synchronization of Three-Phase Grid-Connected PWM Inverters and DGs
Yang Han  Mingyu Luo  Changqing Chen  Aiting Jiang  Xin Zhao 
Josep M. Guerrero
Vol. 16, No. 5, pp. 1904-1917, Sep. 2016
10.6113/JPE.2016.16.5.1904
Effects of Input Harmonics, DC Offset and Step Changes of the Fundamental Component on Single-Phase EPLL and Elimination
Linsong Luo  Huixin Tian  Fengjiang Wu
Vol. 15, No. 4, pp. 1085-1092, Jul. 2015
10.6113/JPE.2015.15.5.1085
A Novel Single Phase Synchronous Reference Frame Phase-Locked Loop with a Constant Zero Orthogonal Component
Ming Li  Yue Wang  Xiong Fang  Yuan Gao  Zhaoan Wang

Vol. 14, No. 6, pp. 1334-1344, Nov. 2014
10.6113/JPE.2014.14.6.1334
Adaptive Neural PLL for Grid-connected DFIG Synchronization
Ali Bechouche  Djaffar Ould Abdeslam  Tahar Otmane-Cherif  Hamid Seddiki
Vol. 14, No. 3, pp. 608-620, May  2014
10.6113/JPE.2014.14.3.608

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  ISSN : 1598 - 2092
eISSN : 2093 - 4718