사각형입니다.

https://doi.org/10.6113/JPE.2018.18.1.289

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



An Electric-Field Coupled Power Transfer System with a Double-sided LC Network


Shi-Yun Xie*, Yu-Gang Su†,*, Wei Zhou*, Yu-Ming Zhao*, and Xin Dai*


State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing, China

*College of Automation, Chongqing University, Chongqing, China



Abstract

Electric-field coupled power transfer (ECPT) systems employ a high frequency electric field as an energy medium to transfer power wirelessly. Existing ECPT systems have made great progress in terms of increasing the transfer distance. However, the topologies of these systems are complex, and the transfer characteristics are very sensitive to variations in the circuit parameters. This paper proposes an ECPT system with a double-sided LC network, which employs a parallel LC network on the primary side and a series LC network on the secondary side. With the same transfer distance and output power, the proposed system is simpler and less sensitive than existing systems. The expression of the optimal driving voltage for the coupling structure and the characteristics of the LC networks are also analyzed, including the transfer efficiency, parameter sensitivity and total harmonic distortion. Then, a design method for the system parameters is provided according to these characteristics. Simulations and experiments have been carried out to verify the system properties and the design method.


Key words: Double-sided LC network, Electric-field coupled, Topologies, Wireless power transfer


Manuscript received Mar. 28, 2017; accepted Jul. 31, 2017

Recommended for publication by Associate Editor M. Vilathgamuwa.

Corresponding Author: su7558@qq.com

Tel: +86-23-65112750, Fax: +86-23-65111221, Chongqing University

*College of Automation, Chongqing University, China



Ⅰ. INTRODUCTION

Wireless power transfer technologies can employ various energy mediums to provide power, such as magnetic fields, electric fields, microwaves, and sound waves. It has received a lot of attention, and a great many accomplishments have been achieved in the fields of electric vehicles, home-appliance, medical machines, smart homes, etc. [1]-[4]. Electric-field coupled power transfer (ECPT) systems use metal plates as a coupling structure and a high frequency electric field as an energy medium. Their advantages include light weight, no eddy loss in the surrounding metals, high compatibility, with good prospects in terms of application to EVs [1]-[3], LED [4]-[6], and portable products [7]. There have been many achievements in the researches of inverter design [8], compensation [9]-[12], output regulation [13], resonant circuits [14], parallel transfer of power and signals [15], as well as increasing transfer distance [16].

Because air permittivity is five orders of magnitude smaller than air permeability, the transfer distance of IPT (Inductive Power Transfer) systems is usually greater than that of ECPT systems with the same output power, when the coupling coils in the IPT systems have as large a coupling area as the coupling plates of the ECPT systems [1], [5], [8], [10]. To achieve a large enough equivalent coupling capacitance, the transfer distance of traditional ECPT systems has to be restricted to an mm level. In some applications where a larger transfer distance is desired, the equivalent capacitances are in the order of 10s pF [1], [10]. As a result, the compensation inductor for the coupling capacitance is very large. In order to eliminate this problem, the authors of [1] proposed an ECPT system with a double-sided LCLC network, which can transfer high power for EVs without compensation inductors. To further facilitate the system topology, the authors of [16] proposed an ECPT system utilizing a double-sided LCL network. Nonetheless, the orders of these systems are still more than 6. Thus, there is a possibility for the simplification of the system structures. Meanwhile, it has been found that existing systems can operate well in simulation with high efficiency. However, it is difficult to ensure their stable operations due to their high sensitivity to parameter variations. In addition, the driving voltages for the coupling structures in these systems are very high Therefore, a certain material with high insulated voltage is necessary.

An ECPT system with a double-sided LC network is proposed in this paper, which employs a parallel LC network on the primary side and a series LC network on the secondary side. Its topology is simpler and less sensitive than existing higher-order systems. The minimal driving voltage for the coupling structure is derived. Moreover, the characteristics of the LC networks including the voltage gain, impedance gain as well as the parameter sensitivity are analyzed. On this basis, a design method for the system parameters is provided. Finally, the system properties and design method are verified by simulation and experiential results.



Ⅱ. PROPOSED SYSTEM TOPOLOGY

An ECPT system with a double-sided LC network is shown in Fig. 1. Cs1 and Cs2 denote the equivalent capacitances formed by the coupling between the primary plates and the secondary plates [5]. L1 and C1, and L2 and C2 make up the parallel LC network and the series LC network, respectively. The difference between the parallel and series LC networks lies in the connection between networks’ load and one of the resonant components in the network. As shown as Fig. 1, the equivalent load of the parallel LC network is connected in parallel with the resonant capacitor C1. Meanwhile, the load of the series LC network is connected in series with the resonant inductor L2. The primary part consists of a DC power supply, a high frequency inverter and a parallel LC network, while the secondary part includes a series LC network, a rectifier and a load. A high frequency AC voltage is generated by the inverter and boosted to a higher voltage via the parallel LC network to drive the coupling structure. Through the series LC network and rectifier, the pickup voltage of the secondary part is converted into a DC voltage for the load. The parallel LC network is developed to boost voltage and compensate the coupling structure, while the series LC network serves as an impedance converter to transfer the required power with the lowest driving voltage of the coupling structure.

The equivalent circuit in Fig. 1 driven by the fundamental frequency is shown in Fig. 2, where Cs=Cs1Cs2/(Cs1+Cs2), Uin1 denotes the fundamental component of the inverter output voltage, and Re indicates the equivalent AC resistance of the load assuming that the diode rectifier is in full conduction. Re is equal 그림입니다.
원본 그림의 이름: CLP00000bd8003e.bmp
원본 그림의 크기: 가로 211pixel, 세로 77pixel[17]. The inverter operates at a constant frequency.


그림입니다.
원본 그림의 이름: CLP00000bd8003c.bmp
원본 그림의 크기: 가로 1400pixel, 세로 483pixel

Fig. 1. Block diagram of an ECPT system with a double-sided LC network.


그림입니다.
원본 그림의 이름: CLP00000bd8003d.bmp
원본 그림의 크기: 가로 1310pixel, 세로 494pixel

Fig. 2. Equivalent circuit of an ECPT system with a double-sided LC network.



Ⅲ. CHARACTERISTICS OF THE COUPLING STRUCTURE

The coupling structure and the secondary part are equivalent to the circuit shown in Fig. 3(a), where Ud signifies the driving voltage for the coupling structure, and R2 indicates the input resistance of the secondary part. RCs denotes the equivalent resistance of the dielectric loss in the coupling structure [11], which can be calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd8003f.bmp
원본 그림의 크기: 가로 255pixel, 세로 144pixel                                                                                    (1)

where γ is the dielectric loss tangent. Generally, the resonant capacitances C1 and C2 are several orders of magnitude larger than the equivalent coupling capacitance Cs. Moreover, these capacitors are all of the silvered-mica type. Thus, the dielectric losses in C1 and C2 are far less than those of Cs. The dielectric losses of the resonant capacitors are also neglected in previous studies such as references [10]-[12].

Fig. 3(a) can be equivalently transformed into the parallel circuit illustrated in Fig. 3(b), aiming to facilitate the subsequent analysis. The relationship between them is:

그림입니다.
원본 그림의 이름: CLP00000bd80040.bmp
원본 그림의 크기: 가로 588pixel, 세로 169pixel                                                                       (2)

그림입니다.
원본 그림의 이름: CLP00000bd80041.bmp
원본 그림의 크기: 가로 700pixel, 세로 215pixel                                                                   (3)

그림입니다.
원본 그림의 이름: CLP00000bd80042.bmp
원본 그림의 크기: 가로 938pixel, 세로 219pixel                                                          (4)

where 그림입니다.
원본 그림의 이름: CLP00000bd80043.bmp
원본 그림의 크기: 가로 192pixel, 세로 85pixel , f is the operation frequency, and ‘ℜ’ represents the real component of the corresponding variable.

It can be found from (3) that Rp has a minimum value against R2, which means that there is a minimum in the driving voltages for the required power. This is expressed as:


그림입니다.
원본 그림의 이름: CLP00000bd80044.bmp
원본 그림의 크기: 가로 1440pixel, 세로 595pixel

Fig. 3. Equivalent circuits of the coupling structure and the pickup part.


그림입니다.
원본 그림의 이름: CLP00000bd80045.bmp
원본 그림의 크기: 가로 792pixel, 세로 227pixel                                                               (5)

where Pin2 denotes the input power of the secondary part, and Rp_min is the minimum of Rp, which can be calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd80046.bmp
원본 그림의 크기: 가로 1020pixel, 세로 186pixel                                                       (6)

In addition, the corresponding input resistance of the secondary part is:

그림입니다.
원본 그림의 이름: CLP00000bd80047.bmp
원본 그림의 크기: 가로 503pixel, 세로 181pixel                                                                          (7)

By combined equations (5), (6) and (7), it can be deduced that the driving voltage on the coupling plates is roughly proportional to the equivalent coupling capacitance, i.e. the transfer distance. The series LC network is developed to transform the equivalent input resistance of the secondary part into R2p by the design of its parameters.

As for the ECPT systems with a relatively large transfer distance, the equivalent coupling capacitances range from 10pF to 50pF, and the load resistances range from 10Ω to 100Ω [1], [7], [10]. Therefore, it can be found from (3) and (5) that the minimal driving voltage is generally at the level of 1 kV. If this driving voltage is generated directly by the inverter, the available MOSFETs are rare and costly. In addition, the on-resistances of the MOSFETs are minor when they operate at a low voltage and high current. Therefore, a parallel LC network, which provides the high driving voltage of the coupling structure with a relatively low terminal voltage on the switches of the inverter, is set up between the inverter and the coupling structure to satisfy the driving voltage requirement and to reduce the voltage stress on the inverter switches.



Ⅳ. ANALYSIS OF LC NETWORKS

Parallel LC networks serve as a voltage-boosting circuit and series LC networks function as a resistance-transforming circuit. In the analysis of ECPT systems, the parasitic parameters are usually neglected under the assumption that all of the semiconductor devices are fully conducting [18]. The following analysis employs the same approximation.


A. Series LC Network

As shown in Fig. 4, there are two types of series LC networks, which are identical in terms of transforming resistances. However, the network in Fig. 4(b) is incapable of suppressing high-order harmonics from the rectifier due to the frequency characteristic of the capacitors. As a result, the network in Fig. 4(a) is chosen to be developed between the coupling structure and rectifier, as opposed the one in Fig. 4(b).


그림입니다.
원본 그림의 이름: CLP00000bd80048.bmp
원본 그림의 크기: 가로 1494pixel, 세로 617pixel

Fig. 4. Two types of series LC networks.


The input impedance of the network in Fig.4(a) is

그림입니다.
원본 그림의 이름: CLP00000bd80049.bmp
원본 그림의 크기: 가로 690pixel, 세로 180pixel                                                                   (8)

When the input impedance appears resistive, in other words the reactance X2 is equal to 0, the parameters satisfy the following:

그림입니다.
원본 그림의 이름: CLP00000bd8004a.bmp
원본 그림의 크기: 가로 570pixel, 세로 122pixel                                                                        (9)

Then, the resistance gain of the series LC network is expressed as:

그림입니다.
원본 그림의 이름: CLP00000bd8004b.bmp
원본 그림의 크기: 가로 889pixel, 세로 194pixel                                                           (10)

It can be deduced that a certain resistance gain can be obtained by designing the parameters C2 and L2. Therefore, the series LC network can be regarded as a resistance transforming circuit. Combining (9) and (10), the inductor and capacitor are calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd8004c.bmp
원본 그림의 크기: 가로 384pixel, 세로 172pixel                                                                              (11)

그림입니다.
원본 그림의 이름: CLP00000bd8004d.bmp
원본 그림의 크기: 가로 356pixel, 세로 197pixel                                                                               (12)

Depending on the property of the coupling structure in Section III, the driving voltage reaches its minimum, provided that the equivalent input resistance of the secondary part is equal to R2p. Therefore, the resist gain should be chosen as:

그림입니다.
원본 그림의 이름: CLP00000bd8004e.bmp
원본 그림의 크기: 가로 268pixel, 세로 182pixel      (13)


Fig. 5. Parameter distributions of a series LC with respect to the coupling capacitor and equivalent load.

그림입니다.
원본 그림의 이름: image20.tiff
원본 그림의 크기: 가로 1269pixel, 세로 780pixel


 

그림입니다.
원본 그림의 이름: image20.tiff
원본 그림의 크기: 가로 1269pixel, 세로 780pixel

 

그림입니다.
원본 그림의 이름: image20.tiff
원본 그림의 크기: 가로 1269pixel, 세로 780pixel

 

그림입니다.
원본 그림의 이름: image20.tiff
원본 그림의 크기: 가로 1269pixel, 세로 780pixel


The inductors are all wound on iron-powder magnetic cores to reduce their EMI, volumes and weights. When the system operates at a high frequency, the core losses cannot be neglected, which leads to the load resistances being closely related to the transfer efficiency of the coupling structure. Too small a RL results in high losses in L2. Meanwhile, from (11), a relatively large RL leads to an overly large L2. Accordingly, besides the minimal driving voltage, the inductor losses and volume should be taken into account in the design of series LC networks.

Being related to many factors such as the magnetic material and the inductor current [19], the analytic expression

of the inductor losses is difficult to derive. Take the toroid magnetic cores made by MICROMETALS as an example. From its technological handbook [20], the inductor losses can be calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd8004f.bmp
원본 그림의 크기: 가로 1335pixel, 세로 329pixel                                          (14)

where EL2 denotes the volume of the magnetic core, B indicates the peak AC flux density, which is calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd80050.bmp
원본 그림의 크기: 가로 380pixel, 세로 197pixel                                                                              (15)

where A represents the cross-sectional area of the magnetic cores, 그림입니다.
원본 그림의 이름: CLP00000bd80065.bmp
원본 그림의 크기: 가로 90pixel, 세로 82pixel signifies the voltage on L2, and N denotes the number of turns, which are expressed as:

그림입니다.
원본 그림의 이름: CLP00000bd80051.bmp
원본 그림의 크기: 가로 482pixel, 세로 390pixel                                                                          (16)

where AL represents the inductance coefficient.

Compared with the equivalent resistance of inductors, the resistances in capacitors can be neglected [10]. Thus, the efficiency of the network can be derived from:

그림입니다.
원본 그림의 이름: CLP00000bd80052.bmp
원본 그림의 크기: 가로 662pixel, 세로 198pixel                                                                   (17)

where Ploss2 represents the losses in L2.

From (14)-(17), the distribution of L2 and C2 contributing to 그림입니다.
원본 그림의 이름: CLP00000bd80053.bmp
원본 그림의 크기: 가로 238pixel, 세로 88pixel can be depicted as in Fig. 5, with the assumptions that the system output power Pout is 100W, RL ranges from 10 Ω to 100 Ω, as well as Cs takes the capacitances of 15pF, 25pF, 30pF, 35pF, 40pF and 50pF.

As shown in Fig. 5(a), (b), (d), L2 and C2 are unable to achieve 그림입니다.
원본 그림의 이름: CLP00000bd80053.bmp
원본 그림의 크기: 가로 238pixel, 세로 88pixel if Cs takes too small a capacitance, since the dielectric losses in the coupling structure increases with the decrease of Cs. On the other hand, a rise in Cs contributes to the increase in the transfer efficiency. In terms of changing Re, a smaller Re corresponds to a smaller L2, while L2 increases. In addition, Fig. 5(c) shows that the resistance gain is always kept at a considerable value.


Fig. 6. Parameter sensitivity of the input impedance of a series LC network.

그림입니다.
원본 그림의 이름: CLP00000bd80054.bmp
원본 그림의 크기: 가로 1831pixel, 세로 739pixel

그림입니다.
원본 그림의 이름: CLP00000bd80054.bmp
원본 그림의 크기: 가로 1831pixel, 세로 739pixel

 


그림입니다.
원본 그림의 이름: CLP00000bd80055.bmp
원본 그림의 크기: 가로 1475pixel, 세로 568pixel

Fig. 7. Parallel LC network.


The parameter distribution of the series LC network provides a guideline for the practical design. First, the coupling structure should be designed as large as possible, with the engineering permission. Then, the resistance gain Gr can be calculated from (1), (7) and (13). Finally, L2 and C2 can be derived from (11) and (12). For example, take RL equaling to 40 Ω. According to Fig. 5(d), an equivalent coupling capacitance of 35 pF contributes to a transfer efficiency above 90%. From (11) and (12), it can be obtained that C2=0.577nF, and L2=174.9μH. As for the other magnetic materials, the dielectric loss tangent in (1) and the related coefficients need to be modified. However, the design procedure of the network is identical.

In some cases, Cs may be unable to achieve a transfer efficiency above 90% for a certain load resistance. As a result, an active impedance-transforming circuit is required to transform the load resistance, for example, a BUCK, BOOST, BUCK-BOOST, etc. [21].

The parameter robustness of a series LC network is an essential condition for its stable operation. For the available silvered-mica capacitors and inductors wound on iron-powder cores, their accuracy can reach ±0.025pF and ±0.05μH. When L2 and C2 vary within the relatively large ranges of (-1μH, 1μH) as well as (-10pF, 10pF), the input impedance and angle can be calculated from (8), and their contour plots are shown in Fig.6, where the circles correspond to the setting points. It can be seen that the variation of the input impedance is within 7%, and there are no sudden changes when the parameters drift slightly away from the setting point.

In circuit theory, the total harmonic distortion (THD) represents the ability to suppress harmonics [11]. A lower THD of a circuit implies a lower energy ratio of the harmonics to the fundamental component. This system contains two major harmonic sources: an inverter and a rectifier. The series LC network should be designed to reduce the harmonics from the rectifier, and its THD is represented as THD2. Meanwhile, the parallel LC network is designed to efficiently suppress the harmonics generated by the inverter current, and its THD is denoted as THD1. Operating at the harmonic frequency, the impedance of the circuit seen from the left of the rectifier is complex. Therefore, THD2 is analyzed by the FFT toolbox in MATLAB. Based on the example mentioned above, THD2 is about 0.6%, which reveals that the series LC network efficiently suppresses the harmonics.


B. Parallel LC Network

There are also two types of parallel LC network as shown in Fig.7, which are identical in terms of their boosting voltage. Just as the series LC network in Fig. 4(b) cannot suppress harmonics generated from the rectifier, the network in Fig. 7(b) is also incapable of suppressing harmonics from the inverter. Accordingly, the network in Fig. 7(a) is chosen to be developed between the inverter and the coupling structure. The input impedance of the network in Fig. 7(a) is derived from:

그림입니다.
원본 그림의 이름: CLP00000bd80056.bmp
원본 그림의 크기: 가로 718pixel, 세로 195pixel                                                                 (18)

The voltage gain between the output and input voltage of the network is calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd80057.bmp
원본 그림의 크기: 가로 517pixel, 세로 186pixel                                                                         (19)

where Q is equal to 그림입니다.
원본 그림의 이름: CLP00000bd80058.bmp
원본 그림의 크기: 가로 165pixel, 세로 88pixel and represents the quality factor of the parallel LC network. It can be seen that a certain voltage gain of a parallel LC network can be achieved by the design of the network’s parameters. Thus, the parallel LC network serves as a voltage boosting circuit.

For better understanding, the voltage gain of the series LC network can be derived as:

그림입니다.
원본 그림의 이름: CLP00000bd80059.bmp
원본 그림의 크기: 가로 493pixel, 세로 172pixel                                                                          (20)

It can be seen that the network’s output voltage Ue is always lower than its input voltage U2, which means that the series LC network is unable to boost the output voltage. Combined with equation (19), it can be seen that the required input voltage of the parallel LC network is lower than that of the series LC network with the same output power.

For the sake of a unity power-factor, equating the imaginary in (18) to zero, and combining it with (19) can derive:

그림입니다.
원본 그림의 이름: CLP00000bd8005a.bmp
원본 그림의 크기: 가로 429pixel, 세로 166pixel                                                                            (21)

그림입니다.
원본 그림의 이름: CLP00000bd8005b.bmp
원본 그림의 크기: 가로 368pixel, 세로 182pixel                                                                              (22)

The losses in the parallel LC network lie mainly in the inductor L2 because the equivalent resistance of the coupling structure is far less than R2. Accordingly, the efficiency of this network is expressed as:

그림입니다.
원본 그림의 이름: CLP00000bd8005c.bmp
원본 그림의 크기: 가로 601pixel, 세로 179pixel                                                                     (23)

where Pin1 represents the input power of the network, and Ploss1 denotes the losses in L1. In addition, combining this with (17) can derive:

그림입니다.
원본 그림의 이름: CLP00000bd8005d.bmp
원본 그림의 크기: 가로 429pixel, 세로 180pixel                                                                            (24)

According to (9), (14) and (23), the relationship among the voltage gain, inductor losses and 그림입니다.
원본 그림의 이름: CLP00000bd8005e.bmp
원본 그림의 크기: 가로 73pixel, 세로 61pixel is illustrated in Fig.8. It can be seen that the network should not be designed with a large voltage gain, since this would cause high inductor losses and low efficiency.

Based on (19)-(22), contour plots of the variations in the input impedance, input angle and voltage gain with respect to L1 and C1 are depicted in Fig. 9, where the circles correspond to setting points. It can be seen that there are no surges in the input impedance when L1 and C1 vary. Moreover, the change in the voltage gain is within 1% of the setting point.

The general formula of THD1 is calculated as:

그림입니다.
원본 그림의 이름: CLP00000bd8005f.bmp
원본 그림의 크기: 가로 1382pixel, 세로 272pixel                                        (25)

where m denotes the harmonic order. The formula, which involves only one network parameter Gv, contains over 90% of the energy in the inverter current when n exceeds 7.


그림입니다.
원본 그림의 이름: image39.tiff
원본 그림의 크기: 가로 713pixel, 세로 475pixel

Fig. 8. Relationship among the voltage gain, inductor losses and η1 of a series LC network.


From (9) and (25), the curves of L1 and THD1 as functions of Gv are plotted in Fig. 10, where the dashed line indicates that THD1 is always lower than 1% when Gv is higher than 13. Due to a low THD1, the harmonics are negligible, and the fundamental component dominates in the inverter’s output current. Therefore, the input DC voltage can be calculated as (26) according to the Fourier transform in [22].

그림입니다.
원본 그림의 이름: CLP00000bd80060.bmp
원본 그림의 크기: 가로 333pixel, 세로 194pixel                                                                                (26)

In addition, it can be deduced from the real line in Fig.10 that the voltage gain should be kept sufficiently high to achieve L1 with an acceptable size.

The lower limit of the voltage gain is jointly determined by the maximum Drain-Source voltage of the available MOSFETs, the allowable value of L1, and THD1. Meanwhile, the upper limit depends on 그림입니다.
원본 그림의 이름: CLP00000bd80061.bmp
원본 그림의 크기: 가로 62pixel, 세로 69pixel. Take, for example, Gv being equal to 30. The corresponding THD1 is 0.4% based on (25). Then, C1=0.492nF and L1=198μH can be achieved from (21) and (22). Combined with Section IV-A, a flow diagram of the design method for the system parameters is illustrated in

Fig. 11. It is necessary to emphasize that the equivalent coupling capacitance should be designed to be as large as possible for a higher transfer efficiency and lower driving voltage of the coupling structure.



Ⅴ. SIMULATION AND EXPERIMENTAL RESULTS

The operating frequency f is usually empirically chosen, while RL, Pout and Cs are determined by the specific demands in practical applications. In simulation and experimental systems, f, RL, Pout and Cs are chosen to be 500 kHz, 40Ω, 100W and 35pF, respectively. According to the design procedure, the major system parameters are calculated and shown in Table I.


Fig. 9. Parameter sensitivity of a parallel LC network.

그림입니다.
원본 그림의 이름: CLP00000bd80062.bmp
원본 그림의 크기: 가로 1731pixel, 세로 714pixel

 

그림입니다.
원본 그림의 이름: CLP00000bd80062.bmp
원본 그림의 크기: 가로 1731pixel, 세로 714pixel


그림입니다.
원본 그림의 이름: image43.emf
원본 그림의 크기: 가로 3676pixel, 세로 2676pixel

Fig. 10. Relationship among L1, THD1 and the voltage gain of a parallel LC network.


그림입니다.
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Fig. 11. Design procedure for the major system parameters.


TABLE I  Major System Parameters

Parameter

Value 

Parameter 

Value 

L1

200.4μH

C1

0.492nF

L2

175.5μH

C2

0.577nF

Cs

35pF

f

500kHz

RCs

14.3Ω

Udc

53V

RL

40Ω


In accordance with the circuit in Fig. 1, a simulation model was built in MATLAB with the parameters in Table I. The simulation results are shown in Fig. 12(a), where Uinv and Iinv represent the output voltage and current of the inverter, respectively. THD1 is about 0.4%, which indicates that the fundamental component is dominant in the inverter current. Fig.12(b) shows the voltage on C1 and the output voltage Uo of the rectifier. The peak value of UC1 reaches 1.35 kV and its RMS is 29.37 times higher than the fundamental component in the inverter output voltage, namely Gv=29.37, which matches well with the theoretical results. Although the driving voltage of the prototype system exceeds 1 kV, it is the minimum voltage corresponding to the output power designed for the prototype. Due to the capability of the boosting voltage of the parallel LC network, the voltage stresses of the switches in the inverter are only about 100 V despite the high driving voltage in the coupling plates.

When the inductances and capacitances in the simulation decrease by 0.5μH and 5pF from their theoretical values, the corresponding waveforms are shown as the dashed lines in Fig. 12, where Iinv` represents the current after the parameters have changed. As depicted in Fig. 12(a), the magnitude of the inverter current changes from 3A to 3.4A. Meanwhile, the input impedance appears slightly inductive. In Fig. 12(b), there is a lagging angle of 4° between the driving voltage UC1’ and the original voltage UC1. However, its magnitude and the output voltage are basically unchanged.


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Fig. 12. Simulation waveforms of the inverter output voltage and current.


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Fig. 13. Double-sided LCLC compensated ECPT system.


TABLE II  Key Parameters of Double-Sided LCLC Compensated ECPT Systems

Parameter 

Value 

Parameter 

Value 

L1f (L2f)

174.92μH

C1f (C2f)

0.58nF

L1e (L2e)

3.3mH

C1e (C2e)

20pF

Udc

95V


With the identical parameters of the operating frequency, output power, load resistance and coupling capacitance, the proposed system was compared with a high-order ECPT system based on the double-sided LCLC network presented in [1]. Its topology and circuit parameters are shown in Fig. 13 and Table II, respectively. The detailed design of the system can be found in [1]. The simulation results are shown in Fig. 14, where Uo and UC1 denote the output voltage and driving voltage, respectively. As can be seen from the real lines, the magnitude of the driving voltage is around 2.34 kV, which is 1.73 times higher than the proposed system. In addition, after the system parameters are changed by the same values as the proposed system, there were decreases of nearly 18% and 19% in the magnitudes of the output and driving voltage, as shown by the dashed line in Fig. 14. Therefore, from a comparison between these two systems, it can be concluded that the transfer characteristic of the proposed system is less sensitive than the high-order system in [1].


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Fig. 14. Simulation waveforms of a double-sided LCLC system.


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Fig. 15. Experimental prototype.


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Fig. 16. Experimental waveforms.


Moreover, the size of ECPT systems mainly depends on the number of the adopted resonant inductors and their inductance.

The proposed system adopts only two resonant inductors, while existing ECPT systems based on a double-sided LCLC network utilizes four inductors whose inductances are a lot larger than those of the proposed system. Thus, the proposed system's power density can be effectively improved.

As shown in Fig. 15, the primary and secondary plates, between which the distance is nearly 2.5mm, were printed on four copper foils of PCBs and have dimensions of 20cm×10cm each. It should be noted that the transfer distance can be increased to the centimeter range by enlarging the area of the coupling plates or by improving the operation frequency. The switching devices use STP30NF10 MOSFETS and MUR1520G rectifiers. The used capacitors were all of the silvered-mica type so as to ensure low losses. It needs to be emphasized that the practical inductor L1 is designed to be slightly larger than the theoretical value in order to achieve zero-voltage turn-on for the input inverter [1]. While the rectifier in the secondary part does not utilize a ZCS strategy in order to facilitate the experimental circuits. Experimental results are shown in Fig. 16. Zero-voltage turn-on is achieved at the input side and the waveforms are similar to the simulations in Fig. 12. The output power is approximately 100W with a whole system efficiency of 76.6%.

The major factor contributing to a somewhat low transfer efficiency in ECPT systems is the very small coupling capacitance Cs of the coupling structure. There are three solutions for improving system efficiency. The most effective solution is increasing the equivalent coupling capacitance which can reduce the dielectric losses. The another solution is decreasing the magnetic losses of the resonant inductors in the parallel LC network which can be achieved in several ways including the utilization of magnetic cores with a higher quality factor, employing air core inductors, and diminishing the voltage gain of the parallel LC network. In addition, a soft-switched rectifier can reduce the switching losses in the prototype. The transfer efficiency can approach 90% by utilizing the solutions mentioned above.

Note that the proposed system utilizes fixed frequency control. Thus, secondary information is not required to feed back to the controller in the primary part. If a higher accuracy of the output voltage is desired, information is necessary for the controller. Feedback control of the power flow and soft switching in the secondary part will be researched in a future study.



Ⅵ. CONCLUSION

A compact ECPT system with a double-sided LC network is proposed in this paper to achieve low parameter sensitivity and reduced complexity. On the primary side, a parallel LC network is employed for a high driving voltage and compensation of the coupling structure. Meanwhile a series LC network on the secondary side is applied to transform the load resistance for high transfer efficiency. The optimal driving voltage for the coupling structure is derived. In addition, the characteristics of the LC networks involved in boosting voltage and transforming impedance are analyzed, based on the provided design method for the system parameters. Simulation and experimental results have verified the properties of the proposed system. The output power of the prototype is approximately 100W with a whole system efficiency of 76.6%. When compared to a higher-order ECPT system operating at the same frequency, transfer distance and output voltage, the proposed system has fewer components and a lower driving voltage. Moreover, the proposed system is less sensitive to circuit parameters variations.



ACKNOWLEDGMENT

This work was sponsored by the research funds for the National Natural Science Foundation of China under Grants #51477020. This work was also supported by Chongqing International Science and Technology Cooperation Base Project under Grants CSTC2015GJHZ40001.



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Shi-Yun Xie received his B.S. degree from the College of Automation of Chongqing University, Chongqing, China, in 2010, where he is presently working towards his Ph.D. degree in Control Theory and Control Engineering. His current research interests include the mixed-resonant topologies of capacitive power transfer systems and their control strategies, and wireless power transfer technologies.


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Yu-Gang Su received his B.S. and M.S. degrees in Industry Automation and his Ph.D. degree in Control Theory and Control Engineering from Chongqing University, Chongqing, China, in 1985, 1993 and 2004, respectively. From 2008 to 2009, he was a Visiting Scholar at the University of Queensland, Brisbane, Australia. He is presently working as a Professor in the College of Automation, Chongqing University. His current research interests include power electronics, control theory and its applications, and wireless power transfer.


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Wei Zhou received his B.S. degree from the College of Automation of Chongqing University, Chongqing, China, in 2013, where he is presently working towards his Ph.D. degree in Control Theory and Control Engineering. He is presently a Visiting Scholar in the Department of Electrical and Computer Engineering, University of Auckland, Auckland, New Zealand. His current research interests include capacitive power transfer technology, wireless power, signal parallel transmissions and control theory.


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Yu-Ming Zhao received his B.S. degree from the College of Automation of Chongqing University, Chongqing, China, in 2014, where he is presently working towards his Ph.D. degree in Control Theory and Control Engineering. His current research interests include capacitively coupled power transfer and its modelling.


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Xin Dai received his B.S. degree in Industrial Automation from Yuzhou University, Chongqing, China, in 2000; and his Ph.D. degree in Control Theory and Control Engineering from the School of Automation, Chongqing University, Chongqing, China, in 2006. In 2012, he was a Visiting Scholar at the University of Auckland, Auckland, New Zealand. He is presently working as a Professor in the college of Automation, Chongqing University. His current research interests include inductive power transfer technology and nonlinear dynamic behavior analysis of power electronics.