https://doi.org/10.6113/JPE.2018.18.2.407

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Novel Buck Mode Three-Level Direct AC Converter with a High Frequency Link

Lei Li^†, Yue Guan^*, Kunshan Gong^*, Guangqiang Li^*, and Jian Guo^*

^†,*School of Automation, Nanjing University of Science and Technology, Nanjing, China

Abstract

A novel family of Buck mode three-level direct ac converters with a high frequency link is proposed. These converters can transfer an unsteady high ac voltage with distortion into a regulated sinusoidal voltage with a low THD at the same frequency. The circuit configuration is constituted of a three-level converter, high frequency transformer, cycloconverter, as well as input and output filters. The topological family includes forward, push-pull, half-bridge, and full-bridge modes. In order to achieve a reliable three-level ac-ac conversion, and to overcome the surge voltage and surge current of the cycloconverter, a phase-shifted control strategy is introduced in this paper. A prototype is presented with experimental results to demonstrate that the proposed converters have five advantages including high frequency electrical isolation, lower voltage stress of the power switches, bi-directional power flow, low THD of the output voltage, and a higher input power factor.

Key words: Buck mode, Direct ac converter, High frequency link, Three-level (TL)

Manuscript received May 11, 2017; accepted Sep. 30, 2017

Recommended for publication by Associate Editor Saad Mekhilef.

^†Corresponding Author: lileinjust@njust.edu.cn Tel: +86-25-84315468-7083, Nanjing Univ. Sci. Tech.

*School of Autom., Nanjing Univ. of Science and Technology, China

Ⅰ. INTRODUCTION

In recent years, ac converters have become widely used in various industrial domains. However, recent research on ac converter technology has mainly focused on two-level ac converters and ac-dc-ac type multilevel ac converters [1]-[4]. The former includes ac converters with and without electrical isolation such as ac choppers, thyristor phase-controlled cycloconverters and matrix converters. The latter includes ac converters with no electrical isolation as well as those with low or middle frequency electrical isolation.

Nowadays, ac converters are required for both low-voltage input applications and high-voltage input applications. In these fields, the multilevel technique has been effectively used to reduce voltage stress with an improved output voltage quality. The multilevel technique was first proposed in dc-ac inverters [5]-[15]. Then it was developed in dc-dc converters and ac-dc rectifiers [16]-[20]. So far, the multilevel technique used in ac converters has been mainly limited to ac-dc-ac type ac converters. These converters usually have many shortcomings such as too many power conversion stages, unidirectional power flow, low input power factor, and weak adaptability to various loads. Several multilevel direct ac converters were proposed in [21]-[25]. These converters have advantages such as a single power conversion stage (LFAC- LFAC), bi-directional power flow, higher input power factor, lower voltage stress of the power switches, and strong adaptability to various loads. However, they all have no electrical isolation. Therefore, a novel high frequency isolated half-bridge three-level AC/AC converter was proposed to improve multilevel direct ac converters [26].

A novel family of Buck mode three-level direct ac converters with a high frequency link is proposed in this paper. In order to achieve reliable three-level ac-ac conversion, a strategy for phase-shifted control is also presented. The converters proposed in this paper have two- stage power conversion (LFAC-HFAC-LFAC), a bi-directional power flow, and a higher input power factor when compared with ac-dc-ac type TL ac converters. These converters have lower voltage stress of the power switches when compared with two-level ac converters. In addition, they have a more compact structure when compared with those with low or middle frequency electrical isolation. However, their efficiency is influenced by high switching device counts. These converters are targeted to be used on a new type of regulated sinusoidal ac power supply, electronic transformers and ac regulators, where high-voltage input and high frequency electrical isolation and/or bidirectional power flows are needed.

Ⅱ. PROPOSED TOPOLOGIES

The circuit topological family of Buck mode three-level direct ac converters with a high frequency link is proposed, as shown in Fig. 1. All of the proposed converters have the same circuit configuration, which is constituted of a three-level converter, high frequency transformer, cycloconverter as well as input and output filters. The converters can transfer unsteady high ac voltage with distortion into regulated sinusoidal voltage with a low THD at the same frequency. The topological family includes the forward mode, interleaving forward mode, push-pull full-wave mode, push- pull full-bridge mode, half-bridge full-wave mode, half-bridge full-bridge mode, full-bridge full-wave mode and full-bridge full-bridge mode. These converters have advantages such as high-frequency electrical isolation, two-power conversion (LFAC-HFAC-LFAC), a bi-directional power flow, a higher input power factor, strong ability to differentiate loads, lower voltage across power switches, and soft commutation of the cycloconverter.

Fig. 1. Circuit diagrams for the proposed topological family. (a) Forward mode. (b) Interleaving forward mode. (c) Push-pull full-wave mode. (d) Push-pull full-bridge mode. (e) Half-bridge full-wave mode. (f) Half-bridge full-bridge mode. (g) Full-bridge full-wave mode. (h) Full-bridge full-bridge mode.

(a)

(b)

(c)

(d)

(e)

(f)

(g)

(h)

A comparison of the proposed topologies is shown in Table I. From Table I, it can be seen that the voltage stress for all of the topologies can be lowered more than that of two-level ac converters. It can also be seen that the full- bridge full-bridge mode topology is better suited for a larger power output.

Table I Comparison of the Proposed Topologies

performances   topologies	active components count	passive components count	voltage stresses of three-level converter	voltage stresses of cycloconverter	voltage gain
forward mode	12	4
interleaving forward mode	20	4
push-pull full-wave mode	12	4
push-pull full-bridge mode	16	4
half-bridge full-wave mode	16	5
half-bridge full-bridge mode	20	5
full-bridge full-wave mode	28	5
full-bridge full-bridge mode	32	5

Ⅲ. CONTROL STRATEGY AND STEADY PRINCIPLE

The phase-shifted control strategy of the proposed converters is presented. Taking the push-pull full-wave mode circuit topology shown in Fig. 1(c) as an example, S_1a and S_4a are the leading-arm power switches, and S_2a and S_3a are the lagging-arm power switches. There is a phase difference θ of (0~180^o) between the leading-arm and the lagging-arm of the three-level converter. In addition, the voltage across the output filter u_AB is a uni-polarity SPWM voltage. The output voltage u_o can be adjusted and kept stable by adjusting θ sinusoidally when the input voltage u_i or the load R_L varies.

By using phase-shifted control between the leading-arm and the lagging-arm of a three-level converter, a three-level voltage across the high frequency transformer can be achieved, and the cycloconverter can commutate when the bi-polar three-level high frequency ac voltage from the three-level converter is zero. Therefore, the voltage across the power switches of the three-level converter is lowered, and the current of the output filter inductor is naturally commutated. The ZVS of the cycloconverter can be realized, and the surge voltage and surge current of the cycloconverter are overcome.

Before analyzing the steady principle, the following assumptions are made: (1) the inductors, capacitors, and resistors are ideal devices; (2) the power switches are ideal control devices; (3) the delay time of the switching is neglected. Principal waveforms within one switching period T_s (t₁~t₁₃) are shown in Fig. 2 (the control strategy of the negative half cycle is the same as that of the positive half cycle). From Fig. 2, it can be seen that the flux in the high frequency transformer is balanced over each switching period. During one T_s, there are twelve switching modes in the CCM shown in Fig. 3.

Fig. 2. Principal waveforms within one switching period T_s.

Fig. 3. Twelve switching modes in the CCM during one switching period T_s. (a) [t1- t2]. (b) [t2- t3]. (c) [t3- t4]. (d) [t4- t5]. (e) [t5- t6]. (f) [t6- t7]. (g) [t7- t8]. (h) [t8- t9]. (i) [t9- t10]. (j) [t10- t11]. (k) [t11- t12]. (l) [t12- t13].

(a)

(b)

(c)

(d)

(e)

(f)

(g)

(h)

(i)

(j)

(k)

(l)

Another switching cycle starts at t₁₃. Therefore, there is a total of three levels (u_i, 0, -u_i) in the voltage across the high frequency transformer, and the power switches of the cycloconverter can realize ZVS soft commutation.

Fig. 4 shows equivalent circuits of the twelve switching modes during one T_s, where r includes the equivalent resistance of the high frequency transformer, the on resistance of the power switches, the parasitic resistance of the filter inductor and so on.

Fig. 4. Equivalent circuits in the CCM during one T_s. (a) State 1. (b) State 2.

(a)

(b)

Since the switching frequency f_s is sufficiently higher than both the cut-off frequency f_c of the L_f-C_f filter and the modulation frequency f_o (i.e. the frequency of u_i and u_o), the state-space averaging method can be used to establish the equations of i_Lf, u_o and u_i. By using this, the output characteristic in the actual state (r≠0) and the CCM is given by:

   (1)

         (2)

In (1) and (2), D is the duty cycle of the SPWM voltage u_AB across the output filters during one T_s. From (2), the output characteristic in the ideal state (r=0) and the CCM is given by:

   (3)

Similarly, the output characteristic in the ideal state (r=0) and the critically CCM is given by:

         (4)

The output characteristic in the ideal state (r=0) and the DCM is given by:

     (5)

In (4) and (5), I_o is the load current, I_Gmax is the maximum value of I_o in the critically CCM and .

Ⅳ. DESIGN CONSIDERATIONS

The design specifications of the push-pull mode TL ac direct converter are defined as follows: input voltage U_i=198-242V(50Hz) ac, output voltage U_o=110V(50Hz) ac, normalized capacity S=500VA, maximum duty cycle D_max=0.8, pulsating current of , current of the output filter capacitor i_Cf ≤0.05I_{o, max}, and equivalent resistance of the converter r=0.5Ω.

To ensure the operation of the converter, the circuit parameters including f_s, the high frequency transformer, C_f, L_f and S_1a~S_6b are determined as follows.

t=t₁-t₂: The power switch S_2a is turned on with the voltage u_i at t₁; the current of the primary windings of the high frequency transformer i_N1 begins to flow through S_1a, S_1b(D_1b), S_2a, S_2b (D_2b), and the voltage across the primary winding u_N2=u_i; the current of the output filter inductor i_Lf flows through S_5a, S_5b(D_5b), and the voltage across the output filters u_AB=u_iN₃/N_2.

t=t₂-t₃: S_1a is turned off with ZVS at t₂; the voltage across S_1a increases quickly from 0 to u_i, and the voltage across S_4a decreases quickly from u_i to 0; i_N1 begins to flow through S_4b, D_4a, S_2a, S_2b (D_2b), and u_N2=0; i_Lf begins to flow through S_5a, S_5b(D_5b), and u_AB=0.

t=t₃-t₄: S_4a is turned on with ZVS at t₃; i_N1 flows through S_4b, S_4a(D_4a), S_2a, S_2b(D_2b), and u_N2=0; i_Lf flows through S_5a, S_5b(D_5b), and u_AB=0.

t=t₄-t₅: S_6a and S_6b are turned on with ZVS at t₄; i_N1 still flows through S_4b, S_4a(D_4a), S_2a, S_2b(D_2b), and u_N2=0; i_Lf flows through S_5a, S_5b(D_5b), and u_AB=0. This time interval is the commutation overlap time of the cycloconverter to guarantee the continuity of i_Lf.

t=t₅-t₆: S_5a and S_5b are turned off with ZVS at t₅; i_N1 flows through S_2b, S_2a(D_2a), S_4a, S_4b(D_4b), and u_N2=0; i_Lf flows through S_6a, S_6b(D_6b), and u_AB=0.

t=t₆-t₇: S_2a is turned off with ZVS at t₆; i_N1 flows through S_4a, S_4b(D_4b), S_2b, D_2a, and u_N2=0; i_Lf flows through S_6a, S_6b(D_6b), and u_AB=0.

t=t₇-t₈: S_3a is turned on with the voltage u_i at t₇; i_N1 flows through S_3a, S_3b(D_3b), S_4a, S_4b(D_4b), and u_N1=-u_i; i_Lf still flows through S_6a, S_6b(D_6b), and u_AB= u_iN₄/N₁.

t=t₈-t₉: S_4a is turned off with ZVS at t₈; the voltage across S_4a increases quickly from 0 to u_i; i_N1 begins to flow through S_3a, S_3b(D_3b), S_1b, D_1a, and u_N1=0; i_Lf begins to flow through S_6a, S_6b(D_6b), and u_AB=0.

t=t₉-t₁₀: S_1a is turned on with ZVS at t₉; i_N1 flows through S_3a, S_3b(D_3b), S_1b, S_1a(D_1a), and u_N1=0; i_Lf flows through S_6a, S_6b(D_6b), and u_AB=0.

t=t₁₀-t₁₁: S_5a and S_5b is turned on with ZVS at t₁₀; i_N1 still flows through S_3a, S_3b(D_3b), S_1b, S_1a(D_1a), and u_N1=0; i_Lf flows through S_6a, S_6b(D_6b), and u_AB=0. This time interval is the commutation overlap time of the cycloconverter.

t=t₁₁-t₁₂: S_6a and S_6b is turned off with ZVS at t₁₁; i_N1 flows through S_1a, S_1b(D_1b), S_3b, S_3a(D_3a), and u_N1=0; i_Lf flows through S_5a, S_5b(D_5b), and u_AB=0.

t=t₁₂-t₁₃: S_3a is turned off with ZVS at t₁₂; i_N1 flows through S_1a, S_1b(D_1b), S_3b, D_3a, and u_N1=0; i_Lf flows through S_5a, S_5b(D_5b), and u_AB=0.

A. Determining the Switching Frequency f_s

The higher the switching frequency f_s is, the less the filters will be at a cost of more switching losses. Therefore, f_s is chosen to be 50kHz as a trade-off.

B. Determining the High Frequency Transformer

From (2), the turn ratio of the high frequency transformer N₃/N₁ is given by:

             (6)

Some losses including conduction losses and switching losses of the power switches are considered. Therefore, N₃/N₁ is selected as 0.7.

A LP3 PM74 core with a 5100Gs saturated flux is selected for the transformer, whose effective magnetic circuit area is S=6.37cm². For its operating flux density ΔB=2B_m=2400G_S, the turns of the high frequency transformer’s primary windings are given by:

          (7)

Then, N₁ and N₂ are chosen to be 15.

From (6) and (7), the turns of the high frequency transformer’s secondary windings N₃ and N₄ are chosen to be 11. Therefore, N₁/N₂/N₃/N₄=15/15/11/11.

C. Determining the Output Filter Capacitance C_f

With the value of C_f increasing, the THD of the output voltage u_o decreases. However, the reactive component of the output current and the loss of the converter increase. When limited to i_Cf ≤0.05I_o,max, C_f is determined by:

    (8)

The maximum voltage across C_f is . Therefore, C_f  is chosen as 4.7mF/450V.

D. Determining the Output Filter Inductance L_f

With the value of L_f increasing, the THD of the output voltage u_o decreases. However, the dynamic response of the system becomes slow. Limited to , L_f must satisfy:

         (9)

Then L_f is selected to be 650μH. An LP3 PM62 core is selected to be the output filter inductor, whose effective magnetic circuit area is S=4.9cm². For its operating flux density B_m=3300Gs, the turns of the output filter inductor is given by:

                (10)

N is selected to be 29 turns. The air gap of the magnetic core is given by:

          (11)

E. Determining the Power Switches

Based on the steady principle, the maximum voltage across the power switches of the three-level converter is , which is only half that of two-level push-pull converters. The rms current of the power switches of the three-level converter is:

           (12)

Then, MOSFETs IRFP460 (500V/20A) are chosen for the power switches S_1a~S_4b.

The maximum voltage across the power switches of the cycloconverter is. The rms current of the power switches of the cycloconverter is . Then, fast IGBTs FGA20N120FTD (1200V/20A) are chosen for the power switches S_5a~S_6b.

Ⅴ. PROTOTYPE

The designed and developed prototype shown in Fig. 5 is as follows: push-pull mode circuit topology, phase-shifted control strategy, normalized capacity S=500VA, input voltage U_i=220V±10%(50Hz) ac, output voltage U_o=110V (50Hz) ac, switching frequency f_s=50kHz, LP3 PM74 magnetic core for the high frequency transformer, turn ratio N₁/N₂/N₃/N₄=15/15/11/11, output filter inductance L_f=650μH, output filter capacitance C_f=4.7μF/450V, MOSFETs (IRFP460) for S_1a~S_4b, fast IGBTs (FGA20N120FTD) for S_5a~S_6b, and load power factor cosφ_L= -0.75~+0.75.

Fig. 5. Designed and developed prototype.

The developed prototype has good comprehensive performances: the normalized capacity S=500VA, U_i=198~242V(50Hz) ac, the load power factor range cosφ_L = -0.75~0.75, U_o=110±1V, f_o=50Hz, the output voltage THD<3.5%, the conversion efficiency at the normalized different nature load is more than 80.0~87.0%, the line power factor at the normalized different nature load is more than 0.670~0.998, the DC component of u_o is less than 0.1V, and the operational time is 120 min at a 110% normalized load.

Experimental waveforms of the proposed converter are shown in Fig. 6. As shown in Fig. 6(a) and Fig. 6(b), the voltage across the transformer u_N1 is a bi-polarity three-level (u_i, 0, -u_i) high frequency voltage, and the flux in the high frequency transformer can be balanced over each high frequency switching cycle. From Fig. 6(c) and Fig. 6(d), it can be seen that the voltage across the output filter u_AB is a uni-polarity SPWM voltage. Fig. 6(e) shows that the voltage across the three-level converter is the input voltage, which is only half that of the push-pull mode two-level ac converter. From Fig. 6(f), it can be seen that the power switches of the cycloconverter can realize ZVS. Fig. 6(g), Fig. 6(h), Fig. 6(i) and Fig. 6(j) show that the output voltage u_o has a much lower THD than the input voltage u_i, and that the converter has strong adaptability to various kinds of loads.

Fig. 6. Principle test waveforms of the proposed converter. (a) CH2: uN1 (200V/div); CH1: iN1 (10A/div); t(5ms/div). (b) CH2: uN1 (196V/div); CH1: iN1 (9.8A/div); t(20μs/div). (c) CH2: uAB (200V/div); CH1: iLf (10A/div); t(10ms/div). (d) CH2: uAB (146V/div); CH1: iLf (1.46A/div); t(18μs/div). (e) CH1: trigger voltage ugs1a of the power switch S1a (20V/div); CH2: voltage uds1a across S1a (200V/div); t(5ms/div). (f) CH1: trigger voltage ugs5b of the power switch S5b(20V/div); CH2: voltage uds5b across S5b (200V/div); t(10μs/div). (g) CH1: input voltage ui (200V/div); CH2: reference voltage uref (5V/div); t(5ms/div). (h) CH1: uo at a resistive load (100V/div); CH2: io at a resistive load (5A/div); t(10ms/div). (i) CH1: io at a RL load (5A/div); CH2: uo at a RL load (100V/div); t(10ms/div). (j) CH1: io at a RC load (2A/div); CH2: uo at a RC load (100V/div); t(10ms/div).

(a)	(b)
(c)	(d)
(e)	(f)
(g)	(h)
(i)	(j)

Curves where the conversion efficiency and the line power factor vary with the load at different input voltages are shown in Fig. 7. From Fig. 7, it can be seen that the converter has a higher conversion efficiency and a line power factor. With the output power increasing, both the conversion efficiency and the line power factor of the converter increase, and they reach their maximum value at the nearest normalized capacity.

Fig. 7. Conversion efficiency and line power factor versus the load at different input voltages. (a) Conversion efficiency η versus output power P_o at different input voltages u_i. (b) Line power factor cosφ_i versus output power P_o at different input voltages u_i.

(a)

(b)

Ⅵ. CONCLUSIONS

In this paper, a novel family of Buck mode three-level direct ac converters with a high frequency link is proposed. The converters can transfer unsteady high ac voltage with distortion into regulated sinusoidal voltage with a low THD at the same frequency. The circuit configuration is constituted of a three-level converter, high frequency transformer, cycloconverter, and input and output filters. The topological family includes the forward mode, interleaving forward mode, push-pull full-wave mode, push-pull full-bridge mode, half-bridge full-wave mode, half-bridge full-bridge mode, full-bridge full-wave mode and full-bridge full-bridge mode. By introducing a phase-shifted control strategy with the commutation overlap of the cycloconverter, the three-level ac-ac conversion and lower voltage stress of the power switches can be reliably achieved. In addition, the surge voltage and surge current of the cycloconverter are overcome.

This paper also describes the design and development of a prototype of a 500VA 220V±10% 50Hz ac/110V 50Hz ac converter. Experimental results are provided to show that the converters can reduce the voltage stress of the power switches, so that it is only half that of traditional two-level ac converters. The obtained experimental results also show that the input power factor is more than 0.670~0.9998 at the normalized capacity. This is much better than ac-dc-ac type TL ac converters that have an input power factor of 0.6~0.7. Furthermore, the low THD of the output voltage, the function of the bi-directional power flow and high frequency electrical isolation are also demonstrated in this paper.

ACKNOWLEDGMENT

This work was supported by Natural Science Foundation of China (61673219), Natural Science Foundation of Jiangsu Province (BK20161499), Six Talents Peak of Jiangsu Province (XNYQC-CXTD-001) and the Fundamental Research Funds for the Central Universities (30920140122005).

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Lei Li was born in Shandong Province, China, in 1975. He received his B.S. degree from the Department of Electrical Engineering, Shandong University of Science and Technology, Jinan, China, in 1997; and his Ph.D. degree from the Department of Electrical Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, China, in 2004. He is presently working as an Associate Professor in the College of Automation Engineering of the Nanjing University of Science and Technology, Nanjing, China. He has written one book and published more than 140 technical papers. He has received one first class award for the production of science and technology in Jiangsu Province. He has also obtained thirteen Chinese patents. His current research interests include multilevel techniques, high frequency power conversion, and control techniques.

Yue Guan was born in Heilongjiang, China. She received her B.S. degree in Applied Physics from the Nanjing University of Science and Technology, Nanjing, China, in 2014, where she is presently working towards her Ph.D. degree in Electrical and Electronic Engineering. Her current research interests include DC-AC inverters, high-frequency inverters and multi-level inverter topologies.

Kunshan Gong was born in Zhejiang Province, China, in 1992. He received his B.S. degree from the School of Energy and Power Engineering, Nanjing University of Science and Technology, Nanjing, China, in 2015, where he is presently a Postgraduate Student in the School of Automation. His current research interests include power electronic converters and multilevel inverters.

Guangqiang Li was born in Nanjing, China. He received his B.S. degree in Electrical Engineering and Automation from the Nanjing University of Science and Technology, Nanjing, China, in 2016, where he is presently working towards his M.S. degree in Power Electronics and Power Transmission. His current research interests include DC-DC converters, multilevel converters/inverters and PWM converter systems.

Jian Guo received his B.S. degree in Electrical Technology and his Ph.D. degree in Control Theory and Control Engineering from the Nanjing University of Science and Technology, Nanjing, China, in 1997 and 2002, respectively. Since 2002, he has been with the School of Automation, Nanjing University of Science and Technology, where he became a professor in 2013. His current research interests include power electronics, intelligent systems and motion control.