사각형입니다.

https://doi.org/10.6113/JPE.2018.18.2.482

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Design Methodology of a Three-Phase Dual Active Bridge Converter for Low Voltage Direct Current Applications


Won-Bin Lee*, Hyun-Jun Choi*, Young-Pyo Cho**, Myung-Hyo Ryu***, and Jee-Hoon Jung


†,*School of Electrical Engineering, Ulsan National Institute of Science and Technology, Ulsan, Korea

**Smart-Grid Group Power Distribution Lab, KEPCO Research Institute, Daejeon, Korea

***Power Conversion and Control Research Center, HVDC Research Division, KERI, Changwon, Korea



Abstract

The practical design methodology of a three-phase dual active bridge (3ph-DAB) converter applied to low voltage direct current (LVDC) applications is proposed by using a mathematical model based on the steady-state operation. An analysis of the small-signal model (SSM) is important for the design of a proper controller to improve the stability and dynamics of the converter. The proposed lead-lag controller for the 3ph-DAB converter is designed with a simplified SSM analysis including an equivalent series resistor (ESR) for the output capacitor. The proposed controller can compensate the effects of the ESR zero of the output capacitor in the control-to-output voltage transfer function that can cause high-frequency noises. In addition, the performance of the power converter can be improved by using a controller designed by a SSM analysis without additional cost. The accuracy of the simplified SSM including the ESR zero of the output capacitor is verified by simulation software (PSIM). The design methodology of the 3ph-DAB converter and the performance of the proposed controller are verified by experimental results obtained with a 5-kW prototype 3ph-DAB converter.


Key words: Controller design, Low voltage direct current (LVDC), Small-signal model (SSM), Three-phase DAB (3ph-DAB) converter


Manuscript received Jul. 26, 2017; accepted Dec. 30, 2017

Recommended for publication by Associate Editor Dehong Xu.

Corresponding Author: jhjung@unist.ac.kr Tel: +82-52-217-2140, Fax: +82-52-217-2109, UNIST

*School of Electrical Eng., Ulsan Nat’l Inst. Sci. Tech. (UNIST), Korea

**Smart-Grid Group Power Distribution Lab, KEPCO Res. Inst., Korea

***Power Convers. Contr. Res. Center, HVDC Res. Div., KERI, Korea



Ⅰ. INTRODUCTION

Recently, interest in DC Microgrids (DC MGs) has increased in an effort to reduce fossil fuel consumption and improve power transmission efficiency [1]-[3]. A DC MG has many advantages over traditional AC distribution systems, such as high-power transfer efficiency and ease of connection to renewable energy sources. A multi-terminal low voltage direct current (LVDC) system has been considered to improve the flexibility and efficiency of distributed power sources [4]. A conceptual diagram of an LVDC distributed system is shown in Fig. 1. The LVDC system of the DC MG is used to distribute electric power to end users. A variety of renewable sources such as wind power, photovoltaic (PV), and energy storage system (ESS) can be easily connected to LVDC buses [5].


그림입니다.
원본 그림의 이름: CLP00002b4c41e5.bmp
원본 그림의 크기: 가로 1456pixel, 세로 826pixel

Fig. 1. Conceptual diagram of a LVDC system.


The LVDC converter is required for the safety of end users to convert high voltages to low voltages. A powerful candidate for a LVDC power converter is the three-phase dual active bridge (3ph-DAB) converter shown in Fig. 2. The 3ph-DAB converter includes three bridge legs on the primary and secondary sides, a coupling inductor, and a three-phase transformer. The 3ph-DAB converter has been studied for high power applications since this topology is characterized by reduced switching loss due to its zero-voltage switching (ZVS) capability and dividing the current by the phase to reduce conduction losses [6]-[8]. A mathematical model of the converter was used to propose the basic operating principle and design method [6]. Previous research on this hardware has only investigated design methods that assume ideal behavior. However, practical design methodologies that consider non-ideal transformers and coupling inductances should be derived to manufacture the 3ph-DAB converters in industrial applications.


그림입니다.
원본 그림의 이름: image2.jpeg
원본 그림의 크기: 가로 687pixel, 세로 271pixel

Fig. 2. Schematic of three-phase DAB converter.


Designing a suitable controller for a power converter requires an analysis based on a small-signal model (SSM), which can improve the stability and dynamics of the converter [15]. In a previous study, a simplified SSM of a 3ph-DAB converter was introduced to design a current- balancing control algorithm for a three-phase transformer [9]. However, the simplified SSM in [9] excludes the effects of the ESR zero of the output capacitor. The ESR zero of the output capacitor in the control-to-output voltage transfer function makes the converter much weaker in terms of high-frequency noise due to reduced damping at high- frequencies. Therefore, a lead-lag controller, which can compensate the ESR zero of the output capacitor, is required in practical applications.

This paper briefly introduces the operational principle of the 3ph-DAB converter. Practical design considerations such as the effects of transformer winding types and coupling inductance will be presented in Section II. In Section III, the lead-lag controller design methodology will be proposed to compensate for the effects of the ESR zero of the output capacitor based on a simplified SSM of the converter including the ESR zero of the output capacitor. Finally, the proposed lead-lag controller will be verified with experimental results using a 5-kW prototype 3ph-DAB converter.



Ⅱ. DESIGN METHODOLOGY

In high power applications, the 3ph-DAB converter can be a good candidate for a competent topology. This topology has the advantages of a relatively simple bi-directional control algorithm and a symmetric structure. In addition, the 3ph- DAB converter can achieve ZVS of the power switch without auxiliary components, which can improve the overall power conversion efficiency.


A. Operational Principle

Theoretical waveforms of the 3ph-DAB converter under a forward power flow are shown in Fig. 3. The converter has a phase difference of 120° in each phase. Its operational principle is similar to that of a single-phase DAB converter using single-phase shift modulation between the primary and secondary side. There are two operating modes depending on the current direction. Power is transmitted from the primary side to the secondary side when the phase of the primary side leads to that of the secondary side, and vice versa. The coupling inductance combined with the series inductance and the leakage inductance of the transformer is used as the power transfer component in the 3ph-DAB converter.


그림입니다.
원본 그림의 이름: image3.png
원본 그림의 크기: 가로 771pixel, 세로 883pixel

Fig. 3. Theoretical waveforms of a three-phase DAB converter in the forward power flow.


B. Y-Y and Y-Δ Transformer

3-phase transformers should be selected by considering the characteristics of the winding types. There are two types of windings in three-phase converter [10]: 1) Y-Y windings; and 2) 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings. The turn ratio for each of the windings is different. Thus, the Y-Y and the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings are 1:1 and 1:그림입니다.
원본 그림의 이름: CLP000014940001.bmp
원본 그림의 크기: 가로 75pixel, 세로 74pixeln, respectively. Due to the turn ratio, the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel connection is advantageous for high voltage applications. In high-power applications, a high leakage inductance due to a lot of turn number leads to a lot of transformer losses. On the other hand, the Y-Y connection is advantageous for maintaining the current balance of each leg since it has the same structure on the primary and secondary sides.

In order to determine the desired winding type in a 3-phase converter, the winding types should be compared with each other in terms of the RMS current and reactive power while considering the power conversion efficiency. The RMS current of the Y-Y windings and 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings can be obtained as follows:

그림입니다.
원본 그림의 이름: CLP00002b4c0001.bmp
원본 그림의 크기: 가로 1205pixel, 세로 472pixel                (1)

그림입니다.
원본 그림의 이름: CLP00002b4c0002.bmp
원본 그림의 크기: 가로 1366pixel, 세로 406pixel             (2)

where Vi and Vo are the input and output voltages, L is the coupling inductance, ω is the switching angular frequency, n is the turn ratio of the transformer, and φ is the phase-shift angle. Fig. 4 shows a comparison of the tendency of the RMS currents and reactive power according to an increase in the output power. In Fig. 4, the blue line and dotted-blue line represent the RMS current of the Y-Y windings and 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings, respectively. The RMS current of the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings is higher than that of the Y-Y windings under light load conditions. However, RMS current of the Y-Y windings is higher than that of the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel winding under medium or higher load conditions.


그림입니다.
원본 그림의 이름: image5.jpeg
원본 그림의 크기: 가로 708pixel, 세로 394pixel

Fig. 4. Comparison of the RMS current and reactive power between the Y-Y windings and 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings.


A comparison of the reactive power versus an increase of the output power is shown in Fig. 4. In Fig. 4, the red line and dotted red line indicate the reactive powers of the Y-Y windings and 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings, respectively. The reactive power of the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings is higher than that of the Y-Y windings since the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings have a 30° phase delay due to its structure. This natural feature of the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings can be explained by the transmitted power of the 3ph-DAB converter when the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings are applied as follow:

그림입니다.
원본 그림의 이름: CLP00002b4c0003.bmp
원본 그림의 크기: 가로 1221pixel, 세로 175pixel        (3)

From (3), the direction of the transmitted power is reversed until the phase is shifted to 30° in the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings, which implies a 30° phase delay. This means that the power can be transmitted from the primary side to the secondary side after the phase is shifted to 30° in the 그림입니다.
원본 그림의 이름: CLP00002544000b.bmp
원본 그림의 크기: 가로 110pixel, 세로 51pixel windings. As shown in Fig. 5, although the Y-Y windings have a higher power loss under heavy load conditions, the power efficiency is high under most of the load condition, especially under light load conditions. Due to the design considerations for the power margin, the normalized phase-shift cannot reach 1, which can reduce the conduction loss under heavy load conditions. In addition, the Y-Y connection can reduce the current imbalance of each leg since the transformer structure is the same on both sides. Therefore, the Y-Y windings was chosen as the transformer structure of the 3ph-DAB converter.


그림입니다.
원본 그림의 이름: image10.jpeg
원본 그림의 크기: 가로 722pixel, 세로 404pixel

Fig. 5. Loss comparisons between the Y-Y and Y-Δ connections.


The number of windings of the transformer can be selected from the voltage waveform of the transformer in accordance with Faraday’s law as shown in Fig. 3. The number of windings is proportional to the leakage inductance, which causes the transformer losses. Therefore, the minimum number of windings is required [11], [12]. The minimum number of primary winding can be calculated as follows:

그림입니다.
원본 그림의 이름: CLP00002b4c0004.bmp
원본 그림의 크기: 가로 841pixel, 세로 244pixel          (4)

where D is the duty ratio, Bmax is the maximum flux density, Ae is the effective cross-sectional area of the transformer’s core, fs is the switching frequency, and Vi is the input voltage.


C. Design of the Proper Coupling Inductance

The design of the coupling inductance is important for the proper operation of the 3ph-DAB converter [6]. The average current can be obtained by integrating the inductor current during half of a switching period as shown in Fig. 3. The output power of the 3ph-DAB converter using the Y-Y windings can be expressed as (5).

그림입니다.
원본 그림의 이름: CLP00002b4c0005.bmp
원본 그림의 크기: 가로 1311pixel, 세로 168pixel         (5)

The coupling inductance can be calculated by (5). A 20% margin of the output power is generally considered to design the coupling inductance [16], [17]. The coupling inductance is related to the losses. If the coupling inductance is too small, high switching losses occur under the light load condition. In addition, the current variations are very sensitive resulting in imbalance-leg currents. However, the use of a calculated coupling inductance based on the maximum power without a margin increases the RMS current. Therefore, when choosing the coupling inductance, a balance between the switching loss and the conduction loss should be considered.



Ⅲ. CONTROLLER DESIGN


A. Analysis of the Small-Signal Model

A SSM analysis is important in the design of a controller to improve the stability and dynamics of the converter. The simplified SSM of a 3ph-DAB converter was first analyzed to reduce the imbalance of the winding current for a transformer [9]. However, the ESR zero of the output capacitor was not considered to derive the control-to-output voltage transfer function in [9]. A simplified model considering the ESR zero of the output capacitor can be derived by using an existing simplified model. It is assumed that the 3-phase voltage and current are well balanced and that the power flows in the forward direction. A fundamental waveform of the 3ph-DAB converter is shown in Fig. 3.

The capacitor voltage is only used as a state variable to obtain a simplified SSM with the ESR zero of the output capacitor. Using Fig. 2 and Fig. 3, the voltage differential equations can be expressed as follows:

그림입니다.
원본 그림의 이름: CLP00002b4c0006.bmp
원본 그림의 크기: 가로 497pixel, 세로 153pixel                         (6)

그림입니다.
원본 그림의 이름: CLP00002b4c0007.bmp
원본 그림의 크기: 가로 850pixel, 세로 225pixel          (7)

where Vc is the capacitor voltage, is is the secondary current, Co is the output capacitor, rc is the equivalent series resistor of the output capacitor, and RL is the output resistor. The secondary current is divided into two modes and the detailed derivation procedure was presented in [9]. In the derivation process, it is assumed that the output voltage is almost equal to the capacitor voltage, VoVc.

The control-to-output voltage transfer function with the ESR zero of the output capacitor is expressed as follows:

그림입니다.
원본 그림의 이름: CLP00002b4c0008.bmp
원본 그림의 크기: 가로 1394pixel, 세로 380pixel      (8)

그림입니다.
원본 그림의 이름: CLP00002b4c0009.bmp
원본 그림의 크기: 가로 1290pixel, 세로 218pixel

where Vi is the input voltage, s is the Laplace operator, kvd,z is the gain of the transfer function, vd,z is the single-zero, and vd,p is the single-pole. A comparison of the control-to-output voltage transfer function between the theoretical model and the empirical model is shown in Fig. 6. The blue line shows a Bode-plot of the theoretical model using (8) and Table I. The red line shows empirical data using simulation software (PSIM) with the same parameters. The model error of the simplified model in the high-frequency region is caused by inductor dynamics since the simplified model considers only the output capacitor with the ESR zero as the state variable. However, the simplified model is accurate to show the effect of the ESR zero of the output capacitor within the Nyquist frequency, which is the blue line shown in Fig. 6. The model error is not significant to design its controller because all of the dynamics of the converter are discussed within the Nyquist frequency. The 3ph-DAB converter has a single pole located in the low-frequency region and an ESR zero of the output capacitor located in the high-frequency region.


TABLE I DESIGN SPECIFICATIONS

Output Power, Po

5 kW

Input Voltage, Vi

500 V

Output Voltage, Vo

252 V

Switching Frequency, fs

15 kHz

Output Capacitance, Co

1.4 mF

Phase Shift, φ

0˚< φ < 56˚

Coupling Inductance, L

240 uH

Turn ratio, N2/N1

0.5

Turn Number, N1

20 turns

ESR of Capacitor, rc

0.05 Ω

Output Resistor, RL

12.7 Ω


그림입니다.
원본 그림의 이름: image14.jpeg
원본 그림의 크기: 가로 696pixel, 세로 479pixel

Fig. 6. Control-to-output voltage transfer function of a three- phase DAB converter from 0 Hz to 100 kHz.


The magnitude and phase change of the control-to-output voltage transfer function with increments of the output capacitance are shown in Fig. 7. For high-power applications, the output capacitance should be increased to reduce output voltage ripple and to suppress power fluctuations. However, a higher output capacitance makes the converter dynamics slower than the case of a lower output capacitance. The crossover frequency moves to the low-frequency region as the output capacitance increases. A low crossover frequency improves the stability. However, it makes the transient performance poor. If the ESR zero of the output capacitor is not compensated, the magnitude of the control-to-output voltage transfer function shows a 0 dB/decade slope after the ESR zero. This reduced damping in the high-frequency region makes the system weaker against disturbances and noise. Therefore, the ESR zero of the output capacitor should be compensated by the desired lead-lag controller.


그림입니다.
원본 그림의 이름: image17.jpeg
원본 그림의 크기: 가로 699pixel, 세로 473pixel

Fig. 7. Magnitude and phase Bode plots of a transfer function according to output capacitance increments.


B. Controller Design

A PI controller is typically used for the 3ph-DAB converter. However, they cannot compensate for the output capacitor’s ESR zero in the control-to-output voltage transfer function. A 2-pole 1-zero (2P1Z) controller with an additional pole, which can compensate the ESR zero, is presented and compared with the PI controller. Each controller was designed by using the k-factor approach [13-14]. The transfer function of the PI controller can be expressed as follows:

그림입니다.
원본 그림의 이름: CLP00002b4c000a.bmp
원본 그림의 크기: 가로 778pixel, 세로 313pixel                     (9)

where kpi is the gain of the PI controller and ωpi,z is the single zero. The PI controller consists of a pole at the origin and a single zero. The closed-loop gain of the converter with a PI controller is shown in Fig. 8. The red line shows the high crossover frequency case, which can be oscillated by external disturbances and noises. As shown in Fig. 6, the control- to-output voltage transfer function of the empirical model has a phase-drop due to the double pole at the switching frequency. Therefore, to guarantee stability, the crossover frequency should be less than 1 kHz. The blue line shows the low crossover frequency case, which can show slow dynamics and a high overshoot. Therefore, the yellow line design is selected to achieve a balance between the performance and stable operation of the PI controller. In this design, the crossover frequency is set to 400 Hz and the single zero is placed at 35 Hz.


그림입니다.
원본 그림의 이름: image18.jpeg
원본 그림의 크기: 가로 700pixel, 세로 458pixel

Fig. 8. Closed-loop gain with a PI controller.


The ESR zero of the output capacitor has a magnitude of 0 dB/decade slope in the high-frequency range, which makes the converter sensitive to high-frequency disturbances and noise. For the desired performance of the feedback control, the controller is required to compensate for the poles and zeros of the loop gain of the converter, which should have a -20 dB/decade slope of the Bode plot’s magnitude in all of the frequency regions [15].

The transfer function of the 2P1Z controller can be expressed as follows:

그림입니다.
원본 그림의 이름: CLP00002b4c000b.bmp
원본 그림의 크기: 가로 925pixel, 세로 329pixel             (10)

where k2p1z is the gain of the 2P1Z controller, and ω2p1z,z and ω2p1z,p are the single zero and the pole of the controller, respectively. Unlike the PI controller, the 2P1Z controller consists of a pole at the origin, and a single zero and a single pole, which can compensate the ESR zero of the output capacitor. The closed-loop gain of the 2P1Z controller is shown in Fig. 9. The crossover frequency is divided into three cases similar to the PI controller. The red line represents the case of a high crossover frequency, which can be affected by an external disturbance with a phase collapse. The blue line indicates the low crossover frequency case, which has slow dynamics and a high overshoot in the transient response. Therefore, the yellow line is chosen as the desired control point. The crossover frequency is selected at 650 Hz. The pole and zero frequencies are located at 1.485 kHz and 11.37 Hz, respectively. The slope of the Bode plot’s magnitude has a -20 dB /decade due to the compensation of the ESR zero of the output capacitor by the single pole of the 2P1Z controller.


그림입니다.
원본 그림의 이름: image22.jpeg
원본 그림의 크기: 가로 711pixel, 세로 465pixel

Fig. 9. Closed-loop gain with a 2P1Z controller.


C. Output Impedance Analysis

The load current-to-output voltage transfer function under the open-loop condition can be expressed as follows [13]:

 그림입니다.
원본 그림의 이름: CLP00002544000e.bmp
원본 그림의 크기: 가로 1069pixel, 세로 713pixel                (11)

where kp is the gain of the transfer function, z1 and z2 are the single zero, o is the double pole, Q is the quality factor, and rl is the ESR of the inductance. Using (11), the output impedance for each of the controllers can be expressed as follows:

그림입니다.
원본 그림의 이름: CLP00002544000d.bmp
원본 그림의 크기: 가로 933pixel, 세로 420pixel              (12)

where Zo,PI and Zo,2P1Z are the output impedance of each controller, and Tm,PI and Tm,2P1Z are the closed-loop gain of each controller. Each output impedance in the s-domain is shown in Fig. 10, where the blue line is the output impedance using the 2P1Z controller and the red line is that of the PI controller. Since the peak value of the 2P1Z controller is smaller than that of the PI controller, the 2P1Z controller can further suppress disturbance.


그림입니다.
원본 그림의 이름: image23.jpeg
원본 그림의 크기: 가로 674pixel, 세로 457pixel

Fig. 10. Comparison of the output impedances using a PI and a 2P1Z controller in the s-domain.


The theoretical transient performance for each of the controllers in the time-domain with changes in step load change from 7 A to 14 A is shown in Fig. 11, where the red line represents the output voltage using the PI controller and the blue line represents the output voltage using the 2P1Z controller. The output voltage for each of the controllers in the time-domain can be expressed theoretically as follows:


그림입니다.
원본 그림의 이름: image25.jpeg
원본 그림의 크기: 가로 633pixel, 세로 472pixel

Fig. 11. Comparison of the transient performance using a PI and a 2P1Z controller in the time-domain.


그림입니다.
원본 그림의 이름: CLP00002544000c.bmp
원본 그림의 크기: 가로 2039pixel, 세로 435pixel     (13)

where Vo,2p1z is the output voltage using the 2P1Z controller, Istep is set to 7 A, and Vo,pi is the output voltage using the PI controller in the time-domain. This can be obtained by using the Inverse Laplace Transform from (8), (9), (10) and TABLE I. In (12), the undershoot using the 2P1Z controller is about -14.2 V, and the PI controller is expected to be about -19.6 V. In addition, the settling time of the 2P1Z controller is expected to be faster than that of the PI controller. The settling time of the 2P1Z controller is expected to be within 7.71 msec, and that of the PI controller is expected to be within 13.3 msec. A comparison of the undershoot and settling time for each of the controllers is presented in Table II. It can be seen that the transient response of the 2P1Z controller is faster than that of the PI controller. The transient performance expected by the theoretical analysis will be verified with experimental results in the next section.


TABLE II PERFORMANCE COMPARISON

 

Undershoot

Settling time

Theoretical

Experiment

Theoretical

Experiment

PI

360.4 V

362 V

13.3 msec

15 msec

2P1Z

365.8 V

366 V

7.71 msec

9 msec



Ⅳ. Experimental Results

A 5-kW prototype 3ph-DAB converter is shown in Fig. 12. The 3ph-DAB converter consists of three IGBT modules, three inductors, input and output capacitors, a three-phase transformer based on a nanocrystalline toroidal core, TC- 805024-1, and a DSP control board. The detail specifications of the converter are shown in Table I. The inductance and the turn number of the transformer can be obtained from (4) and (5). Experimental waveforms during steady-state operation using the proposed 2P1Z controller are shown in Fig. 13. The phase between the primary and the secondary side is shifted from 0° to 56° according to load variations. The larger load induces a larger phase shift, and vice versa. The output voltage is well regulated to 252 V. The RMS inductor current at the full load conditions is measured at around 9 A, which was predicted in the theoretical analysis shown in Fig. 4. A comparison of the performance between PI and 2P1Z controllers is shown in Fig. 14. The undershoot of the output voltage using a 2P1Z controller is measured at around -14 V under a step load change from 7 A to 14 A while that of the PI controller is measured at around -18 V. The settling time of the 2P1Z controller is 9 msec while that of the PI controller is 15msec. These results show improved performance in terms of the power converter’s dynamics when the 2P1Z controller is applied since it has a high crossover frequency. The undershoot error between the theoretical expectation and the experimental measurement is around 0.3 %, and the settling time error is around 1.3 msec and 5.361 msec for each of the controllers. These errors were caused by model errors and unexpected impedances of the converter, power source and electric load, etc. Bi-directional experimental results using a 2P1Z controller are shown in Fig. 15. A step load change from 7A to -7A can be achieved with the same control gain. Efficiency curves with a PI controller and a 2P1Z controller are shown in Fig. 16. The efficiency is at its highest at about 92 % under the 2.5 kW load condition. Efficiency under the light load condition is lower than that under the full load condition since the switching loss is at its highest under the light load condition. The efficiency of the proposed converter using a 2P1Z controller is similar to that of the conventional PI controller.


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Fig. 12. 5 kW prototype of the three-phase DAB converter.


Fig. 13. Experimental waveforms during steady-state operation: (a) 500 W; (b) 1.5 kW; (c) 3.5 kW; (d) 5 kW.

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(a)

 

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(d)


Fig. 14. Comparison of the controller performance: (a) PI controller (7Aà14A); (b) 2P1Z controller (7Aà14A).

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Fig. 15. Bi-directional experimental waveform (3.5 kW à -3.5 kW).


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Fig. 16. Efficiency graphs of the proposed converter using a PI and a 2P1Z controller.



V. CONCLUSIONS

A practical design methodology for a 3ph-DAB converter is proposed with a mathematical analysis. In addition, a lead-lag controller with two poles and a single zero is proposed to compensate for the effects of the ESR zero of the output capacitor based on an analysis of a simplified small-signal model considering the ESR zero of the output capacitor. Because the impact of the ESR zero of the output capacitor is increased by a high capacitance, the converter can be easily affected by disturbances if the effect of the ESR zero of the output capacitor is not properly compensated. The accuracy of the small-signal model including the ESR zero of the output capacitor is verified by using simulation results. Experimental results using a 5-kW prototype 3ph-DAB converter show that the undershoot is improved by about 4 V and that the settling time is 6 msec when using the 2P1Z controller. It is verified that the proposed 2P1Z controller has a faster dynamic performance than the conventional PI controller without any additional cost. A bi-directional test can be achieved with the same control gain. The efficiency with two controllers is almost same since this is determined by the power stage design.



ACKNOWLEDGMENT

This research was supported by the KEPCO under the project entitled by “Demonstration Study for Low Voltage Direct Current Distribution Network in an Island.” (No. D3080)



REFERENCES

[1] H.-J. Choi and J.-H. Jung, “Practical design of dual active bridge converter as isolated bi-directional power interface for solid state transformer applications,” J. Electr. Eng. Tech., Vol.11, No.5, pp.1266-1273, Sep. 2016.

[2] D.-K. Jeong, M.-H. Ryu, H.-G. Kim, and H.-J. Kim, “Optimized design of bi-directional dual active bridge converter for low-voltage battery charger,” J. Power Electron., Vol. 14, No. 3, pp.468-477, May 2014.

[3] Y. Yao, S. Xu, W. Sun, and S. Lu, “A novel compensator for eliminating DC magnetizing current bias in hybrid modulated dual active bridge converters,” J. Power Electron., Vol. 16, No. 5, pp. 1650-1660, Sep. 2016.

[4] S. P. Engel, N. Soltau, H. Stagge, and R. W. De Doncker, “Improved instantaneous current control for high-power three-phase dual-active bridge DC–DC converters,” IEEE Trans. Power Electron., Vol. 29, No. 8, pp. 4067-4077, Aug. 2014.

[5] H. J. Choi and J. H. Jung, “Enhanced power line communication strategy for DC microgrids using switching frequency modulation of power converters,” IEEE Trans. Power Electron., Vol. 32, No. 6, pp. 4140-4144, Jun. 2017.

[6] R. W. A. A. De Doncker, D. M. Divan and M. H. Kheraluwala, “A three-phase soft-switched high-power- density DC/DC converter for high-power applications,” IEEE Trans. Ind. Appl., Vol. 27, No. 1, pp. 63-73, Jan./Feb. 1991.

[7] J. Hu, N. Soltau and R. W. De Doncker, “Asymmetrical duty-cycle control of three-phase dual-active bridge converter for soft-switching range extension,” 2016 IEEE Energy Conversion Congress and Exposition (ECCE), pp. 1-8, 2016.

[8] Y. Lee, G. Vakil, A. J. Watson and P. W. Wheeler, “An analytical modeling and estimating losses of power semiconductors in a three-phase dual active bridge converter for MVDC grids,” 2017 IEEE Power and Energy Conference at Illinois (PECI), pp. 1-8, 2017.

[9] S. P. Engel, N. Soltau, H. Stagge and R. W. De Doncker, “Dynamic and balanced control of three-phase high-power dual-active bridge DC–DC converters in DC-grid applications,” IEEE Trans. Power Electron., Vol. 28, No. 4, pp. 1880-1889, Apr. 2013.

[10] N. Baars, J. Everts, K. Wijnands, and E. Lomonova, “Impact of different transformer-winding configurations on the performance of a three-phase dual active bridge DC-DC converter,” 2015 IEEE Energy Conversion Congress and Exposition (ECCE), pp. 637-644, 2015.

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[12] G. G. Oggier, G. O. GarcÍa and A. R. Oliva, “Switching control strategy to minimize dual active bridge converter losses,” IEEE Trans. Power Electron., Vol. 24, No. 7, pp. 1826-1838, Jul. 2009.

[13] C. Basso, Designing Control Loops for Linear and Switching Power Supplies: A Tutorial Guide, 2015.

[14] H. D. Venable, “The k-factor: A new mathematical tool for stability analysis and synthesis,” in Proc. Powercon, Vol. 10, pp. H1–1, 1983.

[15] B.-C. Choi, Pulse Width Modulated DC-to-DC Power Conversion: Circuits, Dynamics, and Control Designs, Wiley-IEEE Press, pp. 311-454, 2013.

[16] A. Rodríguez, A. Vázquez, D. G. Lamar, M. M. Hernando and J. Sebastián, “different purpose design strategies and techniques to improve the performance of a dual active bridge with phase-shift control,” IEEE Trans. Power Electron., Vol. 30, No. 2, pp. 790-804, Feb. 2015.

[17] J. Hiltunen, V. Vaisanen, R. Juntunen, and P. Silventoinen, “Variable frequency phase shift modulation of a dual active bridge converter,” IEEE Trans. Power Electron., Vol. 30, No. 12, pp. 7138-7148, Dec. 2015.



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Won-Bin Lee was born in Gumi, Korea, in 1991. He received his B.S. degree in Control and Instrument Engineering from Hanbat National University, Deajeon, Korea, in 2016; and his M.S. degree in Electrical Engineering from the Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea, in 2018. He is presently working at LG Electronics, Korea. His current research interests include DC microgrids, bi-directional DC-DC converters, cascaded converters, modeling and controller design.


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Hyun-Jun Choi was born in Busan, Korea, in 1989. He received his B.S. degree from the Seoul National University of Science and Technology, Seoul, Korea, in 2013. He is presently working towards his Ph.D. degree in the School of Electrical Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea. His current research interests include DC microgrids, bi-directional converters, and the digital control algorithms of bi-directional power flows.


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Young-Pyo Cho received his B.S. and M.S. degrees in Electrical and Electronic Engineering from Korea University, Seoul, Korea, in 2010 and 2012, respectively. He joined the Korea Electric Power Research Institute, KEPCO, Daejeon, Korea, in 2015. His current research interests include the power electronics systems of DC distribution systems.


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Myung-Hyo Ryu received his M.S. and Ph.D. degrees in Electrical Engineering from Kyungpook National University, Daegu, Korea, in 1999 and 2015, respectively. From 2000 to 2002, he was a Research Engineer with the SMPS Development Division, Samsung Electro-Mechanics Co. Ltd., Suwon, Korea. Since 2002, he has been working as a Principal Researcher with the HVDC Research Division, Korea Electrotechnology Research Institute (KERI), Changwon, Korea. His current research interests include the power converters for low voltage DC distribution systems, solid state transformers, and the analysis, modeling, design and control of contactless power supplies and battery chargers.


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Jee-Hoon Jung was born in Suwon, Korea, in 1977. He received his B.S., M.S. and Ph.D. degrees from the Pohang University of Science and Technology (POSTECH), Pohang, Korea, in 2000, 2002 and 2006, respectively. From 2006 to 2009, he was a Senior Research Engineer in the Digital Printing Division, Samsung Electronics Co. Ltd., Suwon, Korea. From 2009 to 2010, he was a Postdoctoral Research Associate in the Department of Electrical and Computer Engineering, Texas A&M University of Qatar, Doha, Qatar. From 2011 to 2012, he was a Senior Researcher in the HVDC Research Division, KERI, Changwon, Korea. Since 2013, he has been a Faculty Member in the School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea, where he is presently working as an Associate Professor. His current research interests include DC-DC converters, switched-mode power supplies, power control algorithms, high density power conversion, wireless power transfer, and real-time and power HIL simulations of smart grid systems and renewable energy sources.