https://doi.org/10.6113/JPE.2019.19.1.278

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

EMI Prediction and Reduction of Zero-Crossing Noise in Totem-Pole Bridgeless PFC Converters

Baihua Zhang^†, Qiang Lin^*, Jun Imaoka^**, Masahito Shoyama^*, Satoshi Tomioka^***, and Eiji Takegami^***

^†,*Graduate School of Information Science and Electrical Engineering, Kyushu University, Fukuoka, Japan

^**Graduate School of Engineering, Nagoya University, Nagoya, Japan

^***Technology Development Department, TDK-Lambda Corporation, Niigata, Japan

ABSTRACT

In this study, a zero-crossing spike current issue in a totem-pole bridgeless power factor correction (PFC) converter is comprehensively investigated for the first time. Spike current occurs when input voltage crosses zero, becomes a noise source, and causes severe common mode emission issues. A generation mechanism for electromagnetic interference (EMI) is presented to investigate the EMI problem caused by zero-crossing issue, and a noise spectrum due to this issue is predicted by a theoretical analysis based on the Fourier coefficient of an approximate spike current waveform. Furthermore, a noise reduction method is proposed and then improved to reduce the spike current. Experimental measurements are implemented on a GaN-based totem-pole bridgeless PFC converter, and the spike current can be effectively suppressed through the proposed method. Furthermore, the noise spectrums measured without and with the reduced zero-crossing spike current are compared. Experimental results validate the analysis of the noise spectrum caused by the zero-crossing spike current issue.

Key words: Conducted noise, Noise spectrum, Spike current, Totem-pole bridgeless PFC converter, Zero-crossing

Manuscript received Apr. 24, 2018; accepted Oct. 23, 2018

Recommended for publication by Associate Editor Kyo-Beum Lee.

^†Corresponding Author: bzhang@ckt.ees.kyushu-u.ac.jp Tel: +81-092-802-3704, Fax: +81-092-802-3703, Kyushu University

^*Graduate School of Information Science and Electrical Eng., Kyushu University, Japan

^**Graduate School of Engineering, Nagoya University, Japan

^***Technology Development Dept., TDK-Lambda Corporation, Japan

Ⅰ. INTRODUCTION

In numerous AC–DC power conversion systems, a power factor correction (PFC) converter is extensively recognized as an essential unit for improving power factor, reducing harmonic, enhancing power quality, and facilitating the compliance of products to international standards. In general applications, PFC boost converters are located after a diode bridge. However, with the increase in awareness of energy-saving and CO₂ emission reduction, an improvement in the efficiency of conventional PFC converters has been considered. Several bridgeless PFC converters with removed diode bridge are proposed to eliminate its conduction loss and improve efficiency [1]-[6].

Compared with other bridgeless PFC converters, a totem- pole bridgeless PFC converter has a simple topology and uses the least number of components, as illustrated in Fig. 1, thereby attracting considerable attention. However, this converter becomes unsatisfactory given the following severe problems: 1) a slow reverse-recovery performance of conventional MOSFET switches, thus rendering the work at a continuous conduction mode (CCM) impractical; 2) a poor electromagnetic interference (EMI) performance requires additional filter components to comply with industry regulations.

Fig. 1. Totem-pole bridgeless PFC converter.

As previously mentioned, a reverse recovery of a body diode of MOSFET switches contributes to the impractical operation of this converter in the CCM. A pseudo-totem-pole bridgeless PFC converter is proposed (Fig. 2) to solve this problem. A fast switching leg is divided into two legs, with an additional diode at each leg to solve the reverse-recovery issue of the body diode. This converter has an identical operation with the totem-pole bridgeless PFC converter, and the modification of the topology facilitates the possible use of MOSFET switches. However, the pseudo totem-pole bridgeless PFC converter uses two more diodes and one more inductor than the original topology, and each inductor only works at one half-line cycle [6]. This phenomenon eliminates the advantage of the totem-pole bridgeless PFC converter in using the least number of components.

Fig. 2. Pseudo totem-pole bridgeless PFC converter.

A gallium nitride high-electron mobility transistor (GaN HEMT) is a wide bandgap semiconductor device that offers more advanced characteristics than conventional Si devices. GaN devices have advantages, such as low switching loss, capacitance, and Q_rr, thus enabling high switching frequency, high efficiency, and compact power conversion systems [7]-[11]. The comparison of TO-220-package CoolMOS and GaN HEMT is presented in Table I [12], [13], which shows that the GaN HEMT has a much lower reverse recovery charge than Si switches, thereby facilitating the possible operation of a totem-pole bridgeless PFC converter under the CCM. Therefore, the aforementioned problem (1) can be solved by using the GaN HEMT. However, the EMI issue (2) still remains.

TABLE I COMPARISON OF GAN AND SI DEVICES

Parameter	TPH3006PS	IPP60R190C6
ID	17 A	20.2 A
Ron	150 mΩ	170 mΩ
Qg	6.2 nC	63 nC
Qrr	54 nC	6900 nC

In general pulse width modulation converters, the switching operations associated with high dv/dt and di/dt result in a remarkable contribution to the EMI spectrum at the fundamental switching frequency and its harmonics [14]. Numerous works have been conducted to solve EMI problems in conventional bridge-type PFC converters; these works include but are not limited to balance technique, parasitic capacitance cancellation, and EMI filter design [15]-[18].

However, bridgeless PFC converters generally create additional noise and aggravate the EMI problem [1]-[3], [19]. The essence of the bridgeless PFC converters is that two combined boost converters work at different input voltage half-line cycles, and these converters may share several devices to reduce the number of total components of the converter. Problems constantly occur during the negative half-line cycle given the structure of a bridgeless topology. For example, in a dual-boost PFC converter, the output ground is only connected with the AC side during the positive half-line cycle, whereas a pulsating voltage occurs between the output ground and AC side during the negative half-line cycle and causes a severe common mode (CM) noise [1]. The EMI problems in the bridgeless PFC converter family are recently gaining considerable attention. The voltage waveforms between the AC side and output ground of several bridgeless PFC converters are evaluated to discuss the EMI performance, which indicates the essential conducted noise issue of the bridgeless PFC converter family [2]. In addition, on the basis of the CM voltage mitigation performance, the topologies of bridgeless PFC converters are classified into four groups, including electrical isolation, semiconductor clamped, passive component clamped, and hybrid clamped, and the EMI issues and mitigation methods of bridgeless PFC converters are comprehensively introduced [6]. Many other methods, such as interleaving technique, frequency dithering, and symmetry and balance techniques, have been proposed to solve the EMI issues in bridgeless PFC converters [20]-[22].

In the totem-pole bridgeless PFC converter, the problem differs from the aforementioned ones. A specific EMI issue indicates that a spike current occurs at every input voltage zero-crossing and becomes an obstacle for applying this efficient converter [23]-[27].

The zero-crossing issue is described in [23]-[26]; that is, when the polarity changes at every input voltage zero- crossing, the voltage change in the diodes (D₁ and D₂) at a low-frequency switching leg causes the occurrence of a spike current, which is a severe conducted CM noise source. Literature [24] mentions that the spike current issue causes the EMI in the sampling, control, and driving circuits, thereby possibly leading to the destruction of a converter. A utility model is proposed to adopt a series of isolation circuits in the totem-pole bridgeless PFC converter to avoid the problems caused by EMI; however, the zero-crossing spike current issue has not been solved essentially.

By improving the control scheme near zero-crossing, several methods have been proposed to solve the zero-crossing spike current issue. For example, a soft start is proposed to gradually increase the duty ratio of high-frequency switches (Q₁ and Q₂) after every zero-crossing to suppress the current peak, thus further suppressing the CM noise [25], [26]. Similarly, a soft transition is achieved to maintain the main switches (Q₁ and Q₂) in the high-frequency switching leg at a small duty ratio to limit current peak after zero-crossing [27]. The spike current can only be reduced by the aforementioned methods but not completely eliminated. The spectrum of a conducted noise caused by the zero-crossing spike current issue has not been addressed accordingly in the aforementioned studies; this spectrum is essential for solving this issue. The study of the conducted noise spectrum caused by the zero-crossing spike current issue helps engineers to possibly avoid trial and error at the design stage. Therefore, the spectrum caused by the spike current issue and other methods must be further investigated.

The remainder of this paper is organized as follows. Section II analyzes the generation mechanism of a zero-crossing issue compared with the switching noise. The conducted noise spectrum caused by this issue is also discussed and calculated on the basis of the approximate spike current waveform in Section III. In Section IV, on the basis of an analysis, a method for suppressing spike current and solving the zero-crossing issue is proposed and then improved. The experimental measurements are achieved on a GaN-based totem-pole bridgeless PFC converter, and the experimental results are obtained under the following conditions: 230 V AC input, 390 V DC output, and 50 kHz switching frequency. Finally, the conclusions drawn from this study are summarized in Section V.

Ⅱ. ANALYSIS OF THE ZERO-CROSSING NOISE ISSUE

A. Generation Mechanism

The totem-pole bridgeless PFC converter, which can be regarded as two boost converters that share an inductor and switches, is depicted in Fig. 1. In Fig. 3, the boost converters work at different AC input cycles. During positive AC input cycle L, Q₁ (Q₂) and D₁ compose a boost converter, whereas L, Q₂ (Q₁), and D₂ compose the other one during the negative cycle.

Fig. 3. Totem-pole bridgeless PFC converter: (a) Control scheme; (b)-(c) Positive cycle; (d)-(e) Negative cycle.

For each boost converter, the output voltage V_o can be represented by duty ratio D and input voltage V_in, as expressed in Equ. (1), and then D can be expressed in Equ. (2). At every zero-crossing, given that sin(ωt) is approximately 0, the duty ratio of one boost converter is nearly 100%, whereas the other one is approximately 0. Therefore, the duty ratio D of the main switches Q₁₍₂₎ abruptly change from 0% to 100% or from 100% to 0% at every zero-crossing, along with the change in input voltage polarity [25], [26].

                              (1)

           (2)

In Fig. 3, during the input voltage positive cycle, the frame ground (FG) connects with the output ground; during the negative cycle, the FG connects with the output DC bus, thus indicating that the voltage between the FG and the output ground changes abruptly from 0 to V_o or V_o to 0 at every input voltage zero-crossing. Moreover, while the ON-states of diode D₁ and D₂ alternate at zero-crossing, the voltage across D₁₍₂₎ changes rapidly from 0 to V_o or V_o to 0 as demonstrated in Fig. 3 and acts as a severe zero-crossing noise source.

B. Switching Noise Modeling

Fig. 4(a) displays an example of a switching noise propagation path considering the parasitic capacitor C_p of a switch. The high-frequency turn-on and turn-off actions of the main switches Q₁₍₂₎ generate a high-voltage change dv/dt and become a noise source. The noise current starts from the switch Q₁ and flows into a line impedance stabilization network (LISN) through the parasitic capacitor C_p. Given the equivalent circuit exhibited in Fig. 4(b), the FG capacitor C_fg is paralleled with the noise source and acts as a Y-capacitor to provide a low-impedance propagation for switching noise and then reduce the CM noise that flows to the LISN.

Fig. 4. Switching noise modeling: (a) Noise propagation path; (b) Equivalent circuit.

(a)

(b)

C. Zero-crossing Noise Modeling

Fig. 5(a) presents the noise propagation path of the zero- crossing noise. As previously mentioned, the voltage across D₁₍₂₎ (S_D1(2)) acts as a noise source. In Fig. 3, the voltage across D₁ (S_D1) is a square waveform with the amplitude of the output voltage V_o and has the same frequency with an input voltage. The noise source is expressed as V_{N_zc} in the equivalent circuit illustrated in Fig. 5(b). Compared with the switching noise equivalent circuit depicted in Fig. 4(b), the FG capacitor C_fg in the zero-crossing noise equivalent circuit is in series with the noise source, which even aggravates the zero-crossing noise.

Fig. 5. Zero-crossing noise modeling: (a) Noise propagation path; (b) Equivalent circuit; (c) Equivalent circuit with parasitic components.

(a)

(b)

(c)

The equivalent circuit with consideration of parasitic components is demonstrated in Fig. 5(c), where the noise source V_{N_zc} and other components notably compose an RLC resonance loop. Fig. 6 exhibits the simulation result of the equivalent circuit displayed in Fig. 5(c), thereby indicating that the spike current occurs at every input voltage frequency with the amplitude of more than 10 A. Clearly, the amplitude of the spike current related to the L and C components in the resonance loop; this amplitude is also associated with the amplitude of V_{N_zc}, which is the noise source. However, based on the preceding analysis, the amplitude of V_{N_zc} is equal to the output voltage of the converter; this amplitude is typically in the range of 380–400 V in PFC boost applications. Therefore, the L and C components are the only critical variable parameters that affect the amplitude of the spike current.

Fig. 6. Zero-crossing spike current I_fg simulation waveform.

The experimental measurements are achieved on a GaN- based totem-pole bridgeless PFC converter. The switch devices and parameters of other components are listed in Tables II and III, correspondingly. The diodes in the low-frequency switching leg are replaced by two low on-resistance MOSFETs to further improve the efficiency. The experimentally measured I_fg waveform, which is consistent with the analysis and simulation results, is displayed in Fig. 7. The spike current, which occurs at every input voltage zero-crossing and has an amplitude of 14 A, is considered a severe CM noise source in the totem-pole bridgeless PFC converter.

TABLE II Device Parameters

GaN HEMTs	Q1&Q2	TPH3006PS
MOSFETs	SD1&SD2	IPA60R099C

TABLE III Circuit Parameters

Parameter	Symbol	Value
Input voltage	Vin	230 V
Output voltage	Vo	390 V
Switching frequency	fs	50 kHz
Load (resistor)	R	400 Ω
Inductor	L	1.3 mH
Common mode choke	LCMC	2.2 mH
X-capacitor	Cx1&Cx2	0.47 μF
Y-capacitor	Cy1&Cy2	1 nF
Frame ground capacitor	Cfg	1 nF

Fig. 7. Experimental waveform of zero-crossing spike current I_fg.

Ⅲ. ANALYSIS OF THE ZERO-CROSSING NOISE SPECTRUM

The generation mechanism of a zero-crossing spike current is analyzed in the last section. The evaluation of the conducted noise spectrum caused by the zero-crossing spike current issue is essential for further solving this problem. The conducted noise spectrum caused by the zero-crossing spike current issue can be calculated using Equ. (3). The spike current I_fg, which is a CM noise, flows through the FG via C_fg and is finally picked up by two paralleled 50 Ohm resistors in the LISN.

                     (3)

            (4)

The I_fg current waveform is approximated in accordance with the experimental measurement and expressed in Equ. (4), as plotted in Fig. 8. T is the period of the input voltage (1/50 Hz), and T₀ (= 1 / f₀ = 2π / ω₀) and A are the period and amplitude of the spike current I_fg, respectively.

Fig. 8. Approximate zero-crossing spike current I_fg waveform.

The Fourier coefficient C_n of the spike current can be calculated using Equ. (5) to transform the I_fg representation from time domain to frequency domain, and the final calculation result is expressed in Equ. (6) [23]. The coefficient C_n(=|C_n|e^jφn) contains information of the phase and amplitude spectrum of the spike current. The amplitude spectrum can be obtained by calculating the absolute value of the coefficient C_n. Given that the I_fg is a CM current and picked up by two paralleled 50 Ohm resistors in the LISN, the conducted noise spectrum caused by I_fg can be calculated using Equs. (7)-(8), and the calculated noise spectrum is presented in Fig. 9. The conducted CM noise spectrum due to I_fg covers the entire range of standard conducted EMI limit (150 kHz to 30 MHz) and reaches the peak value of approximately 78 dB at 15 MHz, which is the frequency of the spike current I_fg, and then starts to attenuate. The predicted conducted noise is consistent with the experimental measurement result illustrated in Fig. 10. Therefore, the zero-crossing issue causes the conducted noise from a low frequency to over 10 MHz with no attenuation and reaches a peak value at a high-frequency range, which is similar to the frequency of the spike current I_fg.

                        (5)

     (6)

                                (7)

                   (8)

The experimental result depicted in Fig. 10 is the sum of spectra of several noise components, and these spectra caused by various noise components dominate at different frequency ranges. The conducted noise spectrum caused by zero- crossing is only one of these components. By comparing the calculated and measured noise spectra, determining the presence of other dominant noise components in a low- frequency range is simple. Moreover, the noise spectrum of the zero-crossing issue is covered by the spectrum of other components in a low-frequency range. The experimental measurements between the noise spectrum with and without zero-crossing noise must be compared to validate the analysis of the noise spectra due to the zero-crossing issue.

Fig. 9. Calculated noise spectrum caused by zero-crossing spike current I_fg.

Fig. 10. Measured conducted noise spectrum (original).

Ⅳ. NOISE REDUCTION METHOD

In Section III, the analysis shows that the conducted noise spectrum caused by the zero-crossing spike current issue reaches a peak at the frequency of the spike current f₀ and then starts to attenuate. By further calculation of Equ. (6), the spectrum envelope curve is expressed in Equ. (9).

               (9)

In Equ. (9), the input voltage frequency f is a constant value. Therefore, the following two solutions are available to suppress the conducted noise caused by the spike current issue: 1) reducing the spike current peak A to decrease the peak of the spectrum; 2) reducing the spike current frequency f₀ results in the movement of the spectrum peak to a low- frequency range, thereby reducing the high-frequency range noise.

A. Additional Capacitors

As discussed in Section II, at every input voltage zero- crossing, the voltage V_SD1(2) (V_D1(2)) and V_cfg change abruptly, and V_SD1(2) (V_D1(2)) acts as a severe noise source. In addition, the generation mechanism of the zero-crossing spike current issue can be considered from a different perspective. The voltage change in V_SD1(2) or V_D1(2) is achieved by the charge and discharge of the parasitic capacitor C_p of the devices. Similarly, the voltage change in the FG capacitor C_fg is achieved by the charge and discharge of I_fg current. For example, when the polarity of input voltage changes from negative to positive, turning on the main switch Q₁ provides a propagation for inductor current to discharge the parasitic capacitor C_p of V_SD1 and FG capacitor C_fg; the current then flows into the LISN via C_fg, thereby resulting in the occurrence of spike current. Therefore, the parasitic capacitor C_p and FG capacitor C_fg are paralleled at zero-crossing. Given that the frequency of current I_fg can be expressed in Equ. (10), where C is the sum of loop capacitors, including C_fg, C_p, and C₁₍₂₎, increasing the value of C is considered a reduction method of the f₀. According to Equs. (11) and (12), increasing the value of C_fg reduces the frequency by times; however, the amplitude of spike current is increased by approximately times. In addition, C_fg works as a Y-capacitor in the converter, and a limitation of the capacitance of Y-capacitor is observed for leakage current consideration. Thus, increasing C_fg is an impractical choice. The addition of capacitors C₁₍₂₎ across the S_D1(2), which can be regarded as an increasing parasitic capacitor C_p, as depicted in Fig. 11, is proposed to decrease f₀ and further suppress the conducted noise as analyzed above.

                                   (10)

                      (11)

           (12)

Fig. 11. Totem-pole bridgeless PFC converter with additional capacitors.

The added capacitors also function as snubbers, and then the voltage change transition of S_D1(2) (D₁₍₂₎) becomes slow. The amplitude A of spike current I_fg can also be considerably suppressed through this method in accordance with Equ. (12). Based on Equs. (11) and (12), by comparing with the original value, the graph of the value of additional capacitors, spike current frequency f₀, and spike current peak value A can be drawn as demonstrated in Fig. 12. Notably, the 100 nF capacitor is the optimized choice, the spike current peak can be reduced to nearly 1 A, and the noise spectrum peak will move to a low-frequency range, thereby indicating that the high-frequency conducted noise can be suppressed.

Fig. 12. Value of additional capacitors and f₀ & A.

The experimental waveform after adding two 100 nF capacitors is plotted in Fig. 13, where the spike current I_fg is reduced from 14 A to 1 A. The measured spectrum is exhibited in Fig. 14, thus indicating that the high-frequency range noise can be considerably suppressed through this method as expected.

Fig. 13. Experimental I_fg waveform.

Fig. 14. Measured conducted noise spectrum (with additional C₁₍₂₎).

However, based on Equs. (11), (12), and Fig. 12, the A/f₀ is nearly a constant value with different values of additional capacitors, and reducing the spectrum peak through this method will be difficult. Moreover, adding extra-large capacitors to push the spectrum to the sufficiently low frequency to entirely below the standard is found to be impractical. The (dis-)charge current of additional large capacitors flows into the converter and becomes a differential mode (DM) noise. Therefore, the method for adding extra capacitors is ineffective for solving the zero-crossing spike current issue.

B. Additional Auxiliary Circuit

The addition of an auxiliary circuit in the converter, as displayed in Fig. 15, is proposed to improve the aforementioned method. The auxiliary circuit comprises an inductor L_a, bidirectional switches formed by S_a1(2) and D₃₍₄₎, and two additional capacitors as previously mentioned. The parameters of components in the auxiliary circuit are listed in Table IV.

Fig. 15. Totem-pole bridgeless PFC converter through the noise reduction method.

TABLE IV AUXILIARY CIRCUIT PARAMETERS

Parameter	Symbol	Value
Additional capacitor	C1&C2	100 nF
Auxiliary inductor	La	10 mH
Output capacitor	Co1&Co2	470 μF

In the control scheme and waveforms presented in Fig. 16 (a), after every zero-crossing, a dead time is inserted to stop the main switches Q₁ and Q₂. Simultaneously, on the basis of the polarity signal of the input voltage, two very short gate driving signals for switches S_a1(2) in an auxiliary circuit are generated by the control circuit illustrated in Fig. 16 (b), and the duration of the driving signals can be controlled by the value of the resistors and capacitors in the control circuit. Then, during the dead time after every zero-crossing, the auxiliary switch S_a1 (or S_a2) is turned on to provide a loop for added capacitors C₁₍₂₎ to resonate with the inductor L_a. Given the resonance during the turn-on period of S_a1(2) (and turn-off period of Q₁₍₂₎), the voltage across S_D1(2) (or D₁₍₂₎) and the V_fg (voltage between FG and output ground) gradually change. After the dead time when the switches Q₁₍₂₎ start to work, the voltage change in V_SD1(2) and V_fg is completed and then eliminates the occurrence of a spike current. The (dis-)charge current of additional capacitors will no longer flow into the main circuit, thereby indicating that the occurrence of DM noise after adding two capacitors can be suppressed. Therefore, the spike current can be completely suppressed, and the conducted CM noise caused by zero-crossing issue can be effectively suppressed by the proposed method.

Fig. 16. Control scheme and waveform of the proposed method: (a) Control scheme; (b) Control circuit of auxiliary circuit.

(a)

(b)

The experimental waveforms are plotted in Fig. 17, where the current I_fg is effectively suppressed to approximately 0. The conducted noise spectrum after adding an auxiliary circuit is demonstrated in Fig. 18 and compared with the previous method. Compared with the method of only adding extra capacitors C₁₍₂₎, the conducted noise at low-frequency range which is caused by the occurrence of DM noise after adding C_1(2), can be further suppressed. In Fig. 19, the calculated conducted noise spectrum displayed in Fig. 9 is evidently eliminated from the measured conducted noise spectrum as indicated by the comparison between the results of the original one with those of the proposed auxiliary circuit.

Fig. 17. Experimental waveform.

Fig. 18. Comparison of measured conducted noise.

Fig. 19. Comparison of the measured conducted noise.

The conducted noise caused by zero-crossing spike current can be effectively suppressed by the proposed noise reduction method. The extremely short turn-on time also guarantees that the proposed method does not deteriorate the efficiency of the converter.

The experiment results validate the analysis presented in Section III, that is, the conducted noise spectrum of the zero- crossing spike current issue, as illustrated in Fig. 9.

The conducted noise in the low-frequency range has high peaks at the multiples of the switching frequency (50 kHz). Thus, the DM noise caused by switching noise is the more dominant component than the CM noise in the low-frequency range. Furthermore, the peaks in the medium- and high- frequency ranges on the noise spectrum are caused by other resonances in the circuit. Therefore, even if the spike current noise is effectively suppressed, the existence of other noise components hinders the conducted noise of the totem-pole bridgeless PFC converter from passing the regulation.

Ⅴ. CONCLUSIONS

This study discussed the zero-crossing spike current issue in totem-pole bridgeless PFC converters, in which the spike current occurs at every input voltage zero-crossing and causes a severe EMI problem. The spike current generation mechanism is analyzed and concluded in an equivalent circuit, and the simulation result is consistent with the experimental result. Then, the noise caused by zero-crossing is calculated on the basis of the calculation of the Fourier coefficient of approximated spike current waveforms. A spike current occurs at every input voltage zero-crossing and causes the conducted noise in a high-frequency range of the noise spectrum. A noise reduction method is proposed to validate the conclusion and then improved to completely suppress the spike current. The proposed method is considered an effective solution to reducing zero-crossing spike current and the conducted noise caused by this issue without deteriorating the efficiency of the converter. By comparing the measured spectra before and after applying the noise reduction method, the validity of studying the zero-crossing spike current issue in totem-pole bridgeless PFC converters, including the analysis of noise generation mechanism and noise spectrum calculation, is verified. These conclusions and methods are essential for applying this highly efficient converter.

ACKNOWLEDGMENT

The first author is grateful for the financial support from the China Scholarship Council (CSC).

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Baihua Zhang was born in Ningxia, China, in 1990. He received his B.Eng. degree in Electrical Engineering from Beijing Jiaotong University, Beijing, China, in 2013 and his M.Eng. degree in Electrical and Electronic Engineering from Kyushu University, Fukuoka, Japan, in 2016, where he is currently working toward his Ph.D. degree. His current research interests include the noise reduction of bridgeless power factor correction (PFC) converters and electromagnetic interference (EMI) modeling of DC–DC converters.

Qiang Lin was born in Heilongjiang, China. He received his B.S. degree in Electrical Engineering from Heilongjiang University, Harbin, China, in 2013 and his M.Eng. degree in Electrical and Electronics Engineering from Kyushu University, Fukuoka, Japan, in 2017, where he is currently working toward his Ph.D. degree. His current research interests include the design of integrated magnetic components, PFC converters, and electromagnetic compatibility (EMC).

Jun Imaoka received his M.S. and Ph.D. degrees in Electronic Function and System Engineering from Shimane University, Matsue, Japan, in 2013 and 2015, respectively. From October 2015 to March 2018, he worked at Kyushu University, Fukuoka, Japan as an Assistant Professor. He is currently an Assistant Professor at Nagoya University, Nagoya, Japan. His research interests include the design of integrated magnetic components, modeling for high-power-density power converters, thermal management for power converters, magnetic material application, and EMI of switching power supply.

Masahito Shoyama received his B.S. and Ph.D. degrees in Electrical Engineering from Kyushu University, Fukuoka, Japan, in 1981 and 1986, correspondingly. He joined the Dept. of Electronics in Kyushu University as a Research Associate in 1986. He has been an Associate Professor since 1990 and a Professor since 2010. Since 2009, he has been with the Dept. of Electrical Engineering, Faculty of Information Science and Electrical Engineering, Kyushu University. He has been active in the field of power electronics, especially in the areas of bi-directional converters for DC/AC power systems, high-frequency switching converters for renewable energy sources, PFC converters, and EMC. Moreover, Prof. Shoyama is a member of IEEE, IEICE, IEEJ, and SICE.

Satoshi Tomioka was born in Niigata Prefecture, Japan, in 1961. He received his Ph.D. degree in Engineering from Kyushu University, Japan, in 2010. Since 1984, he has been working with TDK-Lambda Corporation. He is currently a general manager of R&D Division. In addition, Mr. Tomioka is a member of the Institute of Electronics, Information, and Communication Engineers of Japan.

Eiji Takegami was born in Kagoshima, Japan. He received his Ph.D. degree in Engineering from The University of Electro-Communications, Tokyo, Japan, in 2008. He has been with TDK-Lambda Corporation since 1997. He works as an engineer of switching power supply. His current research interests include AC–DC converters, DC–DC converters, control of power converters, and applications of power electronics.