https://doi.org/10.6113/JPE.2019.19.2.413

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Optimum Hybrid SVPWM Technique for Three-level Inverter on the Basis of Minimum RMS Flux Ripple

Meenu D. Nair^†, Jayanta Biswas^*, G. Vivek^**, and Mukti Barai^**

^†Department of Electrical Engineering, Karpagam College of Engineering, Coimbatore, India

^**Department of Electrical Engineering, NIT Calicut, Kerala, India

^*Freelance Researcher

Abstract

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

Key words: Harmonic distortion, Multilevel inverter, Space-vector PWM, Three-level inverter, Voltage source inverter (VSI)

Manuscript received Mar. 28, 2018; accepted Oct. 31, 2018

Recommended for publication by Associate Editor Jaehong Kim.

^†Corresponding Author: meenudnair@gmail.com Tel: +91-9496178967, Karpagam College of Engineering

^*Department of Electrical Eng., NIT Calicut, India

Ⅰ. INTRODUCTION

Multilevel inverters (MLIs) have several advantages over two-level ones [1], [2]. The output voltage and current waveforms of MLIs contain low harmonics compared with conventional two-level inverters for the same switching frequency. The blocking voltage of each semiconductor switch is decreased in a MLI configuration [3]-[10]. A three-level voltage source inverter (VSI) configuration is shown in Fig. 1. Various modulation techniques for three-level inverters have been studied in the literature [9]-[21] and [29]-[32]. In decreasing switching losses, the switching frequency of the high-power inverters is limited to low values (350–2 KHz). The bus-clamped SVPWM approaches are highly promising and an active area of research for three-level inverters by considering various aspects, such as low harmonic distortion and switching loss and high DC link voltage utilization.

Fig. 1. Circuit diagram of three-level voltage source inverter.

The current distortion for a given reference vector is strongly influenced by the switching sequences used in SVPWM technique [26], [27].

In the space vector PWM approach the applied voltage is equal to the reference voltage only in an average sense over the given sampling interval and not in an instantaneous manner. The instantaneous error between the applied and reference voltages is defined as the error voltage (Verror). The time integral value of the Verror produces the RMS flux ripple (ψripple) [27]. In general, a three-level inverter space is transformed into an equivalent two-level inverter space in optimizing the switching sequence. The switching sequences are heterogeneous in nature with respect to the number of switches in different SVPWM techniques [27]. Different bus-clamped SVPWM switching strategies for a three-level inverter on the basis of an equivalent two-level clamp [21]-[25] are reported in the literature to decrease the total harmonic distortion (THD). These strategies are types I–IV [22], A0121, A7212, A1012, and A2721 [24], [25]. Types I–III bus-clamped SVPWM strategies use a basic switching sequence (one zero vector and two active vectors). These strategies continuously clamp for 60° duration around the peak of the phase current in a half cycle. Types I–III clamps are found in the 60°–120°, 90°–150°, and 30°–90° regions, respectively. Type IV bus-clamped strategy uses the basic switching sequences of a sector and clamps for 30°–60° and 120°–°150° in the first and second quarter cycles, respectively. A0121, A7212, A1012, and A2721 are named as advanced bus-clamped SVPWM strategies in the literature. The active vectors in these advanced bus-clamped strategies are subdivided into double switching on the basis of the location of reference voltage in the sector. The introduction of double switching of active vectors reduces THD. The work reported in [28] uses a 20kHz sampling frequency for a five-level inverter and reduces THD by a considerable amount in accordance with a sigma delta modulation scheme. Other approaches [30]-[32] use conventional SVPWM techniques for three-level inverters. These approaches do not use look-up tables and generate PWM signal via voltage comparison method. Therefore, these methods compare the corresponding THD performances of the SVPWM strategies with respect to CSVPWM technique only.

Mapping three-level voltage vectors to equivalent two-level ones reduces the complexity pf dwell time calculation for three- level inverters. In general, the samples are placed equidistantly to maintain symmetry in the three-level inverter spaces. However, the uniformity is lost when the corresponding sampling points are converted into an equivalent two-level inverter. Considering the non uniform placement of equivalent samples in the two-level inverter, the hybrid SVPWM technique requires multiple use of the chosen optimum switching sequence. This condition leads to double switching transition between neighboring samples with existing approaches.

The existing approaches assign the specific sequences to a specific region of an equivalent two-level inverter. These approaches cannot specify a switching sequence corresponding to a sample point of reference voltage at a reference angle α in a three-level inverter. This occurrence violates the property of a single transition between the switching sequences in the crossover points of different samples in a sector and its boundary.

To address the issues above related to the SVPWM techniques of a three-level inverter, we propose a new hybrid SVPWM technique on the basis of a top-to-bottom design approach. This approach involves the selection of optimum switching sequences for hybrid SVPWM technique. A new parameter, that is, Ripple_Switching, which is a product of RMS ψ_ripple of a sequence and number of switching in the respective sequence, is introduced to obtain a common platform for different switching sequences. The variation of Ripple_Switching with respect to reference angle is derived from ψ_ripple analysis. The hybrid SVPWM technique is proposed based on the optimized switching sequences with respect to the minimum Ripple_Switching value for the three-level inverter.

The section II of this paper presents an in-depth analysis of the optimized hybrid SVPWM techniques for the three-level inverter. Section III presents the proposed optimum hybrid SVPWM technique. Section IV presents the design implementation and performance analysis of the proposed hybrid SVPWM technique for three-level inverter. The conclusions are presented in section V.

Ⅱ. ANALYTICAL DEVELOPMENT OF OPTIMIZED HYBRID SVPWM TECHNIQUE FOR THREE-LEVEL INVERTER

The definitions of sector and voltage vectors of a three-level inverter on the basis of space vector diagram are discussed in this section.

The voltage space vector diagrams of the three-phase three-level inverter are shown in Figs. 2(a) and (b). The large hexagon of the three-level inverter is viewed as six overlapped small hexagons whose active and null vectors are given by the hexagon tip and short voltage vectors, respectively. The region between −30° and +30°at approximately 90° of the R phase is defined as sector I of the three-level inverter. The area between −30° and +30° is divided into six triangles (0–5). The equivalent two-level inverter is shown in Figs. 2 and 3.

Fig. 2. Voltage vector diagram. (a) Voltage vector diagram of a three-level inverter. (b) Equivalent two-level voltage vector diagram of sector I.

(a)

(b)

Fig. 3. Voltage vector diagram. (a) Sector I of a three-level inverter. (b) Equivalent two-level voltage vector diagram.

(a)

(b)

The reference vector in the equivalent two-level inverter plane is represented by magnitude V β and angle β. The modulation index (mi) ranges between 0 and 0.5 and between 0.5 and 1are defined as low and high, respectively. Triangles 4,5, and 0–3 are in the low (0–0.5) and high (0.5–1) mi ranges, respectively.

The corresponding low and high mi ranges of the reference vector V_β at the angle β in the equivalent two-level vary from 0 to 0.5 and 0.5 to 1.0, respectively. The vectors with a relative length of 0.5 are called the zero vectors of each small hexagon in Fig. 2(a). Hence, the reference vector V_β is computed in equivalent two-level inverter by subtracting the nearest zero vector from V_ref that is located in any sector of the three-level inverter. The zero vectors POO and ONN are the nearest vectors to the reference vector V_ref at angle α in sector I. The vector diagram of V_β corresponding to V_ref in high and low mid ranges is shown in Fig. 4.

Fig. 4. Vector diagram of V_β corresponding to V_ref in high and low modulation index ranges.

The reference vector (V_refÐα) in the three-level inverter configuration is mapped to reference vector (V_βÐβ) in the two-level inverter configuration. The reference angle (α) in the three-level inverter varies from −30° to +30°. The reference angle (β) in the two-level inverter varies from 0° to 60° in a sector. The relationship shown in Equation (1) is obtained by resolving the reference vectors (V_refÐα and V_βÐβ) along the sector symmetry axis. The magnitude of the resulting horizontal and vertical components of the reference vectors (i.e., V_ref andV_β) can be expressed for any sector, as follows:

               (1)

The reference vector V_β1 at the angle β₁ corresponding to V_ref1 in high mi range is synthesized using two zero vectors (i.e., ONN and POO) and two active vectors (i.e., PNN and PON). Similarly, the reference vector V_β2 at the angle β2 corresponding to V_ref2 in low mi range is synthesized using two zero vectors (i.e., ONN and POO) and two active vectors (i.e., OOO and ONO).

A. Analysis of RMS Flux Ripple of a Switching Sequence Corresponding to Switching Sequences

The dynamic model of the three-phase induction motor is derived by transforming the three-phase quantities into two-phase ones. The two-phase quantities are placed on two axes, which are called the direct or d-axis and quadrature or q-axis. The two axes are 90° apart from each other.

In the space vector PWM approach, the applied voltage is equal to the reference voltage only in an average sense over the given sampling interval and not in an instantaneous manner. The difference between the applied (V) and reference voltages (V_ref) is defined as the V_error. The instantaneous V_error in the α–β plane can be expressed by the following expressions when V_refis at sector I:

               (2)

where _error1 and _error2 are the V_error vectors corresponding to active vectors v₁ and v₂, respectively. V_error0 corresponds to zero voltage vectors v₀ or v₇. The representation of the V_error vectors corresponding to reference V_ref in sector I is shown in Fig. 5. V_error can be expressed as follows:

           (3)

The instantaneous V_error causes the ψ_ripple in the machine. Hence, ψ_ripple can be defined as the integral of V_error applied to the machine by the PWM inverter, as follows:

                         (4)

The instantaneous V_error and corresponding ψ_ripple are presented in Fig. 6. The stationary reference frame α–β for stator flux is converted into synchronously revolving magnetic field reference d–q. The corresponding RMS ψ_ripple in the d–q plane is given by the following equations.

Fig. 5. Representation of reference and error voltage vectors in the sector I of the three-level space vector diagram

Fig. 6. Representation of: (a) Error voltages. (b) Flux ripple corresponding to V_ref in sector I.

(a)

(b)

The magnitude of the resulting ψ_ripple along the d- and q-axis is given by the following expression:

         (5)

The magnitude of each term is expressed by the following equations:

            (6)

The magnitude of each term is expressed by the following equations:

      (7)

where V_derror1, V_derror2, V_qerror1, and V_qerror2 are the V_error components in d- and q-axes.

The ψ_ripple results in flux variation in the d- and q-axis components. The RMS ripple of the motor line current is equally affected by the V_error and causes the distortion in the line current waveform. The V_error should be low to reduce the variation in flux and distortion in line current. Therefore, switching can be selectively added to reduce current ripple only in regions, where the voltage errors are large. The limited additional switching can keep the switching loss in a permissible limit. In this paper, a hybrid SVPWM strategy is proposed to obtain an optimum switching sequence to reduce instantaneous voltage errors.

B. Analytical Closed Form Expression of Harmonic Distortion

The RMS ψ_ripple for the three-level inverter exhibits the same form as the corresponding expression for the two-level one [35], [36]. In general, a three-level inverter space is transformed into an equivalent two-level one in optimizing the switching sequence. The switching sequences and sampling time (T_s) are heterogeneous in nature with respect to the switching number in different SVPWM techniques [27]. T_s varies in different SVPWM techniques in the literature [26], [27]. Therefore, the fundamental frequency also varies in these SVPWM techniques.

The analytical expressions of RMS ψ_ripple over a subcycle corresponding to switching sequences ₀₁₂₇, ₀₁₂, ₁₂₇, ₀₁₂₁, ₇₂₁₂, ₁₀₁₂, and ₂₇₂₁ are obtained from the respective trajectory of the d–q axis components of stator ψ_ripple over a subcycle in sector I, as shown in Fig. 7.

Fig. 7. Trajectory stator flux ripple vector over a subcycle for sequences. (a) ₀₁₂₇. (b) ₀₁₂. (c) ₁₂₇. (d) ₀₁₂₁. (e) ₇₂₁₂. (f) ₁₀₁₂. (g) ₂₇₂₁.

(a)

(b)

(c)

(d)

(e)

(f)

(g)

According to Equation (7), the RMS ψ_ripple over a subcycle corresponding to sequences 0127, 012,721, 0121, 7212, 1012, and 2721 is expressed as follows:

      (8)

         (9)

      (10)

                (11)

             (12)

            (13)

           (14)

The RMS ψ_ripple over a subcycle depends on the reference vector and switching sequence utilized. The analytical expressions of the RMS ψ_ripple over a subcycle corresponding to switching sequences ₀₁₂₇, ₀₁₂, ₁₂₇, ₀₁₂₁, ₇₂₁₂, ₁₀₁₂, and ₂₇₂₁ are obtained from the respective trajectory of the d–q axis components of stator ψ_ripple over a subcycle in sector I.

C. Research Motivation

The ψ_ripple results in flux variation both in the d- and q-axis components. The different switching sequences contribute various RMS ψ_ripple values with varying mi values and reference angles. The RMS ψ_ripple decreases as the number of switching in a sample is increased for a particular switching sequence used in a SVPWM technique. Therefore, the product of number of switching in a sample and RMS ψ_ripple of a switching sequence signifies the effect of reduction in RMS ψ_ripple for a specific sequence. The product of the RMS ψ_ripple and number of switchings of a switching sequence in a sample should be considered as a measure of the performance parameter in the constant frequency framework to obtain an effective value of RMS ψ_ripple. In this work, the new parameter Ripple_Switching corresponds to the product of RMS ψ_ripple and number of switching in a sequence to determine the optimum switching sequences in the three-level inverter.

Ripple_Switching is expressed by the following expression:

          (15)

where n is the number of switching in the switching sequence.

The proposed strategy aims to diminish THD for a given pulse number for a specific mi with the constant fundamental frequency of 50 Hz.

The RMS values of Ripple_Switching are evaluated for all the seven switching sequences of sector I in the two-level inverter for different mi values on the basis of Equation (5). The corresponding values of RMS Ripple_Switching for the mi values of 0.5, 0.65, 0.75, and 0.866 are plotted in Figs. 8(a), (b), (c), and (d), respectively. To obtain the precise variation in RMS Ripple_Switching for all possible switching sequences in the equivalent two-level inverter, we divide the range of modulation index (i.e., 0.5 < mi < 0.866) into three regions. The ranges 0.5 < mi < 0.65, 0.65 < mi < 0.8, and 0.8 < mi < 0.866 are defined as medium, moderate, and high, respectively.

Fig. 8. Analytically evaluated RMS Ripple_Switching of the switching sequences in sector I with the reference vector angle β and mi values of: (a) 0.5. (b) 0.7. (c) 0.75. (d) 0.866 (A:₀₁₂₇, D1:₀₁₂, D2:₁₂₇, C1:₁₀₁₂, C2:₂₇₂₁, B1:₀₁₂₁, and B2:₇₂₁₂).

(a)	(b)
(c)	(d)

The proposed approach selects the optimum switching sequences on the basis of the minimum RMS Ripple_Switching corresponding to β variation for different mi values.

As shown in Figs. 8(a)–(d), the best switching sequences that yield the lowest RMS Ripple_Switching among the seven switching sequences over the subcycle for a given reference vector are listed in Table II. The spatial regions of all the seven switching sequences according to Table II in the equivalent two-level inverter plane are shown in Fig. 9(a). Fig. 9(b) represents the corresponding optimized map of different switching sequences in the space vector diagram of the three-level inverter. The detailed characteristics of the optimum switching sequences for hybrid SVPWM technique in the three-level inverter are investigated in the next subsection.

TABLE I EQUIVALENT TWO-LEVEL ACTIVE AND ZERO VECTORS CORRESPONDING TO SYNTHESIZED V_Β IN THE SECTOR I OF THREE-LEVEL INVERTER

Voltage vector	Triangle number
	0	1	2	3	4	5
Zero vector 0 (0) Active vector 1 (1) Active vector 2 (2) Zero vector 7 (7)	ONN ONO PNO POO	ONN PNN PNO POO	ONN PNN PON POO	ONN OON PON POO	ONN OON OOO POO	ONN ONO OOO POO
Note: P= Vdc/2; O = 0; N = −Vdc/2

TABLE II OPTIMIZED SWITCHING SEQUENCE ON THE BASIS OF V_Β AND REFERENCE ANGLE Β IN SECTOR I IN THE EQUIVALENT TWO-LEVEL INVERTER

Switching sequence	mi < 0.5	mi = 0.5	mi = 0.6	mi = 0.7	mi = 0.8	mi = 0.866
0127 (A) 012 (D1) 127 (D2) 1012 (C1) 2721 (C2) 0121 (B1) 7212 (B2)	0°–60°	17°–30° 30°–43° 0°–17° 43°–60°	15°–30° 30°–45° 0°–15° 45°–60°	9°–30° 30°–51° 0°–9° 51°–60°	5°–15° 45°–55° 0°–5° 55°–60° 15°–30° 30°–45°	4°–8° 52°–56° 0°–4° 56°–60° 8°–30° 30°–52°

Fig. 9. (a) Spatial regions for different sequences in the equivalent two-level inverter. (b) Optimized switching sequence in the three-level inverter for sector I (A:₀₁₂₇, D1:₀₁₂, D2:₁₂₇, C1:₁₀₁₂, C2:₂₇₂₁, B1:₀₁₂₁,and B2:₇₂₁₂).

(a)

(b)

Ⅲ. PROPOSED HYBRID SVPWM TECHNIQUE

A. Analysis of Optimum Switching Sequence Characteristics

The switching sequences ₀₁₂ and ₁₂₇ produce the low and constant Ripple_Switchingat mi = 0.5 in the middle region (15°<β< 45°) of sector I, as shown in Fig. 8(a).

For the low mi region (mi <0.5), the conventional sequence ₀₁₂₇ is the most suitable switching sequence. The switching sequence ₀₁₂ provides less RMS Ripple_Switching than ₁₂₇ for any β value in the range of 0°<β<30°and any given V_β. Similarly, switching sequence ₁₂₇ provides less RMS Ripple_Switching than₀₁₂ in the range of30°< β < 60°. Figs. 8(b) and (c) present that ₁₀₁₂ and ₂₇₂₁ are the most suitable switching sequences at the boundaries at mi = 0.65. The bus clamping sequences ₀₁₂ and ₁₂₇ are suitable in the middle of the sector. Fig. 8(d) shows that ₀₁₂₁ and ₇₂₁₂ are better than other sequences over a wide range of β at mi = 0.866.

Sequences ₁₀₁₂ and ₂₇₂₁ result in low Ripple_Switching in the boundary of the sector for a wide range of V_β values. The proposed approach selects the optimum switching sequences on the basis of the minimum RMS Ripple_Switching corresponding to β variation for different mi values. The behavior of the optimum switching sequences for hybrid SVPWM technique in the three-level inverter is studied below with examples. We consider an example with a reference vector V_ref with a magnitude of 0.866 V_dc by using six samples positioned in sector I in the three-level inverter. The uniform distribution of the six samples are located at −25°, −15°, −5°, 5°, 15°, and 25° of sector I (−30°<α< 30°). Three out of the six samples are located in triangle 1.

Triangles 0 and 1 are located in the first half of sector I, and triangle 2 and 3 belong to the second half of the sector. Similarly, three samples are located in triangle 2 in the second half of sector I. The respective location of the reference vector in the three-level inverter plane is converted into the equivalent two-level one. The present locations of the six samples in the equivalent two-level inverter are at 52.1°, −33.66°, −11.755°, 11.755°, 33.66°, and 52.1° at a high mi of >0.75. The results showed that the respective samples are non uniformly distributed in the equivalent two-level inverter plane.

The optimum switching sequences used to synthesize six samples for the respective locations in Fig. 9 are ₀₁₂₁ (B1), ₁₂₁₀ (B1), ₁₂₇ (D2), ₂₁₀ (D1), ₂₁₂₇ (B2), and ₇₂₁₂ (B2). B1–B1, B1–D2, D2–D1, and B2–B2 demonstrate a single switching transition, but D1 and B2 have double switching transitions. Hence, in some cases, the optimum switching sequences for the three-level inverter do not provide continuity between the crossover point of the two samples in a sector.

Similarly, we consider another reference vector V_ref with the magnitude of 0.55 V_dc by using six samples positioned in sector I. The locations of six samples are −25°, −15°, −5°, 5°, 15°, and 25° of sector I (−30° <α< 30°). Two out of the six samples are located in triangle 0. One sample is located in triangle 1. Triangles 0 and 1 are located in the first half of sector I, and triangles 2 and 3 belong to the second half of the sector. Similarly, one sample is located in triangle 2 in the second half of sector I, and two samples are located in triangle 3. The respective locations of the reference vector in the three-level inverter plane is converted to the equivalent two-level inverter plane. The present locations of the samples in the equivalent two-level inverter with β are −91.62°, −77.61°, −45°, 45°, 77.61°, and 91.62° at low mi value of <0.5. The respective samples are non uniformly distributed in the equivalent two-level inverter plane.

The optimum switching sequences used to synthesize the six samples for the respective locations in Fig. 9 are ₀₁₂₇ (A), ₇₂₁₀ (A), ₀₁₂₇ (A), ₇₂₁₀ (A), ₀₁₂₇ (A), and ₇₂₁₀ (A). In this case, the same optimum switching sequence is used multiple times to synthesize the reference vector located at different locations. Here, no discontinuity is observed between the two samples in a sector. However, discontinuity exists in the sector boundary because the zero vectors vary in different sectors for the three-level inverter.

The different zero vectors are ONN, PPO, NON, OPP, NNO, and POP in sectors I, II, III, IV, V, and VI, respectively. Therefore, the optimum switching sequences for the three-level inverter do not provide continuity while switching between two sectors. A new hybrid SVPWM technique is proposed to address the problems mentioned above.

B. Modified Optimized Map

According to the discussion above, the optimized switching sequences in the three-level inverter, which are obtained directly on the basis of local optimization, face difficulty in discontinuity in the crossover point of different samples in a sector and sector boundary, as shown in Fig. 10. Therefore, global optimization is required to remove this discontinuity and achieve the maximum performance of a hybrid SVPWM technique. In this work, a novel modified optimized hybrid SVPWM technique is proposed based on the global optimization criteria around the point of discontinuity.

Fig. 10. Transition of switching from positive DC bus (P) to negative DC bus (N). (a) VAN. (b) VBN. (c) VAB.

The criteria are as follows:

1) Single switching between the crossover point of the two samples in a sector.

2) Single switching between sector boundaries.

3) Only one phase is switched during state transition within a sample among all three phases.

4) The waveform should have half-wave and three-phase symmetries.

To satisfy constraint 1 in the case of discontinuity discussed in example 1, we replace the optimum switching sequence v_2v1v0 with the next optimum switching sequence ₁v₀v₁v₂.

The optimum sequence ₁₂₇ is replaced with ₂₇₂₁ to maintain the symmetry specified by constraint 4 around the point of discontinuity.

Similarly, to remove discontinuity in sector boundaries discussed in example 2, we replace the optimum sequences ₀₁₂v₇ and ₇₂₁₀ with ₁₂₇ and ₀₁₂ in the boundary samples, which satisfy constraints 2, 3, and 4. The same approach is used for all the points of discontinuity, and the global modified optimized switching sequences are obtained for the three-level inverter.

Fig. 11(a) shows the different regions of the modified optimum switching sequences in sector I for the three-level inverter. The spatial regions corresponding to the modified optimized switching sequences in the equivalent two-level inverter are shown in Fig. 11(b).

Fig. 11. (a) Modified spatial regions with optimum switching sequences in the sector I of the three-level inverter. (b) Corresponding modified spatial regions with optimum switching sequences in the equivalent two-level inverter (A:₀₁₂₇, D1:₀₁₂, D2:₁₂₇, C1:₁₀₁₂, C2:₂₇₂₁, B1:₀₁₂₁, and B2:₇₂₁).

(a)

(b)

The proposed hybrid SVPWM technique for the three-level inverter is synthesized based on the modified optimum switching algorithm for different sample and pulse numbers. The proposed hybrid SVPWM technique for the three-level inverter is synthesized based on the modified optimum switching algorithm for different sample and pulse numbers.

The waveforms of the pole and line voltages of the proposed hybrid SVPWM technique (number of samples = 5, pulse number = 11) are shown in Fig. 12. The waveforms showed that the P–N transitions are eliminated. The proposed hybrid SVPWM technique can associate a specific switching sequence to a sample point in a sector in the three-level configuration. The corresponding changes with respect to the modified optimized switching sequences in the three-level inverter are mapped back to the equivalent two-level inverter. The modified optimized map ofthe switching sequences in the sector is used to achieve single switching across the subsector and sector boundaries and provides symmetry for odd and even numbers of samples of the optimum switching sequences in sector I for the three-level inverter. The spatial regions corresponding to the modified optimized switching sequences in the equivalent two-level inverter are shown in Fig. 11(b). The performance of the proposed hybrid SVPWM technique of the three-level inverter is validated experimentally by measuring the weighted voltage THD at various mi values and compared with the existing hybrid SVPWM techniques in the next section.

Fig. 12. Continuous transition in the proposed hybrid SVPWM. (a) VAN. (b) VBN. (c) VAB.

Ⅳ. DESIGN IMPLEMENTATION AND PERFORMANCEANALYSIS

The related SVPWM techniques existing in literature have been implemented based on constant fundamental frequency. The different mi values are considered as a parameter in comparing different SVPWM strategies, which produce wave forms with same pulse number, because the RMS Ripple_ Switching varies for a particular switching sequence as the mi values differ, as shown in Fig. 8. The proposed hybrid PWM for different pulse numbers are shown in Table III.

TABLE III PROPOSED HYBRID SVPWM TECHNIQUES ON THE BASIS OF MODIFIED OPTIMIZED SWITCHING ALGORITHM IN SECTOR I AT MI = 0.75

Algorithm	No. of samples	Pulse  number	Modified optimized switching sequences
Proposed hybrid SVPWM	4	14	2721-0127-7210-1012
	5	18	1012-7210-0127-2721-012
	6	20	2721-1012-7210-0127-2721-1012
	7	22	210-012-1272-1012-127-721-1012
	8	26	2721-10121272-2101-2721 -12721012-7210
	9	30	-0127-7210-0127-27212101-0127-7210-0127-7210
	10	32	1272-012-1012-2101-0127-7210-0127-7210-2721-1012

The RMS Ripple_Switching is dependent upon the number of switching pulses of a SVPWM strategy. The harmonic distortion of the SVPWM strategy decreases with low RMS Ripple_Switching value.

A. Results

The different SVPWM strategies are implemented in MATLAB/SIMULINK. All the existing SVPWM techniques in literature have been implemented based on constant fundamental frequency. The pulse patterns for types I, II, III, and IV are illustrated in Figs. 14(a), (b), (c), and (d), respectively, for the five samples per sector with a mi value of 0.8. Switching transitions between P and N were observed in type I, II, and IV strategies. The pulse patterns for A0121, A7212, A1012, and A2721strategies are illustrated in Figs. 15(a), (b), (c), and (d), respectively, for the five samples per sector with a mi value of 0.8. Switching transitions between P and N were observed in A7212 and A2721 strategies.

Fig. 13. Experimental setup of the three phase three-level SVPWM-controlled VSI.

Fig. 14. Pole and line voltages. (i) VAN, (ii) VBN, (iii) VAB of type: (a) I. (b) II. (c) III. (d) IV techniques.

(a)	(b)
(c)	(d)

Fig. 15. Pole and line voltages. (i) VAN, (ii) VBN, (iii) VAB of: (a) A0121. (b) A7212. (c) A1012. (d) A2721 techniques.

(a)	(b)
(c)	(d)

B. Hardware Implementation

An IGBT (SK30MLI066)-based 2 KVA three-phase three-level NPC VSI with 400 V_dc is designed and developed. The proposed work has been experimentally verified on the three-level NPC inverter with three-phase induction motor (415 V, 2.2 kW).

The experimental prototype is shown in Fig. 13. The block diagram of the experimental setup is shown in Fig. 16.

Fig. 16. Block diagram of experimental setup.

C. Experimental Waveforms

The line voltage waveform and FFT spectrum of proposed hybrid SVPWM at the mi values of 0.866 and 0.55 are obtained from the experimental setup, as shown in Figs. 17(a) and (b), respectively. Similarly, Figs. 18, 19, and 20 present the line voltage waveforms and the corresponding FFT spectrum of the proposed hybrid SVPWM at the mi values of 0.65,0.75, and 0.866 obtained from the experimental setup, respectively. The three-phase pole and corresponding line voltage waveforms obtained from the experimental setup are shown in Figs. 21(a) and (b), respectively.

Fig. 17. (a) Line voltage. (b) Harmonic spectrum of the line voltage of the proposed hybrid SVPWM at mi = 0.55 and V_wthd = 1.5%.

(a)

(b)

Fig. 18. (a) Line voltage. (b) Harmonic spectrum of the line voltage of the proposed hybrid SVPWM at mi = 0.65 and V_wthd = 1.6%.

(a)

(b)

Fig. 19. (a) Line voltage. (b) Harmonic spectrum of the line voltage of the proposed hybrid SVPWM at mi = 0.75 and V_wthd = 1.1%.

(a)

(b)

Fig. 20. (a) Line voltage. (b) Harmonic spectrum of the line voltage of the proposed hybrid SVPWM at mi = 0.866 and V_wthd = 0.86%.

(a)

(b)

Fig. 21. (a) Three-phase pole. (b) Three-level line voltages of the proposed hybrid SVPWM technique.

(a)

(b)

D. Result Analysis

The THD performance of different SVPWM strategies depends on the specific switching sequences, clamping type, pulse number, and mi values. The weighted voltage THD is approximately proportional to the current THD and independent of the motor parameters. The normalized value of the harmonic content in the line voltage waveform is defined as weighted voltage THD (V_wthd), which is expressed as follows:

                (16)

where V₁ and V_n are the RMS values of the fundamental and nth harmonic voltage of the line voltage waveform, respectively. A unbiased framework is based on the number of switching pulses, and the pulse number is considered as a parameter in comparing different SVPWM strategies.

Pulse number (P)is defined as the number of pulses in a pole voltage waveform in a fundamental cycle for a particular SVPWM strategy because different SVPWM strategies have varying numbers of switching associated with a sample. Therefore,the only method to capture the effect of increasing sample number and heterogeneity of number of switching in a sample is to compare the SVPWM strategies with respect to the pulse number. The comparative studies presented in literature applied a constraint for the maximum number of switching pulses per sample but did not compare different strategies on the basis of the total number of switching pulses per cycle, which is a device constraint. In this proposal, the pulse number is used to compare the proposed hybrid SVPWM strategies with all the existing SVPWM strategies for the three-level inverter.

The normalized values of the harmonic content, that is, V_wthd, are measured from the experimental setup on the basis of the pulse number for the existing SVPWM strategies, that is, types I, II, III, and IV, and proposed hybrid SVPWM technique over the mi range of 0.500–0.866. The V_wthd values obtained are plotted in Figs. 22(a), (b), (c), and (d) for different mi values of 0.55, 0.65, 0.75, and 0.866, respectively. The switching frequency considered for the comparison of different SVPWM techniques varies from 450 Hz to 1.4 kHz.

Fig. 22. V_wthd performance assessment. (a) With mi = 0.55. (b) With mi = 0.65. (c) With mi = 0.75. (d) With mi = 0.866.

(a)	(b)
(c)	(d)

The different mi values are considered as a parameter in comparing different SVPWM strategies, which produce waveforms with same pulse numbers because the RMS Ripple_Switching varies for a particular switching sequence as the mi differs, as shown in Fig. 8.The RMS Ripple_Switching is dependent upon the number of switching pulses of a SVPWM strategy. The harmonic distortion of the SVPWM strategy decreases with low RMS Ripple_Switching value.

The difference in the THD in types I and IV are due to the discontinuity of the corresponding sequence in the sector boundary. The overall performance of the proposed hybrid SVPWM strategy is better than those of the other existing strategies in the linear region of mi. The analysis above is observed based on the pulse number variation in the range of 10–22. The trend in the strategy with high pulse number is not same with low pulse number for all mi values because the pulse number increases with the increase in the sample number. For high sample number, the resolution of the equivalent two-level conversion angles (β) is increasingly uniformly distributed. For low sample number, the resolution is decreases and is insufficiently uniformly distributed.

Similarly, the V_wthd values are obtained for the existing SVPWM strategies, namely, A0121, A7212, A1012, and A2721, and the proposed hybrid SVPWM strategy, as presented in Figs. 23(a), (b), (c), and (d), for the mi values of 0.55,0.65, 0.75, and 0.866, respectively. The switching frequency considered for the comparison of different advanced SVPWM techniques varies from 450 Hz to 2 kHz.

Fig. 23. V_wthd performance assessment. (a) With mi = 0.55. (b) With mi = 0.65. (c) With mi = 0.75. (d) With mi =  0.866.

(a)	(b)
(c)	(d)

A0121, A7212, A1012, and A2721 are the SVPWM strategies with double switching sequences. The proposed hybrid SVPWM strategy performs better than all the existing double switching SVPWM strategies in the linear mi region.

The consolidated performance analysis of the proposed hybrid SVPWM strategy for mi = 0.866with a constant pulse number (P =22) is presented in Table IV. The proposed hybrid SVPWM strategy improves the V_wthd performance by 17.3% with respect to lowest V_wthd obtained in type III. The V_wthd performance of the proposed hybrid SVPWM strategy is improved by 20.37% with respect to the lowest V_wthd obtained in the double switching strategies.

TABLE IV COMPARISON OF THE PERFORMANCE OF THE PROPOSED HYBRID SVPWM STRATEGY FOR A PULSE NUMBER OF 22 WITH MI = 0.866

Algorithm	No. of samples	Pulse number	Vwthd
Type I Type II Type III Type IV A0121 A7212 A1012 A2721 Proposed hybrid SVPWM	10 10 10 10 7 7 7 7 7	22 22 22 22 22 22 22 22 22	0.0112 0.0116 0.0104 0.0147 0.0126 0.0119 0.0108 0.0155 0.0086

The V_wthd performance of the proposed hybrid SVPWM technique over the mi range of 0.55–0.866 with respect to types I, II, III, and IV is shown in Fig. 24(a). The pulse number considered for comparison is 22. Therefore, the performance of the proposed hybrid SVPWM technique is unaffected by the different number of switching in a sequence. Fig. 24(a) shows that the proposed hybrid SVPWM strategy provides low harmonic distortion in a high mi range (mi > 0.75).

Fig. 24. V_wthd performance of the proposed hybrid SVPWM with CSVPWM. (a) Existing SVPWM techniques without load (pulse no. = 22). (b) Existing advanced SVPWM techniques without load (pulse no. = 40).

(a)

(b)

Similarly, the V_wthd performance of the proposed hybrid SVPWM technique over the mi range of 0.55–0.866 with respect to the existing advanced SVPWM techniques (A0121, A7212, A1012, A2721) is presented in Fig. 24(b) for the pulse number of 40. The result shows that the proposed hybrid SVPWM technique provides few THD in the high mi range.

The normalized switching loss characteristics of the proposed and existing SVPWM techniques compared with CSVPWM is shown in Fig. 25. The switching loss is lower than that of CSVPWM (60° to+60°) and comparable to the existing SVPWM and advanced SVPWM techniques. Fig. 22 demonstrates that the proposed strategy (30° clamping) outperforms the existing SVPWM techniques for power factor angle over the range of −30°–+30° with respect to switching loss and is limited within an acceptable whole power factor range. Similarly, the proposed strategy outperforms the existing advanced SVPWM techniques for power factor angle ranging from of −30° to +30°. The switching loss is limited within an acceptable in the whole power factor range for the proposed hybrid PWM technique.

Fig. 25. Normalized switching loss comparison. (a) Existing SVPWM techniques. (b) Existing advanced SVPWM techniques.

(a)

(b)

Ⅴ. CONCLUSIONS

This study presents an in-depth analysis of an optimum hybrid SVPWM technique for the three-level inverter. A new parameter RMS Ripple_Switching is introduced by multiplying the RMS ψ_ripple of a switching sequence and number of switchings in the sequence. The minimum value of this parameter is used to obtain the optimized switching sequences. The characteristics of the optimum switching sequences are investigated in detail. The detailed investigation finds that the existing multilevel zone algorithms are insufficient to achieve the maximum performance of a hybrid SVPWM technique. A global optimization is proposed to achieve the maximum performance of a hybrid SVPWM technique. The new optimized algorithm on the basis of the global optimization criteria improves the hybrid zone identification in the three-level inverter. The proposed hybrid SVPWM technique is verified experimentally with a 2 KVA three-phase three-level IGBT-based VSI. The experimental results of the proposed hybrid SVPWM strategy is compared with all existing SVPWM strategies of the three-level inverter.

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Meenu D. Nair received her B.Tech. degree in Electrical and Electronics Engineering from the Rajiv Gandhi Institute of Technology, Kottayam, India in 2009 and M.Tech. degree in Power Electronics from SASTRA University (Shanmugha Arts, Science, Technology and Research Academy), Thanjavur, India in 2011 and PhD from National Institute of Technology Calicut, India in 2018. She is presently working as associate professor in Karpagam college of engineering, Coimbatore, India. Her current research interests include multilevel inverters and pulse width modulation techniques for drives.

Jayanta Biswas received his B.E. degree in Computer Science from the Bengal Engineering College, Shibpur, Howrah, India in 1993 and his M.E. and Ph.D. degrees in System Science and Automation from the Indian Institute of Science, Bengaluru, India in 1995 and 2006, respectively. He worked with NCR Corporation, Columbia, SC, USA from January 1995 to 1998. He worked with Alcatel Internetworking, Calabasas, CA, USA from January 1999 to November 2002. He was the project manager of the Alcatel Internetworking ATM (core and edge) switch software developmental efforts and led the ten Gigabit software developmental efforts from May 2000 to November 2002. He workedas the technical director in CEM Solutions, Bangalore, India, where he led the embedded product development and research activity as the technical director. He worked and taught as an assistant professor at the International Institute of Information Technology, Bangalore, India in the embedded systems and VLSI group. His current research interests include digital controller architectures for power management application ICs and modulation techniques for multilevel power electronics converters.

G. Vivek received his B.Tech. degree in Electrical and Electronics Engineering from the University of Calicut, Kerala, India, in 2009 and his M.E. degree in Power Electronics and Drives from Anna University, Chennai, India in 2011. He is currently working toward his Ph.D. degree in the Department of Electrical Engineering, National Institute of Technology, Calicut, India. His current research interests include PWM control in multilevel inverters.

Mukti Barai received her B.E. degree in Electrical Engineering from the Bengal Engineering College, Shibpur, Howrah, India, in 1992 and her M.Tech. and Ph.D. degrees in Machine Drives and Power Electronics from the Indian Institute of Technology, Kharagpur, India in 1994 and 2009, respectively. She was a senior engineer (design and development) in the Electronics Division, Bharat Heavy Electricals Limited, Bangalore, India in 1994–2000. She was a principal software development engineer at Alcatel Internetworking, Calabasas, CA, USA in 2002–2002. She worked at the ST Microelectronics Research Laboratory in the Indian Institute of Science, Bangalore, India in 2003–2004. She is currently working as an associate t professor at the National Institute of Technology, Calicut, India. Her current research interests include modulation techniques for multilevel power electronics converters and digital controller architectures for power management application ICs.