사각형입니다.

https://doi.org/10.6113/JPE.2019.19.4.1000

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Transient-Performance-Oriented Discrete-Time Design of Resonant Controller for Three-Phase Grid-Connected Converters


Zhanfeng Song, Yun Yu*, Yaqi Wang*, and Xiaohui Ma*


†,*School of Electrical and Information Engineering, Tianjin University, Tianjin, China



Abstract

The use of internal-model-based linear controller, such as resonant controller, is a well-established technique for the current control of grid-connected systems. Attractive properties for resonant controllers include their two-sequence tracking ability, the simple control structure, and the reduced computational burden. However, in the case of continuous-designed resonant controller, the transient performance is inevitably degraded at a low switching frequency. Moreover, available design methods for resonant controller is not able to realize the direct design of transient performances, and the anticipated transient performance is mainly achieved through trial and error. To address these problems, the zero-order-hold (ZOH) characteristic and inherent time delay in digital control systems are considered comprehensively in the design, and a corresponding hold-equivalent discrete model of the grid-connected converter is then established. The relationship between the placement of closed-loop poles and the corresponding transient performance is comprehensively investigated to realize the direct mapping relationship between the control gain and the transient response time. For the benefit of automatic tuning and real-time adaption, analytical expressions for controller gains are derived in detail using the required transient response time and system parameters. Simulation and experimental results demonstrate the validity of the proposed method.


Key words: Discrete-time design, Grid-connected converters, Resonant controller, Transient performance


Manuscript received Jan. 2, 2019; accepted Mar. 21, 2019

Recommended for publication by Associate Editor Hao Ma.

Corresponding Author: zfsong@tju.edu.cn, Tel: +86-022-27890065, Tianjin University

*School of Electrical and Information Eng., Tianjin University, China



Ⅰ. INTRODUCTION

Grid-connected voltage-source converters (VSCs) have gained a large popularity in recent years due to the growing use of renewable energy and the wide implementation of distributed power generation systems (DPGSs) [1]. In these power generation systems, VSCs serve as the power conversion equipment which transforms the power to meet the requirements for grid interconnection [2], [3]. Filters are normally installed between the converter and utility network to attenuate high frequency harmonics generated by the switching actions of power electronic devices [4]-[6]. Considering the enhancement of power quality, the performance of grid-connected converter should be designed to meet the stricter requirements [7]. Generally, a fast dynamic response without oscillations and a low current THD are anticipated.

The control structure of VSCs is usually based on the cascaded control scheme, where the inner control loop is normally used to regulate currents [8], [9]. In this case, the performance of the inner loop has a significant impacts on the overall control performance [10]. Among the various current controllers, including both linear and nonlinear controllers, resonant controllers are widely adopted due to their simple control structure and reduced computational burden [9], [11]-[13]. For example, resonant controllers can regulate both positive-sequence and negative-sequence currents at the same time without any modifications [14], [15], which is a good property for unbalanced operation conditions [16], [17]. In this manner, resonant controllers are suitable for the control of DPGSs, since the two-sequence-tracking ability benefits the ride-through capability of DPGSs [18], [19]. Another attractive feature is the elimination of multi-frequency harmonics, which can be realized directly by using multiple resonant controllers [20]-[23], since each resonant controller only produces an infinite gain for the corresponding frequency signal. This straightforward implementation simplifies the control structure for power quality improvement [20], [21]. Generally, zero steady-state error can be achieved when resonant controllers are implemented, and the transient response and the desired transient response time are focuses of resonant control [24], [25]. For most applications, it is expected that controllers be designed with an accurate dynamic response [26], [27].

An available method for the design of resonant controllers is based on a continuous-time analysis, where the model of the plant is normally established in the continuous-time domain using transfer functions [21], [28], [29]. In this manner, a frequency-response analysis is normally applied, and the bandwidth is then adopted as a major factor for the evaluation of close-loop dynamics. Nevertheless, in real applications, the designed controllers are normally applied in digital control systems [30]. Electrical quantities like the currents and voltages are sampled for control, and pulse- width modulation (PWM) is applied for the realization of the control voltage. In addition, an inherent time delay always exists in the digital control system. Thus, the discrete characteristics of this type of sampled-data system should be taken into account comprehensively during modeling [15], [31], [32]. Based on an accurate discrete-time model, the stability can be really ensured, and the desired system dynamics can be realized correspondingly, especially when the system is designed with high dynamics and a relatively low switching frequency [15], [25].

In terms of the current controller design, another important aspect is the transient response which has been extensively investigated in many studies. For example, in [33], an approach utilizing the sliding-mode control is proposed for the current loop of grid-forming inverters, and the proposed algorithm can produce a fast and robust tracking performance even under parameter variations. Due to its satisfactory transient response, a sliding-mode-control-based current loop is also applied in [34] for the primary control of an isolated ac microgrid. It is worth noting that, for the design of conventional linear controller, such as proportional integral (PI) controller, a well-established approach is to obtain the desired time-domain specifications [27]. Following this manner, the transient response time of the dc signal tracking can be directly determined. However, for resonant control in ac systems, the similar performance is difficult to achieve. One design method that focuses on the transient performance is presented in [26], where the optimal transient is obtained by assessing the influence of the proportional and resonant gain on the closed-loop poles and zeros. However, the direct mapping relationship between the control gains and the transient response time is not available. Additionally, in [27], the anticipated transient performance is attained using continuous-time design, where the performance is inevitably deteriorated in the case of a low switching frequency.

Controller tuning is another important task that has a significant influence on the performance of the entire control system. For example, when offline tuning methods are applied, the controller parameters are invariant, and the control performance can be degraded due to the variations of the system parameters [35]. For the benefits of realizing satisfactory control performance, accurate automatic tuning methods are preferable [24], [32]. To ensure stable operations and to improve the dynamic response, an automatic tuning algorithm has been proposed for power converters with cascaded control loops in [36]. It is worth noting that, the automatic tuning also makes the implementation of real-time adaption realizable, where the system parameters can be measured or estimated for the tuning of the controller gains. For DPGSs, the power plants may be installed in remote areas, and the impedance of these plants may not always be constant. Thus, a simple and straightforward controller tuning algorithm can benefit the controllability improvement in these cases.

This paper presents a transient-performance-oriented resonant control for grid-connected VSCs. The contributions of this paper can be summarized as follow. The accurate hold-equivalent discrete model of the grid-connected converter is established, where the ZOH characteristic of the PWM and the inherent time delay are simultaneously taken into account. In this manner, improved stability of the resonant control can be obtained, especially in the case of a reduced switching frequency. Moreover, the direct mapping relationship between the control gain and the transient response time of resonant control is presented with given time-domain specifications. Following this direct mapping relationship, the closed-loop poles and zeros are configured to achieve a desired transient performance. In addition, to realize the automatic tuning of the proposed resonant control, analytical expressions for the controller gains are derived directly using the desired transient performance and system parameters.

This paper is organized as follows. In Section II, a generalized plant is analyzed, and a hold-equivalent model in the discrete-time domain is then presented. In Section III, the design of the controller is presented in detail, and the selection of closed-loop poles for a desired transient performance is given. The analytical expressions are derived in Section IV. Experimental results are presented and analyzed in Section V. The conclusions are drawn in Section VI.



Ⅱ. SYSTEM MODEL

In this paper, the boldfaced letters are used to donate matrices or complex vectors, and the complex vector quantities are expressed in stationary 그림입니다.
원본 그림의 이름: CLP00003740389d.bmp
원본 그림의 크기: 가로 69pixel, 세로 52pixel coordinates (e.g., current vector 그림입니다.
원본 그림의 이름: CLP000037400001.bmp
원본 그림의 크기: 가로 265pixel, 세로 68pixel). In the following, the continuous-time model of the generalized circuit is firstly presented. Then the corresponding hold-equivalent discrete- time model is established for the controller design.

The dynamic of the generalized circuit in the continuous- time domain can be expressed using state differential and output equations as:

그림입니다.
원본 그림의 이름: CLP00003740002c.bmp
원본 그림의 크기: 가로 2460pixel, 세로 611pixel     (1)

where 그림입니다.
원본 그림의 이름: CLP000037400002.bmp
원본 그림의 크기: 가로 119pixel, 세로 63pixel represents the output voltage of the converter, 그림입니다.
원본 그림의 이름: CLP000037400003.bmp
원본 그림의 크기: 가로 126pixel, 세로 64pixel stands for the voltage at the point of common coupling, and 그림입니다.
원본 그림의 이름: CLP000037400004.bmp
원본 그림의 크기: 가로 106pixel, 세로 65pixel stands for the output current of the convert. In addition, the symmetrical three-phase impedance of the grid interconnection is marked by resistance 그림입니다.
원본 그림의 이름: CLP000037400005.bmp
원본 그림의 크기: 가로 60pixel, 세로 56pixel and inductance 그림입니다.
원본 그림의 이름: CLP000037400006.bmp
원본 그림의 크기: 가로 55pixel, 세로 53pixel, respectively.

In order to directly design resonant controllers in the discrete-time domain, the continuous-time model of the system should be transformed into the discrete-time model using an appropriate approach, which can accurately reveal the characteristics of the digital control system. Typically, the sampling instances are synchronized with PWM. As a result, the impact of electromagnet interference on the sampling process can be released, and the sampled current ripple can be avoided. When the PWM is single updated, the sampling frequency is equal to the switching frequency. In the case of double-update PWM, the sampling frequency is twice of the switching frequency. Additionally, the sampled current and output voltage are kept constant between two sampling instants. Considering the ZOH characteristics of the sampling and PWM, the corresponding hold-equivalent discrete-time model is given as:


그림입니다.
원본 그림의 이름: CLP00003740002d.bmp
원본 그림의 크기: 가로 2391pixel, 세로 404pixel     (2)


where the system matrices can be formulated as (3), and 그림입니다.
원본 그림의 이름: CLP000037400007.bmp
원본 그림의 크기: 가로 54pixel, 세로 56pixel is the sampling period.

 그림입니다.
원본 그림의 이름: CLP00003740002e.bmp
원본 그림의 크기: 가로 2334pixel, 세로 832pixel     (3)

With the adopted synchronous sampling mode, an inherent one-sample-period delay always exists. In other words, the sampled current at the present sampling instant k is used to generate the control voltage to be applied at the next instant k +1. This computational delay can be formulated by 그림입니다.
원본 그림의 이름: CLP000037400008.bmp
원본 그림의 크기: 가로 449pixel, 세로 68pixel. In order to include the computational delay in the discrete-time model, the model augmentation is applied. The corresponding augmented plant model is given as:

그림입니다.
원본 그림의 이름: CLP00003740002f.bmp
원본 그림의 크기: 가로 3713pixel, 세로 1355pixel     (4)

where 그림입니다.
원본 그림의 이름: CLP000037400009.bmp
원본 그림의 크기: 가로 68pixel, 세로 49pixel is the new state variable. 그림입니다.
원본 그림의 이름: CLP00003740000a.bmp
원본 그림의 크기: 가로 321pixel, 세로 63pixel and 그림입니다.
원본 그림의 이름: CLP00003740000b.bmp
원본 그림의 크기: 가로 76pixel, 세로 56pixel denote the system matrices.



Ⅲ. TRANSIENT-PERFORMANCE-ORIENTED DISCRETE-TIME DESIGN OF A RESONANT CONTROLLER


A. Discrete-Time Design of Resonant Controller

According to the internal model principle, for zero steady-

state error, the model of external disturbances should be embedded in the controller. For the resonant control implemented in the stationary coordinates, the sinusoidal signals can be regarded as an external disturbance, which can be modeled as:

그림입니다.
원본 그림의 이름: CLP000037400030.bmp
원본 그림의 크기: 가로 1039pixel, 세로 191pixel     (5)

where 그림입니다.
원본 그림의 이름: CLP00003740000c.bmp
원본 그림의 크기: 가로 108pixel, 세로 61pixel represents the sinusoidal signals, and 그림입니다.
원본 그림의 이름: CLP00003740000d.bmp
원본 그림의 크기: 가로 63pixel, 세로 46pixel is the frequency of the sinusoidal signals. In general, the state-space formulation corresponding to (5) can be written as:

그림입니다.
원본 그림의 이름: CLP000037400031.bmp
원본 그림의 크기: 가로 2033pixel, 세로 450pixel     (6)

where 그림입니다.
원본 그림의 이름: CLP00003740000e.bmp
원본 그림의 크기: 가로 137pixel, 세로 63pixel and 그림입니다.
원본 그림의 이름: CLP00003740000f.bmp
원본 그림의 크기: 가로 138pixel, 세로 59pixel are two integral states corresponding to the sinusoidal signals.

In order to avoid discretization errors, the resonant poles in the discrete-time domain should have an accurate mapping relationship with those in the continuous-time domain. In this way, the discrete-time poles are set to 그림입니다.
원본 그림의 이름: CLP000037400010.bmp
원본 그림의 크기: 가로 133pixel, 세로 57pixel, and the discrete form of (6) can be written as:

그림입니다.
원본 그림의 이름: CLP000037400032.bmp
원본 그림의 크기: 가로 2639pixel, 세로 450pixel     (7)

For pole placement, two integral states 그림입니다.
원본 그림의 이름: CLP00003740002a.bmp
원본 그림의 크기: 가로 145pixel, 세로 64pixel and 그림입니다.
원본 그림의 이름: CLP00003740002b.bmp
원본 그림의 크기: 가로 156pixel, 세로 64pixel should be included in the model of the plant [30]. The discrete-time model (4) is then augmented with the internal model (7), resulting in:

그림입니다.
원본 그림의 이름: CLP000037400033.bmp
원본 그림의 크기: 가로 3289pixel, 세로 1730pixel     (8)

where 그림입니다.
원본 그림의 이름: CLP000037400011.bmp
원본 그림의 크기: 가로 62pixel, 세로 45pixel is the new state variable; 그림입니다.
원본 그림의 이름: CLP000037400012.bmp
원본 그림의 크기: 가로 315pixel, 세로 61pixel and 그림입니다.
원본 그림의 이름: CLP000037400013.bmp
원본 그림의 크기: 가로 87pixel, 세로 67pixel are the new system matrices; and T is used to represent the coefficient 그림입니다.
원본 그림의 이름: CLP000037400014.bmp
원본 그림의 크기: 가로 295pixel, 세로 69pixel.


그림입니다.
원본 그림의 이름: image28.png
원본 그림의 크기: 가로 655pixel, 세로 332pixel

Fig. 1. Block diagram of the proposed resonant control with full state feedback.


As shown in Fig. 1, in the proposed resonant controller, a reference feedforward path and a current feedback path are applied as the well-established state-space controller. Moreover, in order to realize more degrees of freedom for the resonant control, two integral states are both used in the controller, and a state corresponding to the previous control voltage is used as well. Correspondingly, the control law can be written as:

그림입니다.
원본 그림의 이름: CLP000037400034.bmp
원본 그림의 크기: 가로 2908pixel, 세로 633pixel     (9)

where 그림입니다.
원본 그림의 이름: CLP000037400015.bmp
원본 그림의 크기: 가로 341pixel, 세로 64pixel is the state-feedback gain after augmentation; 그림입니다.
원본 그림의 이름: CLP000037400016.bmp
원본 그림의 크기: 가로 302pixel, 세로 65pixelis the gain of the original states; 그림입니다.
원본 그림의 이름: CLP000037400017.bmp
원본 그림의 크기: 가로 350pixel, 세로 66pixel is the gain of the two integral states; and 그림입니다.
원본 그림의 이름: CLP000037400018.bmp
원본 그림의 크기: 가로 558pixel, 세로 66pixel stands for the integral states. Reference-feedforward is applied as well, and the corresponding gain is 그림입니다.
원본 그림의 이름: CLP000037400019.bmp
원본 그림의 크기: 가로 116pixel, 세로 61pixel. From (8) and (9), the dynamic of the closed-loop system is given as:

그림입니다.
원본 그림의 이름: CLP000037400035.bmp
원본 그림의 크기: 가로 3005pixel, 세로 651pixel     (10)

where 그림입니다.
원본 그림의 이름: CLP00003740001a.bmp
원본 그림의 크기: 가로 393pixel, 세로 65pixel is the output matrix. To mitigate the negative influences of grid voltage, the measured grid voltage is directly added into the controller output.


B. Transient-Performance-Oriented Design

There is a close connection between the transient tracking performance of the closed-loop control system and the controller properties. For the benefit of the controller design, the transient response time of the control loop should be directly designed by selecting the controller parameters. For example, when the control loop is designed for the tracking of dc signals, the reference of the control loop is:

그림입니다.
원본 그림의 이름: CLP000037400036.bmp
원본 그림의 크기: 가로 876pixel, 세로 175pixel     (11)

where A stands for the amplitude of the reference step.

It is well established that when the corresponding closed- loop system is configured to be a first-order plant, the tracking error between the actual plant output and the reference can be then formulated as:

그림입니다.
원본 그림의 이름: CLP000037400037.bmp
원본 그림의 크기: 가로 849pixel, 세로 163pixel     (12)

where 그림입니다.
원본 그림의 이름: CLP00003740001b.bmp
원본 그림의 크기: 가로 61pixel, 세로 45pixel is the bandwidth of the first-order plant.

In this manner, for the tracking of dc signals, different transient response time can be realized when the parameter 그림입니다.
원본 그림의 이름: CLP00003740001b.bmp
원본 그림의 크기: 가로 61pixel, 세로 45pixel is set to different values. As shown in Fig. 2, by selecting 그림입니다.
원본 그림의 이름: CLP00003740001b.bmp
원본 그림의 크기: 가로 61pixel, 세로 45pixel, different transient response time can be obtained correspondingly. In a similar manner, for ac reference tracking, it is anticipated that the transient response can be designed by properly selecting the controller parameters.


그림입니다.
원본 그림의 이름: image42.png
원본 그림의 크기: 가로 564pixel, 세로 374pixel

Fig. 2. Transient Response of dc signal tracking.


For the regulation of ac signals, the sinusoidal reference of the control loop can be written as:

그림입니다.
원본 그림의 이름: CLP000037400038.bmp
원본 그림의 크기: 가로 1419pixel, 세로 175pixel     (13)

In order to make the transient response time of the afore-mentioned dc signal tracking and that of the ac signal tracking approximately the same, the expected tracking error in ac systems can be formulated as:

그림입니다.
원본 그림의 이름: CLP000037400039.bmp
원본 그림의 크기: 가로 1408pixel, 세로 169pixel     (14)

To realize the tracking error as (14), the closed-loop poles of (10) need to be configured corresponding to different values of 그림입니다.
원본 그림의 이름: CLP00003740001b.bmp
원본 그림의 크기: 가로 61pixel, 세로 45pixel, which is similar to the direct design of the transient response time in the dc system. It should be noted that, as can be derived from (8), there are four open-loop poles that need to be placed. Specifically, the pole originating from the delay locates at z = 0, and another pole introduced by the original plant locates at 그림입니다.
원본 그림의 이름: CLP00003740001c.bmp
원본 그림의 크기: 가로 176pixel, 세로 57pixel. Moreover, the internal model (7) introduces two extra open-loop poles at 그림입니다.
원본 그림의 이름: CLP00003740001d.bmp
원본 그림의 크기: 가로 147pixel, 세로 55pixel.

With the control law as (9) applied, the aforementioned four open-loop poles can be arbitrarily placed in the closed-loop systems. Assuming the closed-loop poles are placed at the desired locations, the characteristic polynomial is given as:

그림입니다.
원본 그림의 이름: CLP00003740003a.bmp
원본 그림의 크기: 가로 2368pixel, 세로 151pixel     (15)

where 그림입니다.
원본 그림의 이름: CLP00003740001e.bmp
원본 그림의 크기: 가로 253pixel, 세로 56pixel and 그림입니다.
원본 그림의 이름: CLP00003740001f.bmp
원본 그림의 크기: 가로 58pixel, 세로 44pixel are the desired closed-loop poles. Since the pole originating from the delay is already optimal, it remains in the same location. In order to achieve the desired transient process as (14), two complex poles introduced by the internal model of the sinusoidal signals are chosen to be the dominant poles. Additionally, the real pole introduced by the original plant remains in the same place, and it can be canceled by the zero. In this way, the desired closed-loop poles can be expressed as:

그림입니다.
원본 그림의 이름: CLP00003740003b.bmp
원본 그림의 크기: 가로 2531pixel, 세로 181pixel     (16)

In addition to the closed-loop poles, two zeros originating from the reference feedforward need to be placed properly. One of the zeros is set to 그림입니다.
원본 그림의 이름: CLP000037400020.bmp
원본 그림의 크기: 가로 57pixel, 세로 45pixel, and another zero is set to 그림입니다.
원본 그림의 이름: CLP000037400021.bmp
원본 그림의 크기: 가로 301pixel, 세로 61pixel, as it is indicated in Fig. 3. Once the pole placement is determined, the controller gains can be automatically tuned using analytical expressions.


그림입니다.
원본 그림의 이름: image52.png
원본 그림의 크기: 가로 532pixel, 세로 473pixel

Fig. 3. Explanation of the designed pole placement.


In order to demonstrate that the controller proposed in this paper can realize the direct design of the transient response time, simulation validation is applied. According to the above-mentioned poles and zeros, the closed-loop transfer function of the designed system in the discrete-time domain can be directly written as:

그림입니다.
원본 그림의 이름: CLP00003740003c.bmp
원본 그림의 크기: 가로 1592pixel, 세로 345pixel     (17)

To verify the tracking performance of the designed controller, two different ac references are tested in simulation, and the corresponding expressions are given as:

그림입니다.
원본 그림의 이름: CLP00003740003d.bmp
원본 그림의 크기: 가로 1977pixel, 세로 389pixel     (18)

그림입니다.
원본 그림의 이름: CLP00003740003e.bmp
원본 그림의 크기: 가로 1990pixel, 세로 389pixel     (19)

Using the closed-loop transfer function and the ac references, the response of the ac signal tracking can be easily obtained, as it is shown in Fig. 4 and Fig. 5. To clearly illustrate the designable transient response time, simulation results of the dc system mentioned previously are also included in Fig. 4 and Fig. 5. It can be seen that the dc signal can be regarded as the envelope of the ac signal in both steady state and transient process. In this manner, the transient response time of ac reference tracking in resonant control can be directly designed, which is similar to the well-established design in dc systems.


그림입니다.
원본 그림의 이름: image59.png
원본 그림의 크기: 가로 688pixel, 세로 550pixel

Fig. 4. Response of the designed current loop when input is (18).


To further illustrate the anticipated performance, the tracking errors of both dc and ac signals in Fig. 4 and Fig. 5 are placed in a single figure, as it is shown in Fig. 6. It can be seen that the tracking errors of the designed system are eliminated within a certain time, and that the transient response times of both ac and the dc systems are the same. Therefore, in the design of resonant control, different values of 그림입니다.
원본 그림의 이름: CLP000037400022.bmp
원본 그림의 크기: 가로 63pixel, 세로 50pixel can be selected according to the desired transient response time. Then different poles and zeros are configured correspondingly to obtain the desired transient response time.


그림입니다.
원본 그림의 이름: image60.png
원본 그림의 크기: 가로 718pixel, 세로 609pixel

Fig. 5. Response of the designed current loop when input is (19).


그림입니다.
원본 그림의 이름: image61.png
원본 그림의 크기: 가로 644pixel, 세로 435pixel

Fig. 6. Tracking errors during the transient process.


In addition, in order to analyze the relationship between the parameter 그림입니다.
원본 그림의 이름: CLP000037400022.bmp
원본 그림의 크기: 가로 63pixel, 세로 50pixel and the crossover frequency of the resonant control loop, the open-loop transfer function of the designed system can be written as:

그림입니다.
원본 그림의 이름: CLP00003740003f.bmp
원본 그림의 크기: 가로 2247pixel, 세로 345pixel     (20)

The frequency response of (20), with the parameter 그림입니다.
원본 그림의 이름: CLP000037400022.bmp
원본 그림의 크기: 가로 63pixel, 세로 50pixel set to different values, is shown in Fig. 7. It can be seen that when the parameter 그림입니다.
원본 그림의 이름: CLP000037400022.bmp
원본 그림의 크기: 가로 63pixel, 세로 50pixel grows linearly, the crossover frequency of the resonant control loop is not linearly linked to 그림입니다.
원본 그림의 이름: CLP000037400022.bmp
원본 그림의 크기: 가로 63pixel, 세로 50pixel. In addition, the corresponding relationship between the crossover frequency and transient response time cannot be directly established. Thus, compared with the proposed design method, methods based on the direct selection of crossover frequency cannot be used to achieve the previously discussed designable transient response time.


그림입니다.
원본 그림의 이름: image62.png
원본 그림의 크기: 가로 605pixel, 세로 514pixel

Fig. 7. Bode plots of the open-loop transfer function.



Ⅳ. ANALYTICAL GAIN EXPRESSIONS


A. State-Feedback Gain

The desired characteristic polynomial (15) can be written as:

그림입니다.
원본 그림의 이름: CLP000037400040.bmp
원본 그림의 크기: 가로 2174pixel, 세로 180pixel     (21)

The coefficients of the polynomial are then expressed as functions of the closed-loop poles.

그림입니다.
원본 그림의 이름: CLP000037400041.bmp
원본 그림의 크기: 가로 1575pixel, 세로 625pixel     (22)

The characteristic polynomial of the closed-loop system (10) is:

그림입니다.
원본 그림의 이름: CLP000037400042.bmp
원본 그림의 크기: 가로 3308pixel, 세로 932pixel     (23)

From (21) and (23), the coefficients of the polynomial are expressed as the functions of the system parameters and state- feedback gains. Taking (22) into account, the relationships among the state-feedback gains, system parameters, and closed-loop poles are then established as:

그림입니다.
원본 그림의 이름: CLP000037400043.bmp
원본 그림의 크기: 가로 2548pixel, 세로 1142pixel     (24)

where the elements of the matrix M are:

그림입니다.
원본 그림의 이름: CLP000037400044.bmp
원본 그림의 크기: 가로 3113pixel, 세로 878pixel     (25)

In additon, the elements of the matrix W are:

그림입니다.
원본 그림의 이름: CLP000037400045.bmp
원본 그림의 크기: 가로 2250pixel, 세로 394pixel     (26)

The state-feedback gains can be obtained by solving 그림입니다.
원본 그림의 이름: CLP000037400023.bmp
원본 그림의 크기: 가로 313pixel, 세로 65pixel. However, it is difficult to accomplish this task in real-time applications. In order to realize real-time adaption, the matrix M in (24) is rewritten as:

그림입니다.
원본 그림의 이름: CLP000037400046.bmp
원본 그림의 크기: 가로 2983pixel, 세로 1116pixel     (27)

where the elements of the lower diagonal matrix L are:

그림입니다.
원본 그림의 이름: CLP000037400047.bmp
원본 그림의 크기: 가로 3188pixel, 세로 651pixel     (28)

and the elements of the upper diagonal matrix U are:

그림입니다.
원본 그림의 이름: CLP000037400048.bmp
원본 그림의 크기: 가로 2900pixel, 세로 1098pixel     (29)

The auxiliary matrix 그림입니다.
원본 그림의 이름: CLP000037400024.bmp
원본 그림의 크기: 가로 423pixel, 세로 69pixel is introduced. Assuming 그림입니다.
원본 그림의 이름: CLP000037400025.bmp
원본 그림의 크기: 가로 247pixel, 세로 61pixel, the elements of the auxiliary matrix are expressed as:

그림입니다.
원본 그림의 이름: CLP000037400049.bmp
원본 그림의 크기: 가로 1847pixel, 세로 625pixel     (30)

The analytical expressions for the controller gains are expressed as:

그림입니다.
원본 그림의 이름: CLP00003740004a.bmp
원본 그림의 크기: 가로 2420pixel, 세로 651pixel     (31)


B. Reference-Feedforward Gain

The numerator polynomial obtained from the closed-loop

model (10) is given as:

그림입니다.
원본 그림의 이름: CLP00003740004b.bmp
원본 그림의 크기: 가로 3140pixel, 세로 180pixel     (32)

As mentioned previously, one of the closed-loop zeros is used to cancel the pole 그림입니다.
원본 그림의 이름: CLP000037400026.bmp
원본 그림의 크기: 가로 55pixel, 세로 47pixel. Then the corresponding reference- feedforward gain is given as:

그림입니다.
원본 그림의 이름: CLP00003740004c.bmp
원본 그림의 크기: 가로 2396pixel, 세로 180pixel     (33)



Ⅴ. SIMULATION AND EXPERIMENTAL RESULTS

The performance of the proposed resonant control is experimentally verified with the experimental setup shown in Fig. 8. In the experiments, a 7.5-kW Danfoss VSC is used, and the control signals for VSC are received by the interface board installed on the converter. The control algorithms are implemented in a DSP TMS320F28379D, and the PWM implemented in the control system is set to double-update mode. For the safe operation of the switching devices, dead time is added in the PWM. The parameters of the entire experimental setup are listed in the Table I, and the structure of the current control system in the experiment is shown as Fig. 9.


그림입니다.
원본 그림의 이름: image83.png
원본 그림의 크기: 가로 547pixel, 세로 407pixel

Fig. 8. Photo of the experimental setup.


그림입니다.
원본 그림의 이름: image84.png
원본 그림의 크기: 가로 577pixel, 세로 363pixel

Fig. 9. Current control system.


TABLE I  SYSTEM PARAMETERS

Parameter

Symbol

Value

Parameter

Symbol

Value

Rated power

PN

7.5 kW

L filter inductance

Lf

6.6 mH

Dead time

Td

4 μs

Sampling frequency

fsamp

6/12 kHz

DC link load

Ld

175 Ω

Switching frequency

fs

3/6 kHz

L filter resistance

Rf

0.03 Ω

Controller parameter

그림입니다.
원본 그림의 이름: CLP000037400029.bmp
원본 그림의 크기: 가로 62pixel, 세로 50pixel

160π/300π rad/s


In order to evaluate the transient response of the proposed controller, a step in the amplitude of the current references is generated, and the corresponding experimental results are shown in Fig. 10. As can be observed, the tracking error in 그림입니다.
원본 그림의 이름: CLP000037400027.bmp
원본 그림의 크기: 가로 60pixel, 세로 65pixel axis is negligible, and it is primarily introduced by the dead time effect. In this way, the tracking error is mainly introduced in the 그림입니다.
원본 그림의 이름: CLP000037400028.bmp
원본 그림의 크기: 가로 49pixel, 세로 38pixel axis. When the parameter 그림입니다.
원본 그림의 이름: CLP000037400028.bmp
원본 그림의 크기: 가로 49pixel, 세로 38pixel is set to 160π, the tracking error in the 그림입니다.
원본 그림의 이름: CLP000037400028.bmp
원본 그림의 크기: 가로 49pixel, 세로 38pixel axis is eliminated in approximately 4.33ms. It should be noted that, according to the analysis, the error elimination time is 4.37ms (ln9/160π). Thus, the actual transient response time of the designed resonant control can approximately match that of the analysis. In Fig. 11, the error drops to zero in approximately 3.00ms when 그림입니다.
원본 그림의 이름: CLP000037400029.bmp
원본 그림의 크기: 가로 62pixel, 세로 50pixel is set to 230π, which can still correspond to the analysis (ln9/230π = 3.04ms). In Fig. 12, the transient process is approximately 2.32ms, and it also fits the analysis, which is 2.33ms (ln9/300π = 2.33ms). These results verify the direct mapping relationship between the control gain and the transient response time. In particular, the transient processes contain no oscillation, and the smooth transient processes improve the stability of the grid-connected system. In grid-connected systems, the total harmonic distortion (THD) of the injected currents should be lower than 5%. In order to confirm the THD of the grid current, a harmonic analysis is applied, and the results are presented in Fig. 13. As can be observed, with the parameters of the proposed controller set to different values, the THD is approximately the same. Additionally, in these cases, the THD of the grid current is always below 5%, which can satisfy the standards for grid interconnection.


Fig. 10. Dynamic response with αc = 160π and fs = 6kHz. (a) Three-phase currents. (b) Current and error in α axis. (c) Current and error in β axis.

그림입니다.
원본 그림의 이름: image85.png
원본 그림의 크기: 가로 1531pixel, 세로 384pixel

(a)

 

그림입니다.
원본 그림의 이름: image85.png
원본 그림의 크기: 가로 1531pixel, 세로 384pixel

(b)

 

그림입니다.
원본 그림의 이름: image85.png
원본 그림의 크기: 가로 1531pixel, 세로 384pixel

(c)


Fig. 11. Dynamic response with αc = 230π and fs = 6kHz. (a) Three-phase currents. (b) Current and error in α axis. (c) Current and error in β axis.

그림입니다.
원본 그림의 이름: image86.png
원본 그림의 크기: 가로 1515pixel, 세로 380pixel

(a)

 

그림입니다.
원본 그림의 이름: image86.png
원본 그림의 크기: 가로 1515pixel, 세로 380pixel

(b)

 

그림입니다.
원본 그림의 이름: image86.png
원본 그림의 크기: 가로 1515pixel, 세로 380pixel

(c)


Fig. 12. Dynamic response with αc = 300π and fs = 6kHz. (a) Three-phase currents. (b) Current and error in α axis. (c) Current and error in β axis.

그림입니다.
원본 그림의 이름: image87.png
원본 그림의 크기: 가로 1505pixel, 세로 377pixel

(a)

 

그림입니다.
원본 그림의 이름: image87.png
원본 그림의 크기: 가로 1505pixel, 세로 377pixel

(b)

 

그림입니다.
원본 그림의 이름: image87.png
원본 그림의 크기: 가로 1505pixel, 세로 377pixel

(c)


Fig. 13. THD of the grid side currents. (a) αc = 160π and fs = 6kHz. (b) αc = 230π and fs = 6kHz. (c) αc = 300π and fs = 6kHz.

그림입니다.
원본 그림의 이름: image88.png
원본 그림의 크기: 가로 1440pixel, 세로 391pixel

(a)

 

그림입니다.
원본 그림의 이름: image88.png
원본 그림의 크기: 가로 1440pixel, 세로 391pixel

(b)

 

그림입니다.
원본 그림의 이름: image88.png
원본 그림의 크기: 가로 1440pixel, 세로 391pixel

(c)


Additionally, to confirm the improved stable behavior introduced by the discrete-time design, the sampling frequency and the switching frequency of the converter are reduced, and the corresponding transient response is tested. For comparison, the continuous-time design method is also tested in the experiments. In the continuous-time design, the same pole placement is applied, and the designed controllers are discretized using Tustin with the prewarping method for minimization of the discretization error. In this manner, the difference between the continuous-time design and the discrete-time design is the model used for pole placement.

As shown in Fig. 14(a) and 15(a), the transient response time of both the continuous-time-designed controller and the discrete-time-designed controller are approximately the same in the case of fs = 5kHz. For a further comparison, the switching frequency of the converter is reduced to 4kHz. The effectiveness of the continuous-time design method is de- graded, since oscillations start to occur in the current of 그림입니다.
원본 그림의 이름: CLP00003740004d.bmp
원본 그림의 크기: 가로 49pixel, 세로 39pixel axis, as shown in Fig. 15(b). However, under the same conditions, the discrete-time design method can produce approximately the same transient response time as the analysis, and the transient process is smooth without oscillations, as can observed in Fig. 14(b). When the switching frequency is further reduced to 3.5kHz, the continuous-time design method fails to guarantee its performance during the transient process. In addition, obvious oscillations can be observed, as indicated in Fig. 15(c). As a comparison, even when the switching frequency is set to 3kHz, the discrete- time design method can still produce a relatively good performance during the transient process. It worth noting that the error- elimination time is approximately 2.30ms, which still corresponds to the analysis, as indicated in Fig. 14(c).


Fig. 14. Dynamic response of the discrete-time design with αc = 300π and different fs. (a) fs = 5kHz. (b) fs = 4kHz. (c) fs = 3kHz.

그림입니다.
원본 그림의 이름: image89.png
원본 그림의 크기: 가로 1529pixel, 세로 374pixel

(a)

 

그림입니다.
원본 그림의 이름: image89.png
원본 그림의 크기: 가로 1529pixel, 세로 374pixel

(b)

 

그림입니다.
원본 그림의 이름: image89.png
원본 그림의 크기: 가로 1529pixel, 세로 374pixel

(c)


Fig. 15. Dynamic response of the continuous-time design with αc = 300π and different fs. (a) fs = 5kHz. (b) fs = 4kHz. (c) fs = 3kHz.

그림입니다.
원본 그림의 이름: image90.png
원본 그림의 크기: 가로 1546pixel, 세로 377pixel

(a)

 

그림입니다.
원본 그림의 이름: image90.png
원본 그림의 크기: 가로 1546pixel, 세로 377pixel

(b)

 

그림입니다.
원본 그림의 이름: image90.png
원본 그림의 크기: 가로 1546pixel, 세로 377pixel

(c)


To produce a comparison between the conventional linear controller and the proposed controller, the well-established method presented in [37] is applied, and the corresponding simulation results are presented in Fig. 16. As can be observed in Fig. 16(a), when the conventional method is applied, undesired oscillations occur in the transient process. However, under the same test conditions, the transient response is fast without obvious oscillations when the proposed controller is adopted, as shown in Fig. 16(b).


Fig. 16. Simulation comparison with the conventional method. (a) The conventional linear controller. (b) The proposed transient- performance-oriented resonant controller.

그림입니다.
원본 그림의 이름: image91.png
원본 그림의 크기: 가로 1122pixel, 세로 396pixel

(a)

 

그림입니다.
원본 그림의 이름: image91.png
원본 그림의 크기: 가로 1122pixel, 세로 396pixel

(b)



Ⅵ. CONCLUSION

In this paper, a transient-performance-oriented resonant controller is proposed for the current control of grid- connected converters. Specifically, for the direct discrete-time design, an accurate discrete-time hold-equivalent model is established with the ZOH characteristic and the digital delay simultaneously taken into account. According to the direct mapping relationship between the control gain and the transient response time, the poles and zeros are precisely configured to achieve the desired transient performance. In order to implement the controller automatic tuning straight- forwardly, the analytical expressions for the controller gains are given as functions of desired transient response time and system parameters. When compared with the corresponding continuous-time design, the proposed method can guarantee the transient performance even under a low switching frequency. Additionally, all of the properties of resonant controllers, such as the two-sequence tracking capability, the simple control structure, and the reduced computational burden are perfectly retained. For validation, a number of simulations and experiments are carried out, and the corresponding results confirm that the proposed transient-performance-oriented design method can realize the direct design of the transient response time.



ACKNOWLEDGMENT

This paper is supported by the National Natural Science Foundation of China (Grant No.51877150, No.51477113).



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Zhanfeng Song was born in Hebei, China, in 1982. He received the B. S., M. S., and Ph. D. degrees from the Tianjin University, Tianjin, China, in 2004, 2006, and 2009, respectively, all in electrical engineering. He is currently an Associate Professor of Electrical Engineering at the School of Electrical and Information Engineering, Tianjin University, China. His research interests include electrical machines and their control systems. He was the recipient of the 2018 Best Paper Award, First Prize, from IEEE Industry Applications Society Industrial Drives Committee. He served as a Guest Editor for IEEE Transactions on Industrial Informatics.


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Yun Yu was born in Jiangsu, China, in 1993. He received the B.S. degree in electrical engineering from China University of Mining and Technology, Xuzhou, China, in 2016. He is currently working towards the M.S. degree in electrical engineering, at the School of Electrical and Information Engineering, Tianjin University, China. His research interests include electrical drives and power electronics.


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Yaqi Wang was born in Jiangsu, China, in 1995. She received the B.S. degree in automation from Jiangsu University, Zhenjiang, China, in 2017. She is currently working towards the M.S. degree in electrical engineering, at the School of Electrical and Information Engineering, Tianjin University, China. Her research interests include electrical drives and power electronics.


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Xiaohui Ma was born in Shanxi, China, in 1996. She received the B.S. degree in Taiyuan University of Technology, Taiyuan, China, in 2018. She is currently working towards the M.S. degree in electrical engineering, at the School of Electrical and Information Engineering, Tianjin University, China. Her research interests include electrical drives and power electronics.