https://doi.org/10.6113/JPE.2019.19.4.1045

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Fast Extraction of Symmetrical Components from Distorted Three-Phase Signals Based on Asynchronous-Rotational Reference Frame

Tianqu Hao^†, Feng Gao^*, and Tao Xu^**

^†,*School of Electrical Engineering, Shandong University, Jinan, China

Abstract

A symmetrical component decomposition scheme utilizing the characteristics of the asynchronous rotational reference frame transformation is proposed in this paper for the extraction of the positive and negative sequence components of distorted three-phase grid voltages. The undesired frequency component can be removed using a specially designed series coordinate transformation and half-cycle delays, where the delay can be controlled by adjusting the frequency of the rotating reference frame. The extracted symmetrical component can then be compensated based on the applied coordinated transformation. The dynamic response of the proposed algorithm is improved when compared to that of conventional methods. The effectiveness of the proposed algorithm is verified by simulation and experimental results.

Key words: Asynchronous rotational reference frame, Harmonics, Phase sequence, Symmetrical component

Manuscript received Nov. 28, 2018; accepted Apr. 30, 2019

Recommended for publication by Associate Editor Kai Sun.

^†Corresponding Author: haotianqu@sdu.edu.cn, Tel: +86-531-8169-6192, Shandong University

^*School of Electrical Engineering, Shandong University, China

Ⅰ. INTRODUCTION

With the large-scale application of grid-connected equipment for new energy generation, grid-connected converters need to provide grid-friendly support functions such as low voltage ride through [1], [2], power support [3], [4] and so on. In addition, non-linear loads and various electrical equipment introduce low-order harmonics into grid. These harmonics impose higher requirements for the grid-connected control of distributed energy sources. Therefore, grid-connected converters need to have the ability to simultaneously control positive and negative sequence currents under grid voltage distortion conditions [2]-[4].

Extracting the fundamental symmetrical components from distorted voltage signals is an important part of grid-connected converter control systems. The traditional symmetrical component extraction methods are mainly composed of coordinate system transformations and filters. Typical methods include the notch filter method, half-cycle delay method, low-pass filtering method and double decoupling synchronous coordinate system phase-locking method. Taking the extraction of the positive- sequence symmetry component as an example, the notch filter method has a fast transient response speed. However, a single notch-filter is not enough to filter out the negative- sequence signal while attenuating the harmonic signals. Therefore, additional filtering stages are required to deal with the influences of low-order harmonics [5], [6]. The half-cycle delay method [7], [8] is similar to the notch filter method except that it has a lower computational load. However, it cannot effectively and reliably suppress low-order harmonics, and the transient response performance is not as good as the notch filter method [9]-[12]. Low-pass filtering usually results in a poor transient response due to a low cutoff frequency [9]-[13]. Like the low-pass filtering method, the double decoupling synchronous coordinate system phase-locking method requires a low-pass filter to stabilize the system. There is also a problem due to its poor transient response. However, it has the advantage of a low steady-state error when compared with the low-pass filtering method [13]-[16].

The control of grid-tied converters relies on the fast response of the PLL, especially during unbalanced and harmonic distorted grid conditions [17]. The fast response of the symmetrical component extraction and PLL is vital [17], [18]. The studies mentioned above show that technology is developing towards a faster response and harmonic immunity. However, the conventional methods are limited due to their coordinate transformation and linear filtering. To obtain optimized performance, the tuning and implementation of the symmetrical component extraction and PLL are fixed. Further reducing the duration of transients is a challenge. The authors of [19] proposed a method for quickly extracting the positive and negative sequence components of fundamental waves using a non-synchronous rotating coordinate system, which has a negligible time delay in theory. However, the countermeasures for grid distortion are not fully discussed.

In this paper, a method for the fast extraction of symmetrical components under distorted and asymmetrical grid voltage conditions is proposed based on the non-synchronous rotating coordinate system with specially designed series coordinate transformation and half-cycle delays. The control parameters are selected in combination with the harmonic characteristics. In addition, the phase sequence decomposition and low-order harmonic filtering functions are completed at the same time. When compared with the traditional methods, the proposed method has the advantage of a fast transient response, which is verified by simulation and experimental results.

Ⅱ. GUIDELINES FOR FINAL MANUSCRIPT PREPARATION

There are many methods for phase sequence decomposition when the grid voltage is distorted. This section briefly introduces their working principles by taking the widely used notch filter method and the double decoupling coordinate system phase-locking method as examples.

A. Notch Filter Method

The negative sequence component becomes a double frequency component when an asymmetrical three-phase signal is transformed by the dq0 coordinate system. Using this feature to set a notch filter corresponding to this frequency on a positive sequence dq axis can filter out the negative sequence component. The dynamic response of the notch filter is better than using a low pass filter with a lower cutoff frequency. However, a single notch filter cannot filter out the typical low order harmonics that can exist in the sampled voltages (e.g. 5th, 7th, 11th and 13th harmonics). In power systems, the typical low order harmonics are in different phase sequences. The commonly encountered 5th and 11th harmonics are negative sequence harmonics while the 7th and 13th harmonics are positive sequence harmonics [20]. This character introduces some interesting features after coordinate transformation. In the positive sequence dq transformation, the 5th and 7th harmonics are represented as the 6th harmonic on the dq axis. Meanwhile, the 11th and 13th harmonics are represented as the 12th harmonic. This actually facilitates the signal filtering. Therefore, only two additional notch filters are required for filtering unwanted fluctuations in the dq axis. A corresponding block diagram is shown in Fig. 1.

Fig. 1. Schematic diagram of positive sequence component extraction by the notch filter method.

The transfer function of the notch filter is:

              (1)

Where ω_c represents the frequency filtered by the notch filter, and e decided the frequency selectivity of the notch filter.

B. Double Decoupling Coordinate System Phase Lock Method（DD-SRF-PLL）

The DD-SRF-PLL makes the dq transformation for the original three-phase signals by using two rotating coordinate systems synchronized with the positive sequence and the negative sequence. Through the closed-loop decoupling network, as shown in Fig. 2, the results obtained by transforming the two coordinate systems eliminate fluctuations on the dq axis of the other side. In the steady state, the positive sequence and the negative sequence decoupling networks output the DC dq components of the corresponding phase sequence. To maintain the stability of this closed-loop system, the output of the decoupling network needs to pass a first-order low-pass filter to filter out high-order fluctuations. According to the authors of [16], the cutoff frequency of this low-pass filter should be 0.707 times of the fundamental frequency to achieve a compromise between the dynamic response and the stability. This low-pass filter stabilizes the decoupling network, and filters out the influences of harmonics in the original signal. However, its lower cutoff frequency limits the dynamic response of the system.

Fig. 2. Schematic diagram of positive sequence component extraction by the DD-SRF-PLL method.

Ⅲ. POSITIVE AND NEGATIVE SEQUENCE DECOMPOSITION METHOD BASED ON THE ASYNCHRONOUS ROTATING COORDINATE SYSTEM

This section gives a detailed introduction to the working principle of the method proposed in [17]. It also provides a theoretical basis for the introduction of the method proposed in this paper.

A. Basic Principle of Asynchronous Rotating Coordinate System Transformation

The asynchronous rotating coordinate transformation and the traditional synchronous dq coordinate transformation are quite different in terms of the following two aspects. Firstly, the traditional dq0 coordinate system transformation rotates synchronously with the positive sequence fundamental wave vector. In the steady state, the positive sequence fundamental frequency component appears as a DC component on the dq axis. On the other hand, the non-synchronous rotating coordinate system is intentionally not synchronized with the positive sequence fundamental frequency component. Therefore, after this coordinate system transformation, the positive sequence quantity is the AC fluctuation quantity, and the negative sequence component can be the high frequency AC fluctuation quantity by selecting the appropriate rotation frequency of the coordinate system. Secondly, after the synchronous dq coordinate system transformation, the 5th and 7th harmonics are represented as the 6th harmonic on the dq axis, and the 11th and 13th harmonics are superimposed into the 12th harmonic. Meanwhile, in the non-synchronous coordinate system, the above superposition relationship no longer exists, and the appropriate coordinate system rotation frequency must be carefully selected to obtain a new harmonic superposition relationship to achieve easy filtering.

The transformation matrix of the traditional synchronous dq coordinate system is:

              (2)

Where the angle θ of the coordinate system can be set as:

                               (3)

where w_n=w×N, w is the fundamental angular velocity, and N is the adjustable control parameter. Then, the dq variable transformed by (2) is the AC quantity, and its frequency is (N-1)w. When the asymmetrical three-phase signal contains both positive and negative sequence components, it can be expressed as:

      (4)

Then, by a non-synchronous rotating coordinate system transformation of (2), (4) can be further derived as a dq signal composed of the positive sequence dq signal and the negative sequence dq signal.

positive sequence:  (5)

negative sequence:  (6)

When N increases, the frequency of the negative sequence signal increases and the corresponding cycle-length decreases.

B. Half-Wave Delay Method for Specific Order Frequency Components Elimination

The basic principle of the half-cycle delay method is to make a half-cycle delay for a sinusoidal signal and add it to the original real-time signal. At the steady state, the sinusoidal signal can be cancelled. The half-wave delay method is used here to eliminate certain known frequency components. A block diagram of this method is shown in Fig. 3. When the three-phase system undergoes a one phase or two phase voltage dip, the positive sequence component after the voltage transient should be obtained in a time defined by the half-cycle delay, which is tuned for eliminating the negative sequence signal after the non-synchronous rotating coordinate system transformation. The resulting time delay τ should be:

                     (7)

Fig. 3. Schematic diagram of the half-cycle delay method.

C. Fundamental Amplitude and Phase Angle Compensation

The negative sequence component is eliminated by the half-cycle delay method, while the original signal including the positive sequence component is delayed and added to the original signal at the same time. The frequency of the positive sequence component is different from that of the negative sequence component. Consequently, the positive sequence component is not eliminated by the delay stage designed according to the period of the negative sequence component. Therefore, the phase of the positive sequence component changes. To obtain the original positive sequence signal, the signal after the half-wave delay must be compensated.

According to (5), the positive sequence quantity can be calculated by:

           (8)

After the half-cycle delay of the negative sequence component, the positive sequence component is:

       (9)

where:

                                  (10)

Then it is superimposed with the real-time signal:

         (11)

The original positive sequence signal can be extracted from (11) after compensating the amplitude and phase angle. The compensation coefficients for the amplitude and phase angle are:

                          (12)

   (13)

After the compensation by (12), the coordinate system transformation of (13) can be used to convert the non- synchronous rotation coordinate system into a synchronous coordinate system signal.

A principle block diagram of positive and negative sequence component extraction using non-synchronous rotating coordinate system transformation is shown in Fig. 4.

Fig. 4. Schematic diagram of phase sequence decomposition using non-synchronous rotating coordinate system transformation.

D. Frequency and Phase Angle Tracking Using a Synchronized Reference Frame Phase-Locked-Loop

The frequency and phase angle are tracked so the coordinate transformation can be carried out. It is especially important to obtain the frequency of the signals since this is a key parameter for setting the delay time adopted in the proposed method for removing a specific frequency component. Since the proposed method removes the harmonics and negative sequence component, the dq signal in DC form can be utilized to drive the conventional synchronized reference frame phase-locked-loop (SRF-PLL).

In the proposed method, as mentioned above, the frequency is especially important. The PLL is adopt for this purpose. This is done based on the SRF-PLL in the steady state, the frequency is the sum of the feed-forward frequency and the output of the integral gain of the adopted proportional-integral regulator. The proportional gain only outputs a non-zero value during the transient stage, which is not the true value of the signal frequency. Thus, it is neglected. The block diagram below shows the structure of the SRF-PLL adopted in this paper. The dq signals are unified in the first stage, which limits the range of the input to the PLL from -1 to 1, depending on the phase angle. This is important since the amplitude of the signal may change in actual practice. This results in a corresponding change in the dynamics of the PLL. By unifying the dq values, the tuning of the PLL becomes valid for inputs with different amplitudes.

Ⅳ. FAST EXTRACTION METHOD OF THE POSITIVE AND NEGATIVE SEQUENCE COMPONENTS UNDER VOLTAGE DISTORTION CONDITIONS

As introduced before, in the synchronous rotating coordinate system, the 5th and 7th harmonics become the 6th harmonic superposition, and the 11th and 13th harmonics become the 12th harmonic superposition. However, in the non-synchronous rotating coordinate system, the above superposition relationship no longer holds. According to the selected N of n, the above harmonic frequency changes after the non-synchronous rotating coordinate transformation. The corresponding new harmonic frequency ω_dqh is the difference between the original harmonic frequency and the coordinate system frequency:

          (14)

where original harmonic frequency ω_h is:

                   (15)

where H is the harmonic order. Equation (14) can be further expressed as:

          (16)

To introduce as little delay as possible into the algorithm and to simplify it at the same time, the following principles are proposed.

• Different harmonics should be transformed into the same frequency component after the non-synchronous rotating coordinate transformation.

• The difference between H and N should be made as large as possible.

For example, when N is 4, the 5th and 13th harmonics appear as the 9th harmonic in the rotating coordinate system, as illustrated by the blue curve in Fig. 6. When N is -2, the 7th and 11th harmonics become the 9th harmonic, as shown by the red curve in Fig. 5. It can be seen that it is convenient to filter out the 5th, 7th, 11th and 13th harmonics by setting N to 4 and -2 for the two coordinate system transformations.

Fig. 5. SRF-PLL adopted in the research.

Fig. 6. Illustration of harmonic superposition when N is set to 4 and -2.

Fig. 7 is a schematic diagram of the specific implementation of the proposed method. When compared with Fig. 4, it can be seen to include three coordinate system transformations and three half-wave delay filtering. Assuming that the AC system is a 50 Hz system, the first coordinate system transformation is to redefine the three phase signals on the 200Hz reference frame, which is rotating four times faster than the fundamental vector. In this coordinate system, a half- wave delay can be used to filter out the negative sequence components. After that, the half-wave delay is constructed for the 9th harmonic frequency which is composed of the 5th and 13th. Then the 5th and 13th harmonics are filtered out. In the 200 Hz rotating coordinate system, the change of the positive sequence quantity caused by filtering out the negative sequence component is compensated. The coefficient and angle of the compensated amplitude are given by equation (12), and the associated influence due to filtering out the higher harmonics is carried out after all of the filtering has been completed. Then referring to equation (12), the transformation from the 200Hz rotating coordinate system to the -100Hz rotating coordinate system is performed. In this coordinate system, there is a 9th harmonic frequency component composed of the 7th and 11th harmonics in the original signal. In addition, the 9th harmonic is filtered out by the same half-wave delay link, after the transformation of equation (12). To compensate the amplitude changed by the half-cycle delays, a coefficient of 1/3 is adopted.

Fig. 7. Schematic diagram of the proposed method.

The coordinate system transformations at 200Hz and -100Hz have the following characteristics. The four harmonic components are divided into two groups, so that only two delay links need to be used to complete the filtering. Through the coordinate system transformation, the harmonics are classified into the 9th harmonic. The 9th harmonic frequency is relatively high, and the delay caused by the filtering is small, at 1.1ms. In addition, through the coordinate system transformation performed by this method, the fundamental frequency becomes the positive 3rd and the negative 3rd in the two coordinate systems, and an equal delay is performed each time. The phase angle shifts caused by the two delays can cancelled each other out, whose corresponding vector diagram is shown in Fig. 7. Therefore, only the amplitude of the positive sequence component needs to be compensated, which simplifies the algorithm design.

Ⅴ. SIMULATION AND EXPERIMENTAL RESULTS

The proposed method is verified via MATLAB simulations. The Per Unit value is adopted. The asymmetrical three-phase signal contains the 5th, 7th, 11th and 13th harmonic components, and their harmonic amplitudes are 5%, 4%, 3% and 2% of the fundamental amplitude, respectively. At 0.1 second, the C-phase voltage drops by 80%. Waveforms of the three-phase voltage are shown in Fig. 8.

Fig. 8. Variation illustration of the fundamental wave vector in two delays.

Simulation results comparing the dynamic responses of the proposed method, the notch-filtering method and the DD- SRF-PLL method are presented. The estimated dq signals using the proposed method are demonstrated as the blue curves in Fig. 9 and Fig. 10. Before 0.1 seconds, the three- phase grid voltage is symmetrical, and the results of three types of positive and negative sequence extraction algorithms are consistent. The harmonics have been filtered out through the filtering stage since the dq signal in the synchronous coordinate system is free of harmonics, which proves that the system is effective in terms of harmonic filtering. At 0.1 second, an 80% voltage dip occurs in phase C. The amplitude of the positive sequence component drops correspondingly. The simulation results presented in Fig. 9 and Fig. 10 show that the proposed method has obvious advantages over the notch-filtering method and the DD-SRF-PLL method in terms of dynamic response. The proposed method achieves the steady state within 4.3ms, which is consistent with the system design. Both of the traditional methods require more than 10ms to reach the steady state. When the system reaches its new steady state, the synchronous dq signals are in DC terms.

Fig. 9. Harmonic distorted and unbalanced three-phase voltages.

Fig. 10. Positive sequence d-axis component.

Fig. 11. Positive sequence q-axis component.

An experimental verification is carried out for comparing the dynamics of the proposed method and the other two methods (the notch-filtering method and the DD-SRF-PLL method). 110V/50Hz fundamental three-phase voltages are provided using a Ls4500 AC power source. The higher AC voltage is not further tested due to load constrains. A dSPACE RTI 1103 platform was used for processing the sampled signals and for executing the proposed algorithm.

The extracted dq signals of the fundamental positive sequence signals are converted via D/A channels and are recorded by a scope. The experimental platform is as shown in Fig. 12. In the experiment, the PLL is adopted with a proportional gain of 2 and an integral gain of 5 for the PI regulator in the PLL.

Fig. 12. Experiment setup.

The first experiment was conducted is to evaluate the fundamental symmetrical component extraction from pure sinusoidal waveforms. A single voltage dip is applied on phase C which has an 80% voltage drop. The three-phase voltage waveforms are shown in Fig. 13 and Fig. 15. These results show that the duration of the transient of the proposed method is clearly smaller than that of the conventional methods as can be seen in Fig. 14 and Fig. 16.

Fig. 13. Three-phase signals with a single-phase voltage dip for a comparison between the proposed method and the notch-filtering method.

Fig. 14. Comparison between the dynamic performance of the proposed method and the notch-filtering method without harmonic filtering.

Fig. 15. Three-phase signals with a single-phase voltage dip for a comparison between the proposed method and the DD-SRF-PLL method.

Fig. 16. Comparison between the dynamic performance of the proposed method and the DD-SRF-PLL method without harmonic filtering.

The second test was conducted to verify the performance of the proposed symmetrical component extraction method for processing harmonic distorted signals. The 5th, 7th, 11th and 13th harmonics are added with RMS values of 20%, 15%, 10% and 5% of the fundamental component, respectively. A single-phase voltage dip is emulated. Again, the fundamental component of the phase C voltage is dropped to 20% of the original signal as shown in Fig. 17. This transient is used to test the dynamic performance of the proposed method. A comparison is made between the results obtained from the proposed method and the notch filtering method. The notch

Fig. 17. Harmonic distorted three-phase signals with a single- phase voltage dip.

filters are tuned to remove the 100, 300 and 600Hz frequency components. Therefore, the ω_c in the transfer function shown in Equation 1 is 200p, 600p and 1200p for each of the filtering stages with e=0.9 for all of the stages in order to balance the settling time and stability. Experimental results of both the proposed method and the notch filtering method are as shown in Fig. 18 and a comparison to the DD-SRF-PLL is shown in Fig. 19. It is obvious that the proposed method has less time delay during the transient as expected.

Fig. 18. Comparison between the dynamic performance of the proposed method and the notch-filtering method.

Fig. 19. Comparison between the dynamic performance of the proposed method and the DD-SRF-PLL method.

Finally, a comparison of the computational time among the presented methods is provided in Table I. The computational burden of the proposed method is slightly high than that of the notch-filtering method but much less than the DD-SRF- PLL. Using a TMS32028335 as the DSP for signal processing, the computational time is less than 3 micro-seconds, which is sufficiently small for current control applications.

TABLE I  COMPUTATIONAL TIMES OF THE PRESENTED METHODS

	Proposed method	Notch filtering	DD-SRF-PLL
Sum	23	32	41
Product	46	36	63
sin	7	3	8	Look-up table
cos	9	3	8	Look-up table
Square root	2	2	4	Constants
Computation Cycle	386	332	543
Computation Time (ms)	2.58	2.22	3.62	Based on 150MHz

Ⅵ. CONCLUSION

In this paper, a method for extracting the symmetrical components from distorted and asymmetrical grid voltage is proposed, where the series asynchronous coordinate transformation and half-cycle delays are employed for removing selected harmonic frequency components. By tuning the frequency of the asynchronous coordinate reference frame, several harmonics can be grouped to minimize the number of the delays needed to extract a pure fundamental positive sequence signal, and to minimize the introduced delay. The delay introduced is smaller than that via conventional methods, which is verified by simulation and experimental results.

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Tianqu Hao (M’17) received the B.Eng. degree in electronic engineering from the Ocean University of China, Qingdao, China, in 2008, and the M.Sc. and Ph.D. degrees in electrical engineering from Durham University, Durham, U.K., in 2009 and 2017, respectively. In 2017, he joined Shandong University, Jinan, China, as a Lecturer. His current research interests include control of power electronic devices and flexible transmission technologies.

Feng Gao (S’07–M’09) received the B.Eng. and M.Eng. degrees in electrical engineering from Shandong University, Jinan, China, in 2002 and 2005, respectively, and the Ph.D. degree in electronical engineering from the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, in 2009. From September 2006 to February 2007, he was a Visiting Scholar at the Institute of Energy Technology, Aalborg University, Aalborg, Denmark. From 2008 to 2009, he was a Research Fellow with the Nanyang Technological University. Since 2010, he has been with the School of Electrical Engineering, Shandong University, where he is currently a Professor and serving as a Vice Dean. Prof. Gao is currently serving as an Associate Editor for the IEEE Transactions on Power Electronics. He was the recipient of the IEEE Industry Applications Society Industrial Power Converter Committee Prize for a paper published in 2006 and the IEEE Power Electronics Transactions Second Prize Paper Award in 2017.

Tao Xu (S’16) received his B.Eng. degree in electrical engineering from Shandong University, Jinan, China, in 2014, where he is currently working toward his Ph.D degree. His research interests are power quality, AC/DC microgrid and modulation methods. Tao Xu was the recipient of the IEEE Power Electronics Transactions Second Prize Paper Award in 2017.