사각형입니다.

https://doi.org/10.6113/JPE.2018.18.5.1293

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Integrated Bidirectional Three-Port DC–DC Converter with Ripple-Free Input Current and Soft Switching


Parastou KhademiAstaneh*, Javad Javidan, Khalil Valipour*, and Adel Akbarimajd*


†,*Technical Engineering Department, University of Mohaghegh Ardabili, Ardabil, Iran



Abstract

Multiport power converters have recently become popular to researchers and engineers. However, more improvements are required in terms of their soft-switching operation, bidirectional operation, and integration. In this study, a bidirectional three-port three-switch DC–DC converter is proposed. The converter contains a low-current ripple port and ripple-free current port. Through the integrated structure, utilization of a coupled inductor, and a new switching strategy, the aforementioned specifications are achieved. A modified switching strategy is also utilized in the converter, which has resulted in the bidirectional operation of the converter between ports. Finally, a comprehensive analysis is presented, and the converter characteristics are validated by experimental results.


Key words: Bidirectional port, Multiport DC–DC converter, Renewable energy, Ripple-free port, Soft switching


Manuscript received Feb. 10, 2018; accepted Jun. 6, 2018

Recommended for publication by Associate Editor Chun-An Cheng.

Corresponding Author: javidan.javad@gmail.com Tel: +98-45-30515714, Fax: +98-45-33512904, University of Mohaghegh Ardabili

Technical Engineering Department, Univ. of Mohaghegh Ardabili, Iran



Ⅰ. INTRODUCTION

The increase in air pollution and global warming and the reduction of fossil fuel resources have urged engineers to use green energies, such as wind and photovoltaic energies. The use of power electronics has been essentially applicable for utilizing these types of energy resources [1]-[4]. However, due to the reliability problems of such resources, utilizing energy storage units and other energy resources aside from the main energy resource is inevitable [5]-[10]. These systems can consist one unique converter having several ports, and all energy resources and loads are connected to the converter. The aforementioned unique converter is called multi-input or multiport converter. Utilizing such converters has the advantages of increasing system efficiency and reliability and improving system dynamics due to the use of a central controller.

Many converters have been proposed in the literature to manage power between different sources. Refs. [11]-[14] discussed multiport converters with time-sharing strategy to control power. In such converters, a complex control strategy is required, which is the result of changing the switching pattern in various power transfer situations. In Ref. [15], a family of three-port converters was introduced by integrating conventional buck, boost, and buck boost converters. In Ref. [16], an isolated double-input DC–DC converter was proposed based on the use of an alternative pulsating source. In Ref. [17], a four-port DC–DC converter with soft-switching and time-sharing power management strategy was introduced. In Ref. [18], a four-port converter was proposed based on transformer isolation. However, the aforementioned converters suffer from bidirectional operation and soft-switching performance. To achieve bidirectional operation, Ref. [19] proposed a novel structure, which however suffers from the hard switching operation of the switches. In addition, the converter utilizes six semiconductors, which increases cost. In Ref. [20], a single-inductor three-port converter was proposed in which a special structure called storage-switch diode is used. The aforementioned converter includes bidirectional operation, but it utilizes six semiconductor components and the input ports suffer from current ripples. The aim of this study is to propose a converter with a low number of semiconductor components and low current ripple. Current ripples can affect the efficiency of power sources especially for fuel cells.

In this study, a three-port DC–DC converter was proposed based on the topology presented in Ref. [6]. The proposed structure utilizes three switches with a special switching strategy, which enables the converter to transfer power from one port to another and allows the converter to always operate in a continuous conduction mode. In addition, through the utilization of a coupled inductor in the topology, the current of port 2 became ripple free, which is excellent for renewable energy resources as their performance depends on the current ripple. The main features of the proposed converter are listed below:

⋅ Utilization of only three switches

⋅ Bidirectional operation of all ports

⋅ Simple controller is required due to single-mode operation (only one switching modulation is used for all power flow directions).

⋅ Soft switching of three switches

⋅ Ripple-free input current of port 2

The paper is organized as follows. Section ‎II reviews the conventional three-switch converter and presents the operating modes of such converter. Section III presents the proposed improved structure, whose main capabilities are soft switching, ripple-free input current, and bidirectional operation of all ports. In this section, the operation of proposed converter is also presented for all time intervals. Section IV comprehensively discusses design considerations. Finally, Section V illustrates the experimental results that validate the performance of the proposed converter.



Ⅱ. CONVENTIONAL THREE-SWITCH CONVERTER

The three-switch converter proposed in Ref. [6] is illustrated in Fig. 1(a). The converter, which contains three switches, two inductors, and one capacitor, operates as an integrated boost–boost converter. The switching pattern applied to the converter is shown in Fig. 1(b), in which S1 and S2 are triggered complementarily. As shown in the figure, the converter includes five time intervals. To investigate the converter operation, the following initial conditions of the converter (the status of the converter at time t=t0) are considered:

그림입니다.
원본 그림의 이름: CLP00000f4005cb.bmp
원본 그림의 크기: 가로 306pixel, 세로 75pixel, 그림입니다.
원본 그림의 이름: CLP00000f400001.bmp
원본 그림의 크기: 가로 316pixel, 세로 87pixel.

⋅ All the parasitic components of the circuit are neglected.


Fig. 1. Conventional three-switch converter: (a) Circuit, (b) Gates’ pulses.

그림입니다.
원본 그림의 이름: CLP00000f400003.bmp
원본 그림의 크기: 가로 1212pixel, 세로 712pixel

(a)

그림입니다.
원본 그림의 이름: CLP00000f400004.bmp
원본 그림의 크기: 가로 772pixel, 세로 854pixel

(b)


Consequently, the operating intervals can be described as follows:

Interval 1—[t0, t1]: At time t=t0, S2 is turned off. After that, if 그림입니다.
원본 그림의 이름: CLP00000f400002.bmp
원본 그림의 크기: 가로 198pixel, 세로 73pixel, then a soft switching of switch S1 may occur. That is, if 그림입니다.
원본 그림의 이름: CLP00000f400002.bmp
원본 그림의 크기: 가로 198pixel, 세로 73pixel, by turning off switch S2, then current i2 will flow through the drain-source capacitors of S1 and S2. This event results in the discharging of 그림입니다.
원본 그림의 이름: CLP00000f400006.bmp
원본 그림의 크기: 가로 138pixel, 세로 81pixel and the charging of 그림입니다.
원본 그림의 이름: CLP00000f400005.bmp
원본 그림의 크기: 가로 138pixel, 세로 80pixel.

After 그림입니다.
원본 그림의 이름: CLP00000f400006.bmp
원본 그림의 크기: 가로 138pixel, 세로 81pixel discharges, the current flows through the body diode of S1. Hence, 그림입니다.
원본 그림의 이름: CLP00000f400007.bmp
원본 그림의 크기: 가로 140pixel, 세로 76pixel becomes turned on in a zero voltage switching (ZVS) condition.

Interval 2—[t1, t2]: At the start of this interval, S3 is turned on. Consequently, L1 starts to store energy while L2 releases its energy to output capacitor C.

Interval 3—[t2, t3]: In this interval, S1 is turned off. Hence, if its current is larger than zero, then switch S2 may be turned on in a soft-switching condition.

Interval 4—[t3, t4]: During this interval, switches S2 and S3 are turned on. Consequently, L1 and L2 are charged and the output port is supplied by the output capacitor. At the end of this interval, S3 is turned off.

Interval 5—[t4, t5]: In this interval, only switch S2 is turned on. Then, L1 is charged and L2 releases its energy into the output capacitor.

According to the time-interval description, the conventional converter will operate in a soft-switching condition only if port 2, which is presented in Fig. 1a, supplies the power and its ripple is higher than the average of its current. In addition, as shown in Fig. 1b, when S3 is turned off, S1 is also turned off. Therefore, in the point of view of port 1, the converter operates similarly to a unidirectional boost converter.

In the next section, a modified converter is proposed using new switching strategies, which lead to bidirectional operation of all ports and result in a soft-switching condition of all switches.



Ⅲ. PROPOSED THREE-SWITCH CONVERTER

The proposed converter is shown in Fig. 2 in details. In this structure, inductance L2 is replaced by a coupled inductor. The coupled inductor enable port 2 to have ripple-free current, which then leads the switches to operate in soft-switching conditions. In addition, the proposed switching pattern, which is shown in Fig. 3, results in the bidirectional operation of the converter. To analyze the converter, it is assumed that it operates in a steady-state condition and switches S1and S2 are turned on before time t=t0. Consequently, magnetizing the inductance of L2 and Lm is charged by input source V2. Indeed, the energy of L1 charges output capacitor C. The following assumptions are considered for the starting time of the analysis:

그림입니다.
원본 그림의 이름: CLP00000f400009.bmp
원본 그림의 크기: 가로 304pixel, 세로 81pixel, 그림입니다.
원본 그림의 이름: CLP00000f40000a.bmp
원본 그림의 크기: 가로 333pixel, 세로 84pixel, 그림입니다.
원본 그림의 이름: CLP00000f40000b.bmp
원본 그림의 크기: 가로 310pixel, 세로 73pixel.

⋅ The coupled inductor is modeled as an ideal transformer with a magnetizing inductance in parallel with the primary side and a series leakage inductance in the secondary side.

⋅ All parasitic components are neglected, except the parasitic capacitor of the switches, which is used for the discussions on soft switching.


그림입니다.
원본 그림의 이름: image18.jpeg
원본 그림의 크기: 가로 594pixel, 세로 352pixel

Fig. 2. Proposed circuit.


그림입니다.
원본 그림의 이름: image19.jpeg
원본 그림의 크기: 가로 536pixel, 세로 575pixel

Fig. 3. Key waveforms of the proposed converter.


Consequently, the operating intervals shown in Fig. 4 can be described as follows:


Fig. 4. Operating intervals of the proposed converter.

그림입니다.
원본 그림의 이름: CLP00000f400015.bmp
원본 그림의 크기: 가로 1240pixel, 세로 704pixel

(a)

그림입니다.
원본 그림의 이름: CLP00000f400016.bmp
원본 그림의 크기: 가로 1238pixel, 세로 701pixel

(b)

그림입니다.
원본 그림의 이름: CLP00000f400017.bmp
원본 그림의 크기: 가로 1241pixel, 세로 704pixel

(c)

그림입니다.
원본 그림의 이름: CLP00000f400018.bmp
원본 그림의 크기: 가로 1236pixel, 세로 695pixel

(d)

그림입니다.
원본 그림의 이름: CLP00000f400019.bmp
원본 그림의 크기: 가로 1237pixel, 세로 706pixel

(e)

그림입니다.
원본 그림의 이름: CLP00000f40001a.bmp
원본 그림의 크기: 가로 1236pixel, 세로 699pixel

(f)


Interval 1—[t0, t1]: At the start of this interval, S2 is turned off [Fig. 4(a)]. Therefore, i2, which flew through S2, starts to flow through the drain-source capacitors of S3 and S2. Accordingly, 그림입니다.
원본 그림의 이름: CLP00000f40000c.bmp
원본 그림의 크기: 가로 150pixel, 세로 82pixel is charged, and simultaneously, 그림입니다.
원본 그림의 이름: CLP00000f40000d.bmp
원본 그림의 크기: 가로 144pixel, 세로 75pixel is discharged. Subsequently, the current starts to flow through the body diode of S3. By flowing the current through it, 그림입니다.
원본 그림의 이름: CLP00000f40000e.bmp
원본 그림의 크기: 가로 140pixel, 세로 77pixel remains zero and S3 is ready to be turned on in a ZVS condition.

Interval 2—[t1, t2]: In this interval, initially, S3 is turned on in a ZVS condition [Fig. 4(b)]. During this interval, L1 is charged and currents im and ik start to decrease. Therefore, in this time interval, output capacitance C is charged by the stored energy in Lm and supplies the output load simultaneously. Moreover, in this mode, capacitor Ck is discharged and ik starts to decrease. Given that Ck is placed in series with Lk, ik only contains an AC term. Moreover, the current depends on the status of S2 and reaches its minimum value at the end of the interval. At the start of this interval, ik is at the maximum positive value, which helps S3 to be turned on in a ZVS condition. At the end of this interval, ik reaches the maximum negative value, which leads switch S2 to be turned on in a ZVS condition in the next intervals. At the end of this interval, switch S1 is turned off. The mathematical model of this interval can be formulated as follows:

그림입니다.
원본 그림의 이름: CLP00000f400011.bmp
원본 그림의 크기: 가로 890pixel, 세로 165pixel.         (1)

그림입니다.
원본 그림의 이름: CLP00000f400012.bmp
원본 그림의 크기: 가로 1206pixel, 세로 153pixel.    (2)

그림입니다.
원본 그림의 이름: CLP00000f400013.bmp
원본 그림의 크기: 가로 1228pixel, 세로 316pixel.    (3)

Interval 3—[t2, t3]: When S1 is turned off, its current, which is a positive value (the summation i2+ik), will flow through switch S2 [Fig. 4(c)]. Accordingly, in this interval, the current charges the drain-source capacitor of S1 and discharges the drain-source capacitor of S2. The discharging of 그림입니다.
원본 그림의 이름: CLP00000f40000c.bmp
원본 그림의 크기: 가로 150pixel, 세로 82pixel enables the body diode of S2 to start conducting. Consequently, 그림입니다.
원본 그림의 이름: CLP00000f400014.bmp
원본 그림의 크기: 가로 136pixel, 세로 83pixel becomes zero.

Interval 4—[t3, t4]: At the start of this interval, at time t3, S2 is turned on in a ZVS condition, as its voltage became zero in the last interval [Fig. 4(d)]. When switch S2 is turned on, L1 and Lm start to store energy. In addition, the secondary voltage of the coupled inductor charges capacitor Ck. Hence, ik starts to increase from the minimum voltage to the maximum positive value. Given that switch S1 is turned off and the other switches are turned on, C discharges to supply the load. At the end of this interval, S3 is turned off. The mathematical equations describing this interval are as follows:

그림입니다.
원본 그림의 이름: CLP00000f40001e.bmp
원본 그림의 크기: 가로 893pixel, 세로 150pixel,         (4)

그림입니다.
원본 그림의 이름: CLP00000f40001f.bmp
원본 그림의 크기: 가로 1007pixel, 세로 153pixel,    (5)

그림입니다.
원본 그림의 이름: CLP00000f400020.bmp
원본 그림의 크기: 가로 1245pixel, 세로 152pixel.   (6)

Interval 5—[t4, t5]: When S3 is turned off at the start of this interval, i1 flows through S3 [Fig. 4(e)]. Then, 그림입니다.
원본 그림의 이름: CLP00000f400021.bmp
원본 그림의 크기: 가로 148pixel, 세로 83pixel is charged and 그림입니다.
원본 그림의 이름: CLP00000f400022.bmp
원본 그림의 크기: 가로 141pixel, 세로 86pixel is discharged. Then, when 그림입니다.
원본 그림의 이름: CLP00000f400023.bmp
원본 그림의 크기: 가로 145pixel, 세로 78pixel is discharged, current i1 flows through the body diode of S1. In addition, this current flows through S2, which leads to the reduction of 그림입니다.
원본 그림의 이름: CLP00000f400024.bmp
원본 그림의 크기: 가로 75pixel, 세로 79pixel. Accordingly, this interval provides S1 for soft-switching operation.

Interval 6—[t5, t6]: At the start of this interval, S1 is turned on in a ZVS condition. During this interval, Lm is charged while L1 sends its stored energy to the output capacitor [Fig. 4(f)]. Given that switch S2 is turned on, Ck is charged and 그림입니다.
원본 그림의 이름: CLP00000cf816f1.bmp
원본 그림의 크기: 가로 59pixel, 세로 67pixel increases. The mathematical model related to this interval can be expressed as follows:

그림입니다.
원본 그림의 이름: CLP00000f40001b.bmp
원본 그림의 크기: 가로 1098pixel, 세로 156pixel,         (7)

그림입니다.
원본 그림의 이름: CLP00000f40001c.bmp
원본 그림의 크기: 가로 980pixel, 세로 155pixel,    (8)

그림입니다.
원본 그림의 이름: CLP00000f40001d.bmp
원본 그림의 크기: 가로 1245pixel, 세로 156pixel.   (9)

Considering the operating intervals of the converter, two points should be taken into account. First, as shown in Fig. 3, at any moment, regardless of dead times, only one switch is turned off. This situation is similar to a synchronous boost structure in which the switches operate complementarily to enable the converter to become bidirectional.

Consequently, the proposed converter provides a bidirectional path for power flow between different ports. For example, S1 and S2 operate as the complements of S3. Moreover, a similar operation exists among S2, S1, and S3.

Second, according to operating intervals, the soft-switching condition for switches S2 and S3 can be achieved by current ik. That is, although currents i1 and i2 depend on the power flow direction, current ik is completely in accordant with the soft-switching operation of these switches. Therefore, by selecting the proper value for Lk and Ck, soft switching can be achieved for any power flow direction mode. In spite of this, the soft-switching operation of switch S1 only depends on switch S1. Consequently, it is turned on in a ZVS condition only if port 1 supplies the other ports. The soft-switching operation of the switches is discussed in the next sections.



Ⅳ. DESIGN CONSIDERATION

In this section, different aspects of the converter design are investigated. The most important considerations that should be taken into account in designing the converter are the voltage gain of the converter, voltage and current stresses of the semiconductor components, criteria to achieve ripple-free current for port 2, and soft-switching condition.


A. Voltage Gain Derivation

The capacitor voltages can be derived based on the voltage balance of the magnetic components. According to the voltage balance law, the integration of the voltages across L1, Lm, and Lk should be zero. Consequently, the following relations can be derived:

그림입니다.
원본 그림의 이름: CLP00000f400026.bmp
원본 그림의 크기: 가로 254pixel, 세로 86pixel,         (10)

그림입니다.
원본 그림의 이름: CLP00000f400027.bmp
원본 그림의 크기: 가로 340pixel, 세로 162pixel, 그림입니다.
원본 그림의 이름: image43.wmf
원본 그림의 크기: 가로 256pixel, 세로 384pixel그림입니다.
원본 그림의 이름: CLP00000f400028.bmp
원본 그림의 크기: 가로 347pixel, 세로 166pixel,       (11)

where D1 is the duty cycle of S3 and D2 is the duty cycle of S2.


B. Ripple-free Current Criteria

To achieve the criteria of a ripple-free input current, the slope of i2 should be equal to zero. At any moment, current i2 is equal to im(t)-nik(t). Hence, for intervals 2, 4, and 6, the input current of port 2 can be derived as follows:

그림입니다.
원본 그림의 이름: CLP00000f400029.bmp
원본 그림의 크기: 가로 1390pixel, 세로 158pixel,      (12)

그림입니다.
원본 그림의 이름: CLP00000f40002a.bmp
원본 그림의 크기: 가로 1152pixel, 세로 191pixel.       (13)

By equalizing the slope of the abovementioned equations to zero, the criteria for achieving the ripple-free current of port 2 are derived as follows:

그림입니다.
원본 그림의 이름: CLP00000f40002b.bmp
원본 그림의 크기: 가로 449pixel, 세로 80pixel.          ((14)

According to (14), n should be a value lower than unity.


C. Current Stress of the Switches

1) Current Stress of Switch S1:

Considering the key waveforms of the converter (Fig. 3), the minimum current flowing through switch S1 can be derived as follows:

그림입니다.
원본 그림의 이름: CLP00000f40002c.bmp
원본 그림의 크기: 가로 529pixel, 세로 179pixel.      (15)

Moreover, at the end of interval 1, in which switch S1 is turned off, the maximum flowing current be calculated as follows:

그림입니다.
원본 그림의 이름: CLP00000f40002d.bmp
원본 그림의 크기: 가로 388pixel, 세로 91pixel.   (16)

2) Current Stress of Switch S2

To calculate the current stress of switch S2, iS2 should be calculated at times t=t3 and t=t0. Thus, the current stress of this switch can be derived.

그림입니다.
원본 그림의 이름: CLP00000f40002e.bmp
원본 그림의 크기: 가로 379pixel, 세로 94pixel   (17)

그림입니다.
원본 그림의 이름: CLP00000f40002f.bmp
원본 그림의 크기: 가로 784pixel, 세로 172pixel    (18)

3) Current Stress of Switch S3

A similar procedure can be used to achieve the current stress of switch S3.

그림입니다.
원본 그림의 이름: CLP00000f400030.bmp
원본 그림의 크기: 가로 714pixel, 세로 167pixel       (19)

그림입니다.
원본 그림의 이름: CLP00000f400031.bmp
원본 그림의 크기: 가로 449pixel, 세로 170pixel         (20)

4) Derivation of 그림입니다.
원본 그림의 이름: CLP00000f400032.bmp
원본 그림의 크기: 가로 104pixel, 세로 81pixel

The value 그림입니다.
원본 그림의 이름: CLP00000f400033.bmp
원본 그림의 크기: 가로 124pixel, 세로 82pixel is the key point to derive the soft switching of the switches based on the currents’ equations.

To calculate this value, when port 2 has a ripple-free current, the current ripple of Lm should be equal to the reflected ripple of ik to the primary side of the coupled inductor. Hence, the value can be derived as follows:

그림입니다.
원본 그림의 이름: CLP00000f400034.bmp
원본 그림의 크기: 가로 368pixel, 세로 167pixel   (21)


D. Soft-Switching Condition

The drain-source capacitor of power MOSFETs can generate electromagnetic interface EMI noises at the switching moments. That is, in the turn-on process of a power MOSFET, the stored energy in the CDS releases into the MOSFET and generates a high-frequency electromagnetic field, which results in the EMI issue. To overcome this problem, soft-switching technology is used in which CDS is discharged before the switch is turned on. The soft switching exists for a switch when the current of magnetic components is able to charge a drain-source capacitor and discharges the other one in the circuit. Consequently, to achieve soft switching, the following condition should be satisfied:

1) Switch S1:

그림입니다.
원본 그림의 이름: CLP00000f40003e.bmp
원본 그림의 크기: 가로 553pixel, 세로 164pixel.     (22)

2) Switch S2:

As shown in Fig. 5(a), the worst case for the soft switching of switch S2 occurs when port 2 supplies and port 1 consumes the power. Hence, the following inequality can be derived:

그림입니다.
원본 그림의 이름: CLP00000f400035.bmp
원본 그림의 크기: 가로 550pixel, 세로 165pixel.     (23)


Fig. 5. Soft switching of the converter: (a) Worst-case analysis for switch S2, (b) Worst-case analysis for switch S3.

그림입니다.
원본 그림의 이름: image58.jpeg
원본 그림의 크기: 가로 339pixel, 세로 199pixel

(a)

그림입니다.
원본 그림의 이름: image59.jpeg
원본 그림의 크기: 가로 342pixel, 세로 201pixel

(b)


3) Switch S3:

As shown in Fig. 5(b), the worst case for the soft switching of switch S3 occurs when port 1 supplies and port 2 consumes power. Therefore, the soft-switching criteria for this switch results in the following inequality:

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According to (20), the soft-switching condition for switch S1 only satisfies when port 1 supplies power to other ports. Moreover, based on (21) and (22), to achieve soft-switching condition for switches S2 and S3, the value of nLm should be lower than a specific value. Consequently, the coupled inductor should be designed based on (14), (23), and (24).



Ⅴ. EXPERIMENTAL RESULTS

The operating modes of the converter generally involve ports 1 and 2 supplying the output, port 1 supplying port 2 and the output, and so on; thus, the current waveforms of the switches vary. In this section, the operations of the converter are validated in different operating modes by using the experimental results. Three operating modes of the converter were examined in the laboratory to validate the performance of the converter containing the soft-switching operation of the converter, bidirectional power flow capability, and ripple-free input current of port 2.

The parameters of the prototype are presented in Table I. As shown in the table, to achieve soft switching of the switches, (23) and (24) are used. Based on this equations, the value of nLm was set to 12 μ. By selecting a small value for n, the secondary side of the coupled inductor experiences high current [21]. Therefore, the turn ratio and magnetizing inductance were selected as n=0.25 and lm=48 μH. In addition, for ripple-free current of port 2, a leakage inductance of 8.5 μH is required using (14). Although a special winding approach was proposed in Ref. [21] to actuate a leakage inductor, an external 7 μH inductor was added in series with the secondary side of the inductor to achieve a ripple-free feature in this study. To select the core size of the coupled inductor, the core geometry approach (Kg) was used. The design was conducted similarly with a flyback transformer based on the step-by-step method proposed in Ref. [22].

According to this approach, the calculated core geometry is equal to Kg=0.09, which approximates that of ETD29 ferrite core. A similar procedure was conducted to design the core size of inductor L1, which leads to a ETD34 ferrite core. An image of the prototype is shown in Fig. 6.


TABLE I CHARACTERISTICS OF THE EXPERIMENTAL PROTOTYPE

Parameter

Value

V1: Voltage source of port 1

35 V

V2: Voltage source of port 2

48 V

Vo: Output voltage across the load

100 V

PO: Rated power

200 W

L1 : Inductor of port 1

100 μH

Lm: Magnetizing inductance of coupled inductor

48 μH

Lk: Leakage inductance of coupled inductor

8.5 μH

n: Coupled inductor turn ratio

0.25 

Ck: Balancing capacitor

4.7 μF

C: Output capacitor

100 μF


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Fig. 6. Experimental prototype of the proposed converter.


The control and modulation system is shown in Fig. 7. As shown in the figure, the status of the converter, including currents and voltages, is sensed. The signals are sent to microcontroller STM32F407VGT6. In the microcontroller, the compensators and mode selection system similar to Ref. [15] can be used to determine duty cycles D1 and D2. However, as this study aims to show bidirectional operation and soft switching of the converter, a simple control approach was used.


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Fig. 7. Control diagram of the proposed converter.


In this study, two PI compensators were used to control the output voltage and input current i1. The current control loop tunes duty cycle D1 and the voltage control loop determines D2. To provide gate pulses, a CPLD-xc9572 was used, in which a combinational–sequential structure was implemented. In the first scenario, the operation of the converter when ports 1 and 2 supply the output is considered. Accordingly, i1 and i2 are greater than zero and the bottleneck for the soft-switching condition is switch S2. Fig. 8 illustrates the experimental results. For clarity, intervals 2, 4, and 6 are highlighted in the figure. As previously mentioned, in interval 2, switches S1 and S3 are turned on. Therefore, i2 flows through switch S1 in the opposite direction to supply the load. However, current ik, which flows through S1, starts from a positive value and ends with a negative value. Therefore, at the end of this interval, the current of switch S1 obtains a positive value, which validates the soft-switching operation of switch S2 in the next interval [Fig. 8(a)]. Similarly, in interval 4 in which switches S2 and S3 are turned on, both input currents store energy into the input inductors. During this interval, ik starts from a negative value and ends with a positive value. At the end of this interval, as i1>0, switch S1 becomes ready for soft switching in the next interval [Fig. 8(b)].


Fig. 8. Soft-switching operation of the switches when V1 and V2 support the output load: (a) CH1: VGS and CH2: iD of switch S1, (b) CH1: VGS and CH2: iD of switch S2, (c) CH1: VGS and CH2: iD of switch S3, (d) CH1: i2 and CH2: i1.

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(a)

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(b)

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(c)

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(d)


Interval 6 starts with the soft switching of switch S1. In this interval, ik increases, and at the end of the interval, it reaches to the maximum value. Consequently, ik-i1+i2>0 and S3 is turned on in a soft-switching condition. Moreover, the ripple-free current of port 2 is validated in Fig. 8d. As shown in the figure, the magnetizing inductance of the coupled inductor is a half of the inductor of port 1, and the ripple of port 2 is lower than that of port 1.

Similarly, soft switching exists for the two other modes (Figs. 9 and 10). As shown in Fig. 9, port 2 supports two other ports. In this mode, which is shown in Fig. 9, i2 is positive and i1 is negative. Accordingly, the bottleneck for the soft switching of the converter is switch S2. The soft switching of switches S1, S2, and S3 are illustrated in Figs. 9a–9d. In particular, the figures show the main intervals 2, 4, and 6. In Fig. 8, the same finding can be considered for this mode.


Fig. 9. Soft-switching operation of the switches when V2 supports the output load and V1 : (a) CH2: VGS and CH1: iD of switch S1, (b) CH2: VGS and CH1: iD of switch S2, (c) CH2: VGS and CH1: iD of switch S3, (d) CH1: i2 and CH2: i1.

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(a)

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(c)

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(d)


Fig. 10. Soft-switching operation of the switches when V1 supports V2 and the output load: (a) CH2: VGS and CH1: iD of switch S1, (b) CH2: VGS and CH1: iD of switch S2, (c) CH2: VGS and CH1: iD of switch S3, (d) CH1: i2 and CH2: i1.

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(d)


The last scenario is a situation in which port 1 supplies power to the other ports (Fig. 10). In this case, switch S3 may fail to operate in a soft-switching condition. However, by selecting the appropriate values for turn ratio and magnetizing the inductance of the coupled inductor, the experimental results validate the operation of this switch in the soft-switching condition.

To increase the clarity of the soft-switching operation of the proposed converter, the gate-source and drain-source voltages of the switches are shown in Fig. 11. As shown in the figure, all switches operate in a zero-voltage condition, as the drain-source voltage reaches zero before the gate-source pulse is applied to the switch. In addition, to validate the operation of the converter in transitions between two steady-state conditions, the dynamic performance of the converter is illustrated in Fig. 12. The figure presents the performance of the converter for a 100 W output load, in which port 1 first supports the output load. However, after a special instant, port 1 consumes power and port 2 supplies the output load.


Fig. 11. Soft-switching validation of the switches of the proposed converter. Drain-source voltage versus gate-source voltage related to: (a) Switch 1, (b) Switch 2, (c) Switch 3.

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(b)

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(c)


Fig. 12. Dynamic performance of the converter parameters: (a) Output voltage versus port 1 current, (b) Output voltage versus port 2 current.

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(a)

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(b)


To illustrate the advantages of the proposed converter with respect to the newly proposed converter, a comparison was conducted between the proposed converter and two other multiport converters. As shown in Table II, through the coupled inductor, the proposed converter operates in a soft-switching condition. Moreover, the improved switching strategy leads to the bidirectional operation with respect to Ref. [6]. In comparison to Ref. [6], the converter has the advantages of soft switching and bidirectional operation. Then, in comparison to Ref. [19], the soft switching, few utilized components, and high voltage gain are the most important benefits. In accordance with the converter proposed in Ref. [6], the voltage stress of the switches in both converters is the same. However, to achieve a ripple-free current for port 2, current ik results in an extra current stress on the switches. Therefore, the current stress of the switches increases by a value of (1-n)Ikmax.


TABLE II PERFORMANCE COMPARISON

Parameters

Ref. [6]

Ref. [19]

Proposed converter

No. of switches

3

4

3

No. of diodes

0

2

0

Magnetic components

2

2

2

No. of capacitors

1

1

2

Bidirectional operation

No

Yes

Yes

Soft switching

No

No

Yes

Input ripple

Low ripple

High ripple

Low ripple- Ripple free

Voltage gain

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Single mode

Yes

Yes

Yes


The efficiency of the converter is discussed in this section. The efficiency of the converter relates to the losses of the converter. The losses of the proposed converter mainly include two important parts:

⋅ Magnetic component losses

⋅ Switch losses

The magnetic losses contain the conduction losses of the windings and core losses.

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Moreover, the switch losses include switching and conduction losses. The switching losses can be calculated based on the voltage and current waveforms as follows:

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where toff is the turn-off transition of the switches. Moreover, the conduction losses of the converter can be calculated as follows:

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Considering the selected switch for the prototype, which is FDP2532, the efficiency of the prototype for different operation modes is illustrated in Fig. 13. The figure shows the efficiency of the converter for three different conditions. The first condition is when the output port is supplied by two ports (blue line), the second condition is when port 1 supplies the other ports (red line), and the third condition is when port 2 provides the required power of the other ports (green line).


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Fig. 13. Efficiency of the converter for different operating modes.



Ⅵ. CONCLUSION

Bidirectional multi-input DC–DC converters are interesting structures for hybrid supply systems. In this study, a three-port soft-switching DC–DC converter was proposed. A coupled inductor was utilized and a modified switching strategy was proposed. Subsequently, the converter provided a ripple-free current port, and bidirectional operation between each port was achieved. In addition, the soft-switching operation of the converter, in which the entire set of switches operate in a soft-switching condition, was realized. The soft-switching operation loses in one operating mode for one switch. Thus, the converter should be utilized for renewable energy resource applications. In particular, the renewable source should be connected to port 1 to enable the converter to continuously operate in soft-switching conditions.



REFERENCES

[1] H. Moradisizkoohi, J. Milimonfared, M. Taheri, and S. Salehi, “A high step-up half-bridge DC/DC converter with a special coupled inductor for input current ripple cancelation and extended voltage doubler circuit for power conditioning of fuel cell systems,” Int. J. Circuit Theory Appl,Vol. 44, No. 6, pp. 1290-1307, Jun. 2016.

[2] S. A. Arshadi, B. Poorali, E. Adib, and H. Farzanehfard, “High step-up DC-AC inverter suitable for AC module applications,” IEEE Trans. Ind. Electron., Vol. 63, No. 2, pp. 832-839, Feb. 2016.

[3] W. Liang, Y. Liu, B. Ge, and H. Abu-Rub, “Investigation on pulse width amplitude modulation based single-phase quasi-z-source photovoltaic inverter,” IET Power Electron. Vol. 10, No.14, pp. 832-839, Nov. 2017.

[4] B. Gu, J. Dominic, J. S. Lai, Z. Zhao, and C. Liu, “High boost ratio hybrid transformer DC-DC Converter for photovoltaic module applications,” IEEE Trans. Power Electron., Vol. 28, No. 4, pp. 2048-2058, Jun. 2013.

[5] J. Wei and B. Fahimi, “Maximum solar power transfer in Multi-port Power Electronic Interface,” in Applied Power Electronics Conference and Exposition (APEC), IEEE, pp. 68-73, 2010.

[6] M. Mohammadi, J. Milimonfared, M. R. M. Behbahani, J. S. Moghani, and H. Moradi, “A double-input DC-DC converter for hybrid supply systems,” in 6th Annual International Power Electronics, Drive Systems, and Technologies Conference, (PEDSTC) , pp. 29-34, 2015.

[7] M. Delshad, A. T. Harchegani, M. Karimi, and M. Mahdavi, “A new ZVT multi input converter for hybrid sources systems,” in International Conference on Applied Electronics (AE) , pp. 61-64, 2016.

[8] S. Xiaofeng, P. Guangming, Y. Shuai, and C. Zhe, “A novel multi-port dc/dc converter with bi-directional storage unit,” in Power Electronics and Motion Control Conference (IPEMC), pp. 1771-1775, 2012.

[9] Y. Chen, A. Huang, and X. Yu, “A High Step-Up Three-Port DC-DC Converter for Stand-Alone PV/Battery Power Systems,” IEEE Trans. Power Electron., Vol. 28, No. 11, pp. 5049-5062, Nov. 2013.

[10] A. Lahyani, P. Venet, A. Guermazi, and A. Troudi, “Battery/supercapacitors combination in uninterruptible power supply (UPS),” IEEE Trans. Power Electron., Vol. 28, No. 4, pp. 1509-1522, Jul. 2013.

[11] A. Khaligh, C. Jian, and L. Young-Joo, “A multiple-input DC-DC converter topology,” IEEE Trans. Power Electron., Vol. 24, No. 3, pp. 862-868, Jan. 2009.

[12] H. Matsuo, T. Shigemizu, F. Kurokawa, and N. Watanabe, “Characteristics of the multiple-input DC-DC converter,” in Power Electronics Specialists Conference,. (PESC), IEEE, pp. 115-120, 1993.

[13] H. Matsuo, L. Wenzhong, F. Kurokawa, T. Shigemizu, and N. Watanabe, “Characteristics of the multiple-input DC- DC converter,” IEEE Trans. Ind. Electron., Vol. 51, No. 3, pp. 625-631, Jun. 2004.

[14] Z. Qian, O. Abdel-Rahman, and I. Batarseh, “An integrated four-port DC/DC converter for renewable energy applications,” IEEE Trans. Power Electron., Vol. 25, No. 7, pp. 1877-1887, Jul. 2010.

[15] W. Hongfei, S. Kai, D. Shun, and X. Yan, “Topology derivation of nonisolated three-port DC-DC converters from DIC and DOC,” IEEE Trans. Power Electron., Vol. 28, No. 7, pp. 3297-3307, Oct. 2013.

[16] R. Jie, L. Fuxin, R. Xinbo, Y. Dongsheng, L. Yan, and J. Ke, “Isolated multiple-input DC/DC converter using alternative pulsating source as building cells,” in International Power Electronics Conference (IPEC),  pp. 1463-1470, 2010.

[17] Z. Qian, “Modeling and Design of Multi-port Dc/dc Converters,” PhD. Thesis, UCF Florida 2010.

[18] B. Mangu, S. Akshatha, D. Suryanarayana, and B. G. Fernandes, “Grid-connected PV-wind-battery-based multi- input transformer-coupled bidirectional DC-DC converter for household applications,” IEEE J. Emerg. Sel. Top. Power Electron., Vol. 4, No. 3, pp. 1086-1095, Sep. 2016.F.

[19] F. Akar, Y. Tavlasoglu, E. Ugur, B. Vural, and I. Aksoy, “A bidirectional nonisolated multi-input DC-DC converter for hybrid kbenergy storage systems in electric vehicles,” IEEE Trans. Veh. Technol, Vol. 65, No. 10, pp. 7944-7955, Oct. 2016.

[20] P. Zhang, Y. Chen, and Y. Kang, “Nonisolated wide operation range three-port converters with variable structures,” IEEE J. Emerg. Sel. Top. Power Electron., Vol. 5, No. 2, pp. 854-869, Jun. 2017.

[21] D. Hyun-Lark, “Improved ZVS DC-DC converter with a high voltage gain and a ripple-free input current,” IEEE Trans. Circuits Syst. I Reg. Papers, Vol. 59, No. 4, pp. 846-853, 2012.

[22] C. W. Mclyman, Transformer and Inductor Design Handbook. CRC Press, Nov. 2004.



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Parastou KhademiAstaneh was born in Ardabil, Iran. She received her B.S. and M.S. in Electrical Engineering from Iran University of Science and Technology, Tehran, Iran, in 2008 and 2010, respectively. She is currently pursuing her Ph.D. degree in the University of Mohaghegh Ardabili, Ardabil, Iran. Her current research interests include power electronics and renewable energy.


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Javad Javidan received his B.Sc. and M.Sc. and Ph.D. degrees in Electrical Engineering from Sharif University of Technology, Tehran, Iran, in 2001 and 2003, respectively. He also received his Ph.D. degree from Sharif University of Technology in the field of RFIC design in 2010. He received a one-year grant from Hong Kong University of Science and Technology for doing his research as a RA and visiting student. He is currently an Assistant Professor at the University of Mohaghegh Ardabili, Ardabil, Iran. His main research interests are power electronics and renewable energy, F/analog/mixed-signal ICs, and integrated circuits for digital receivers.


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Khalil Valipour was born in Ardabil, Iran. He received his B.S., M.S., and Ph.D. degrees in Electrical Engineering. Currently, he is an Assistant Professor at the Department of Technical Engineering, University of Mohaghegh Ardabili, Ardabil, Iran. His research interests are power system dynamics, power system modeling in transient states, electrical machine and transformer design, reactive power control, protective relays, and renewable energy management.


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Adel Akbarimajd received his B.Sc. degree in Control Engineering from Ferdowsi University of Mashhad, Mashhad, Iran, in 1997 and M.Sc. degree in Control Systems from Tabriz University of Iran, Tabriz, Iran, in 2000. He received his Ph.D. degree in AI and Robotics from the University of Tehran, Tehran, Iran, in 2009. In 2007, he spent six months in the Biorobotics Laboratory, EPFL, Lausanne, Switzerland, as a visiting researcher. Later, he moved to the Department of Engineering, University of Mohaghegh Ardabili, Ardabil, Iran, where he is currently an Associate Professor. He was the Head of the Department of Electrical and Computer Engineering, University of Mohaghegh Ardabili, from 2011 to 2016. His research interests include planning and control of power systems and robotic systems.