사각형입니다.

https://doi.org/10.6113/JPE.2018.18.5.1325

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Reducing Switching Losses in Indirect Matrix Converter Drives: Discontinuous PWM Method


Yeongsu Bak* and Kyo-Beum Lee


†,*Department of Electrical and Computer Engineering, Ajou University, Suwon, Korea



Abstract

This paper presents a discontinuous pulse width modulation (DPWM) method to reduce switching losses in an indirect matrix converter (IMC) drive. The IMC has a number of power semiconductor switches. In other words, it consists of a rectifier stage and an inverter stage for AC/AC power conversion, which are composed of 12 and 6 switching devices, respectively. Therefore, the switching devices of the IMC suffer from high switching losses in the IMC drives. Various topologies to reduce switching losses have been studied by eliminating a number of switches from the rectifier stage. In this study, in contrast to prior research, a DPWM method is presented to reduce the switching losses of the inverter stage. The effectiveness of the proposed method to reduce switching losses in IMC drives is verified by simulations and experimental results.


Key words: Current source rectifier, Discontinuous pulse width modulation, Indirect matrix converter, Switching loss, Voltage source inverter


Manuscript received Sep. 6, 2017; accepted Apr. 6, 2018

Recommended for publication by Associate Editor Young-Doo Yoon.

Corresponding Author: kyl@ajou.ac.kr Tel: +82 31 219 2376, fax: +82 31 212 9531, Ajou University

*Dept. of Electrical and Computer Eng., Ajou University, Korea



Ⅰ. INTRODUCTION

Recently, research and development on AC/AC power conditioning systems (PCSs) have been accelerated for industry applications. AC/AC PCSs are developed with various topologies, and the devices are generally used for numerous applications, such as renewable energy conversion systems, adjustable-speed motor drives, power transmission, and uninterruptable power supplies [1]-[4].

A back-to-back (BTB) converter is one of the fundamental AC/AC PCSs. It is composed of a rectifier stage, an inverter stage, and DC-link energy storage elements, such as capacitors and inductors. The BTB converter has disadvantages, such as large size, heavy weight, and low durability because of the DC-link energy storage elements [5]-[9]. Therefore, researchers intend to eliminate the DC-link energy storage elements. Consequently, an indirect matrix converter (IMC) has been developed, which is able to overcome the disadvantages of the BTB converter regarding the DC-link energy storage elements [10], [11].

The IMC has a structure that is similar to that of the BTB converter. It is composed of a rectifier stage and an inverter stage. However, in contrast to the BTB converter, the IMC does not have DC-link energy storage elements. Owing to the lack of these elements, it has certain advantages, such as small size, low weight, and high durability. The IMC operates in buck mode with the input–output maximum voltage transfer ratio restricted to 0.866 [12]-[14]. The IMC remains insufficiently developed for industrial applications because it has restricted application fields, which is dependent on the input–output maximum voltage transfer ratio, and requiring a complex control method. In particular, the crucial disadvantage of the IMC is that it has a number of switching devices contrary to the other AC/AC PCSs.

Fundamentally, the IMC consists of 18 insulated-gate bipolar transistors (IGBTs) with anti-parallel diodes in the rectifier and inverter stages. The rectifier stage is composed of 12 IGBTs with anti-parallel diodes as bidirectional switching devices, and the inverter stage is composed of 6 IGBTs with anti-parallel diodes. In other AC/AC PCSs, however, the BTB converter is typically composed of 12 IGBTs and 12 diodes. The diode rectifier voltage source inverter topology is composed of 6 IGBTs and 12 diodes. That the IMC increases the cost and switching losses of the PCS is inevitable because the IMC has more switching devices than the other AC/AC PCSs. To overcome the disadvantages of high switching losses and a high number of switching devices, topologies that reduce the number of switching devices in the rectifier stage have been studied. First, a sparse matrix converter (SMC), which is formed by removing 3 IGBTs from the rectifier stage, has been studied. In other words, the SMC is composed of 9 IGBTs and 12 diodes in the rectifier stage. Additionally, a very sparse matrix converter (VSMC) and an ultra-sparse matrix converter (USMC) have been studied [15]-[19]. The VSMC is composed of 6 IGBTs and 24 diodes in the rectifier stage and the USMC, which cannot be operated for bidirectional power transmission, is composed of 3 IGBTs and 12 diodes in the rectifier stage.

In contrast to the methods in which the switching devices of the rectifier stage are removed, discontinuous pulse width modulation (DPWM) is a method of reducing switching losses in the inverter stage. It decreases the number of switching operations of the inverter stage by switching the only two- phase switches of the three-phase switches. Therefore, the DPWM method mainly aims to reduce switching losses by decreasing the number of switching operations.

The DPWM methods vary depending on the range of discontinuous sections. A 60-degree DPWM method decreases the number of switching operations by maintaining the switching state in ON or OFF states in the 60-degree range, in which the magnitude of the phase voltage is the largest. It decreases the number of switching operations to 67%, compared with the continuous pulse width modulation (CPWM) method because the switches of the inverter stage do not switch during a one-third range of the period of the phase voltage. Generally, to minimize switching losses, the switches of the inverter stage must not be switched during the range, in which the magnitude of the phase current is largest. It is superior to the DPWM method in using the range where the magnitude of the phase voltage is largest. Therefore, the range of the discontinuous sections should be considered to minimize the switching losses in the case that the power factor (PF) is changed by the phase difference between the phase voltage and current [20]-[28].

This study presents a DPWM method to reduce switching losses in IMC drives. The validity of the proposed control method regarding the reduction of switching losses is demonstrated by simulations and experimental results.



Ⅱ. CIRCUIT CONFIGURATION AND MODULATION METHOD OF IMC DRIVES


A. Circuit Configuration of IMC Drive

Fig. 1 shows the circuit configuration of the IMC drive. This system is divided into four parts, namely, a three-phase AC voltage source of the input stage, an input filter composed of inductors and capacitors, the IMC as the AC/AC PCS, and R–L load of the output stage. The three-phase AC voltage source of the input stage generates three-phase voltages with constant magnitude and frequency. The input filter, such as a combination of inductors and capacitors, is required to reduce the current and voltage ripple of the input stage. In addition, the IMC is divided into two stages: a current source rectifier (CSR) of the input stage and a voltage source inverter (VSI) of the output stage.


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Fig. 1. Circuit configuration of IMC drive.


The IMC has a fictitious DC-link without energy storage elements such as capacitors in contrast to the BTB converter. In the IMC, the CSR consists of 12 IGBTs with anti-parallel diodes, which together act as bidirectional switches. The VSI consists of 6 IGBTs with anti-parallel diodes. The input and output stages of the IMC are directly connected by the fictitious DC-link without energy storage elements because the fictitious DC-link is located between the CSR and VSI. Finally, the IMC controls the three-phase current of the R–L load with the desired current magnitudes and frequencies.


B. Modulation Method of CSR

The CSR is modulated by transmitting the maximum voltage generated by the three-phase AC-voltage source of the input stage to the fictitious DC-link. Additionally, the sinusoidal three-phase input currents and unity input PF are maintained by modulating the CSR. The fictitious DC-link voltage is positive and synthesized by the variable switching states of the CSR by using the modulation method. In Fig. 1, the adjacent two switches of the CSR, namely, SAp and S'Ap, always have equivalent switching states. The CSR is modulated by a pair of upper switches (Sxp and S'xp | x = A, B, C) and a pair of lower switches (Sxn and S'xn | x = A, B, C) in the ON state at every moment. Therefore, 9 switching states can exist, depending on the ON state of the switches. Additionally, the vector of the CSR is determined by the switching states [29].

The switches of the CSR should be switched to the ON or OFF state with a four-step commutation. The circuit of the CSR can be short or open circuit, whereas the upper or lower ON-state switches are converted to OFF state. Simultaneously, the upper or lower OFF-state switches in a different phase-leg are converted to the ON state. Therefore, the four-step commutation is an important method in IMC drives.

Fig. 2(a) shows the space vector diagram of the CSR. The vectors of the CSR are classified to 3 null and 6 active states, depending on the switching states of the CSR. If a pair of upper switches and a pair of lower switches in the same phase-leg are in the ON state, then the CSR generates the null states. Conversely, if a pair of upper switches and a pair of lower switches in different phase-legs are in the ON state, then it generates the active states. In the null state, the fictitious DC-link voltage is shorted to zero. In the active state, the power that is generated from the three-phase AC-voltage source of the input stage is transmitted to the load.


Fig. 2. Space vector diagrams of: (a) CSR, (b) VSI.

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(b)


In Fig. 2(a), a reference current phasor lying in sector 1 is reproduced by the references by using the adjacent vectors CSR V1 and CSR V6 as:

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where Im is the common amplitude, and θA, θB, and θC are the respective phase angles. In the case that the current phasor is lying in sector 1, SAp is maintained in the ON state during the full switching period because the adjacent vectors of the current phasor, CSR V1 and CSR V6, include SAp. Therefore, the upper line of the fictitious DC-link is connected to a clamping phase A depending on the state of SAp. Additionally, to synthesize the current phasor, SBn and SCn are modulated using the duty ratios (dx and dy) as:

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원본 그림의 이름: CLP000012003bbd.bmp
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Therefore, the lower line of the fictitious DC-link is alternately connected to clamping phases B and C, depending on the states of SBn and SCn.

Fig. 3 shows the modulation method of the CSR. The clamped and modulated switches are determined by the sector number. Depending on the switching state of the CSR, the upper and lower DC-link voltage is formed. Therefore, the fictitious DC-ink voltage is formed by the maximum voltage that is generated by the three-phase AC-voltage source.


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Fig. 3. Modulation method of CSR.


The average DC-link voltage (VDC(av)) of the fictitious DC-link voltage formed by the modulation of the CSR is expressed by multiplying the duty ratios (dx and dy) and input line-to-line voltages (VAB and VCA), respectively, as follows:

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where VDC(av) is represented by the phase voltage amplitude Vm and the input PF angle 그림입니다.
원본 그림의 이름: CLP00001660129f.bmp
원본 그림의 크기: 가로 65pixel, 세로 65pixel. In the other five sectors, the reference current phasor is synthesized by an equivalent interpretation.


C. Modulation Method of VSI

In Fig. 1, the VSI of the IMC has an equivalent circuit configuration to the common inverter with 6-switch bridges. Fig. 2(b) shows the space vector diagram of the VSI. The vectors of the VSI are classified into 2 null and 6 active states, depending on the switching states of the VSI. If all upper (SRp, SSp, and STp) or lower (SRn, SSn, and STn) switches of the VSI are in the ON state, then the VSI generates null states, which are zero vectors (i.e., V0 and V7). Additionally, the 6 active states are generated by the switching states of the VSI that are similar to the common inverter. The VSI is modulated by the space vector pulse width modulation (SVPWM) with compensation of the floating VDC(av) and carrier-based PWM method [30]. The PWM signals for the VSI are generated by the two modulation signals with a triangular carrier signal. The two modulation signals are calculated by the duty cycles (dx and dy) of the CSR, VDC(av), and reference phase voltages (VR*, VS*, VT*) of each phase. The modulation method for the VSI with the carrier-based PWM method is discussed in detail in [30]. In phase R, the two modulation signals are expressed as:

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where VR* is the reference phase voltage of phase R. It is the output of the current controller of the IMC. In addition, Voffset is the offset voltage of the three-phase reference phase voltages, which is expressed as:

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In other phases, the modulation signals are calculated by an equivalent interpretation. Additionally, through the modulation method for the VSI, the zero current commutation that the switching state of the CSR is changed during the zero vector of the VSI is implemented.



Ⅲ. PROPOSED DPWM METHOD TO REDUCE SWITCHING LOSSES


A. DPWM Method in VSI

Although the VSI of the IMC does not have DC-link energy storage elements, it is similar to the common inverter with 6-switch bridges. Generally, the CPWM method is used to modulate the VSI of the common inverter. It is a general voltage modulation method in which all three phase switching devices are consistently switched in a switching period. However, the CPWM method has the disadvantage of high losses of the switching devices. Therefore, in this study, a DPWM method of voltage modulation to reduce switching losses in the VSI of IMC drives is presented to overcome the disadvantage of the CPWM method. The switching losses of the VSI can be reduced by decreasing the number of switching operations. In other words, the switching devices of only two phases are switched, and the switching devices of the other phase are clamped to the upper or lower fictitious DC-link of the IMC during a switching period.


B. Proposed Modulation Method of VSI

In this study, the 60-degree DPWM method is presented to reduce the switching losses of the VSI. Fig. 4 shows the modulation signals of the VSI that reflects the 60-degree DPWM method. The finding indicates that the three-phase reference phase voltages (VR*, VS*, and VT*), offset voltage (Voffset(60DPWM)) for the 60-degree DPWM method, and reference pole voltages (VRn*, VSn*, and VTn*). First, VR*, VS*, and VT* of the VSI are obtained from the current control of the output stage connected to the R–L load. Additionally, Voffset(60DPWM) is calculated by VR*, VS*, VT*, and VDC(av) and expressed as follows:

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where VDC(av) is the average DC-link voltage of the fictitious DC-link as in (3). In addition, Vmax and Vmin are the maximum and minimum voltages of VR*, VS*, and VT*. Finally, Fig. 4 shows that VRn*, VSn*, and VTn*, as the modulation signals for the 60-degree DPWM method, are calculated by adding VR*, VS*, and VT* to Voffset(DPWM).


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Fig. 4. Modulation signals of VSI reflecting 60-degree DPWM method.


In the common inverter with 6-switch bridges, VRn*, VSn*, and VTn* are used for the modulation signals of the VSI that reflects the 60-degree DPWM method. Additionally, PWM signals for the switching devices of the VSI are obtained by comparing VRn*, VSn*, and VTn* by using a triangular carrier signal. However, in the VSI of IMC drives, the modulation signals in phase R that reflects the 60-degree DPWM method are expressed as follows:

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In the other phases, the modulation signals that reflect the 60-degree DPWM method to reduce switching losses in the VSI are calculated by the equivalent interpretation. The PWM signals for the switching devices in each phase of the VSI are obtained by comparing the modulation signals as in (7) with a triangular carrier signal. Therefore, if the proposed modulation method to reduce switching losses is used for the VSI in IMC drives, then the switching devices of the VSI are not switched during the 60-degree range, in which the magnitude of VR*, VS*, and VT* is the largest.



Ⅳ. SIMULATION RESULTS

To verify the performance of the proposed DPWM method to reduce switching losses in IMC drives, a simulation was performed using PSIM software. The simulation circuit diagram is designed as the configuration of IMC drives, as shown in Fig. 1. The three-phase AC-voltage source supplies three-phase 60 Hz/330 Vrms line-to-line voltage. Additionally, Table I provides the simulation parameters. The parameters of the elements in the input filter were set as Lf = 1.3 mH and Cf = 15 μF.


TABLE I SIMULATION PARAMETERS

Parameters

Value

Control period

100 μs

Switching frequency

10 kHz

Input filter inductance

1.3 mH

Input filter capacitance

15 μF

Load resistance

10 Ω

Load inductance

2 mH


Fig. 5 shows the simulation results of the input line-to-line and DC-link voltages. The results indicate that the (a) input three-phase line-to-line voltages (VAB, VBC, and VCA), (b) fictitious DC-link voltage (VDC), and (c) average DC-link voltage (VDC(av)). VAB, VBC, and VCA are generated by the three-phase AC-voltage source with 60 Hz/330 Vrms. The maximum voltage is transmitted to the DC-link by using the modulation method of the CSR, as shown in Fig. 5(b).


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Fig. 5. Simulation results of input line-to-line voltages and DC-link voltage.


Fig. 6 shows the simulation results of the VSI modulation signals depending on CPWM and the 60-degree DPWM method. The modulation method changes from the CPWM to the 60-degree DPWM method at 0.3 s. It indicates the (a) three-phase reference phase voltages (V*Rs, V*Ss, and V*Ts), (b) offset voltage (Voffset or Voffset(60DPWM)) depending on the modulation method, (c) three-phase reference pole voltages (V*Rn, V*Sn, and V*Tn), and (d) R-phase modulation signals (V*R_high(60DPWM) and V*R_low(60DPWM)) for the VSI compared with the triangular carrier signals. V*Rs, V*Ss, and V*Ts are unchanged with the modulation methods. However, the offset voltage is changed by the proposed DPWM method, as shown in Fig. 6(b). As a result, the modulation signals are changed by Voffset(60DPWM) for the proposed 60-degree DPWM method.


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Fig. 6. Simulation results of the VSI modulation signals depending on CPWM and 60-degree DPWM method.


Fig. 7 shows the simulation results of IMC drives with the 60-degree DPWM method. Fig. 7(a) shows the three-phase currents (IA, IB, and IC) of the input stage. Figs. 7(b) and (c) show the line-to-line voltage (VRS) and three-phase currents (IR, IS, and IT) of the output stage. The input–output currents of the IMC have sinusoidal waveforms, which is characteristic of IMC. In Fig. 7, the output current of the R–L load is controlled to 30 Hz/15 A by using IMC. Finally, Fig. 7(d) shows the PWM signal used for the upper switch (SRp) in phase R of the VSI. The proposed 60-degree DPWM method is used to reduce switching losses at 0.3 s. Therefore, the PWM signal is clamped during a one-third range of a period of the output phase current through the 60-degree DPWM method. Although the 60-degree DPWM method is applied at 0.3 s, it does not have an effect on IMC drives.


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Fig. 7. Simulation results of IMC drives with 60-degree DPWM method.


Fig. 8 shows simulation results of the R-phase reference pole voltage and R-phase output current depending on the modulation index (MI). The output current of the R–L load is controlled to 9.8, 12.25, and 14.7 A. In other words, in Figs. 8(a), (b), and (c), the MI of the IMC drives are 0.35, 0.45, and 0.55, respectively.


Fig. 8. Simulation results of R-phase reference pole voltage and R-phase output current depending on MI: (a) MI = 0.35, (b) MI = 0.45, (c) MI = 0.55.

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(c)


Fig. 9 shows the loss analysis of the VSI switches for junction temperatures of 25 and 125 °C. The switching and conduction losses of the IGBT and diode with the proposed method using the 60-degree DPWM method are compared with those with the CPWM method to identify reductions in switching losses using the proposed method. The losses are analyzed by PSIM simulation, and IGBT modeling is conducted using LUH50G1204’s features of LS Industrial Systems. Table II presents the IGBT features. The performing conditions are as follows: the AC-voltage source supplies the 60 Hz/330 Vrms line-to-line voltage and the output current of the R–L load is controlled to 30 Hz/16.3 A with the 4 kW load power. In the case that the proposed method with the 60-degree DPWM method is used, the IGBT switching losses of the VSI are decreased by 1/3 compared with the case in which the CPWM method is used. Additionally, the IGBT conduction loss is slightly increased because the switching states of the VSI are maintained by being turned ON or OFF during the 60-degree range. However, other losses are similar to those of the VSI with the CPWM method for the junction temperatures of both 25 °C and 125 °C. Exceptions to this notion are the IGBT switching loss, such as the IGBT conduction loss and diode losses of the VSI with the proposed method.


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Fig. 9. Loss analysis of VSI switches depending on junction temperature, shown at 25 °C and 125 °C.


TABLE II PARAMETERS OF SWITCH AND DIODE

Parameters

Value

25 °C

125 °C

Switch

VCE

2.1 V

2.4 V

Eon

2.6 mJ

3.6 mJ

Eoff

1.8 mJ

2.9 mJ

Diode

Vd

2.2 V

2.3 V

Err

0.4 mJ

2.0 mJ


Fig. 10 shows the total losses analysis of the VSI depending on the output power of IMC drives using the CPWM or the proposed method with the 60-degree DPWM method. The total losses are increased with increase in the output power. In addition, the total losses with the CPWM method are higher than those with the proposed method for the junction temperatures of both 25 °C and 125 °C. In the 4 kW output power, the total losses of the VSI switches with the CPWM and proposed methods for the junction temperature of 25 °C are 109.5 and 95.1 W, respectively. Additionally, those for the junction temperature of 125 °C are 150.8 and 124.7 W, respectively.


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Fig. 10. Total loss analysis of VSI depending on output power of IMC drives.


In the same scenario as that in Fig. 9, the loss analysis of the CSR switches for the junction temperatures of 25 and 125 °C are shown in Fig. 11. Similar to the VSI, the losses are analyzed by the PSIM simulation with IGBT modeling by using the LUH50G1204’s features of LS Industrial Systems. The losses of the CSR with the proposed method are similar to those of the CSR with the CPWM method for the junction temperatures of 25 and 125 °C.


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Fig. 11. Loss analysis of CSR switches depending on junction temperature, shown at 25 °C and 125 °C.


In general, the losses of the IMC are classified into losses generated by the power semiconductor and passive elements. Additionally, in the power semiconductor as the IGBTs and the diodes of the CSR and VSI, conduction and switching losses are generated. Copper, core, and equivalent series resistance losses occur in the inductor and capacitor of the passive elements. However, in the simulation results, these losses are ignored.



Ⅴ. EXPERIMENTAL RESULTS

Experiments were conducted to demonstrate the performance of the proposed DPWM method to reduce switching losses in IMC drives. Fig. 12 shows the experimental setup, which is composed of a control board, a power board, and sensors. The control board consists of a digital signal processor (DSP) by using TMS320C28346 and a field- programmable gate array. The control algorithm used for IMC drives with the proposed DPWM method is programmed on the DSP. The power board consists of the CSR and VSI using the IGBT and gate drivers.


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Fig. 12. Experimental setup.


Fig. 13 shows the experimental results, in which the output currents of the R–L load is controlled to 30 Hz/15 A by using the CPWM method. It shows the input line-to-line (VAB), fictitious DC-link (VDC), and average DC-link (VDC(av)) voltages and output R-phase current (IR). The three-phase AC-voltage source supplies 60 Hz/330 Vrms line-to-line voltage.


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Fig. 13. Experimental results where output currents of the R–L load is controlled to 30 Hz/15 A with the CPWM method.


Fig. 14 shows the experimental results of the modified modulation signals by using the proposed DPWM method with the output current controlled to 30 Hz/15 A. The modulation method is changed from the CPWM to the DPWM method. Depending on the proposed DPWM method, the offset (Voffset) and R-phase reference pole (V*Rn) voltages and modulation signals (Dap and Dan) are modified, as shown in Figs. 14(a) and (b). Finally, the PWM signal used for the upper switch (SRp) in phase R of the VSI is modified (Fig. 14(b)) using the proposed 60-degree DPWM method. It is clamped during a one-third range of a period of the output phase current. Although the 60-degree DPWM method is applied, it does not have an effect on IMC drives.


Fig. 14. Experimental results of modified modulation signals using the proposed DPWM method.

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(b)


In the same scenario as that in Fig. 14, Fig. 15 shows experimental results of the input A-phase current (IA), output line-to-line voltage (VRS), output R-phase current (IR), and a PWM signal used for the SRp switch.


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Fig. 15. Experimental results of output current controlled to 30 Hz/15 A with the DPWM method.


Fig. 16 shows the experimental results of the R-phase reference pole voltage depending on MI at values of (a) 0.35, (b) 0.45, and (c) 0.55. The proposed DPWM method for IMC drives is performed with various MIs. In addition, Fig. 17 shows the efficiency comparison between the CPWM and proposed methods with the 60-degree DPWM method through the experiments. The efficiency of the IMC increases dependent on the output power of the IMC and regardless of the modulation methods. However, the efficiency of the IMC by using the proposed method with the 60-degree DPWM method is higher than that using the CPWM method.


Fig. 16. Experimental results of R-phase reference pole voltage depending on MI at: (a) 0.35, (b) 0.45, (c) 0.55.

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(a)

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(b)

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(c)


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Fig. 17. Efficiency comparison between CPWM and proposed method depending on output power of IMC drives.


In Table III, the efficiencies are calculated using the output power and total losses depending on the CPWM and proposed methods. The total losses used for efficiency calculation are obtained from the simulation results at a junction temperature of 125 °C. Finally, the efficiency of the IMC through the experiments is similar to the calculated efficiency in Table III.


TABLE III EFFICIENCY CALCULATION

CPWM

Output Power

1.5 kW

4 kW

Total Losses

121.0 W

208.6 W

Efficiency

91.9%

94.8%

Proposed Method

Output Power

1.5 kW

4 kW

Total Losses

109.4 W

185.9 W

Efficiency

92.7%

95.4%



Ⅵ. CONCLUSIONS

The IMC for AC/AC PCSs is composed of a CSR, VSI, and fictitious DC-link. It has a number of power semiconductor switches, which resulting in increased switching losses. This paper proposed a 60-degree DPWM method to reduce switching losses in IMC drives. It is used for the modulation of the VSI in the IMC. The modulation signals are changed by the offset voltage depending on the 60-degree DPWM method. The PWM signals for the switches of the VSI are clamped during a one-third range of a period of the output phase current. Therefore, the switching losses of the VSI are decreased to 67% compared with the CPWM method, and the efficiency of IMC drives is increased using the proposed DPWM method. The effectiveness of the proposed DPWM method is verified by the simulations and experimental results.



ACKNOWLEDGMENT

This work was supported by the Korea Institute of Energy Technology Evaluation and Planning (KETEP) and Ministry of Trade, Industry & Energy (MOTIE) of the Republic of Korea (No. 20174030201660).



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Yeongsu Bak received B.S. and M.S. degrees in Electrical and Computer Engineering from Ajou University, Suwon, Korea, in 2014 and 2016, respectively. He is currently working toward his Ph.D. degree in Electrical and Computer Engineering at Ajou University, Suwon, Korea. His research interests include grid-connected systems and matrix converters.


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Kyo-Beum Lee received B.S. and M.S. degrees in Electrical and Electronic Engineering from Ajou University, Suwon, Korea, in 1997 and 1999, respectively. He received Ph.D. degree in Electrical Engineering from Korea University, Seoul, Korea, in 2003. From 2003 to 2006, he was affiliated with the Institute of Energy Technology, Aalborg University in Aalborg, Denmark. From 2006 to 2007, he was affiliated with the Division of Electronics and Information Engineering, Chonbuk National University, Jeonju, Korea. In 2007, he joined the School of Electrical and Computer Engineering, Ajou University, Suwon, Korea. He is an Associate Editor of the IEEE Transactions on Power Electronics, IEEE Transactions on Industrial Electronics, Journal of Power Electronics, and Journal of Electrical Engineering & Technology. His current research interests include electric machine drives, renewable power generation, and electric vehicle applications.