사각형입니다.

https://doi.org/10.6113/JPE.2018.18.5.1513

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Islanding Detection Method for Inverter-Based Distributed Generation through Injection of Second Order Harmonic Current


Yoon-Seok Lee*, Won-Mo Yang**, and Byung-Moon Han


†,*Dept. of Electrical Engineering, Myongji University, Yongin, Korea

**KAPES, Seoul, Korea



Abstract

This paper proposes a new islanding detection method for inverter-based distributed generators by continuously injecting a negligible amount of 2nd order harmonic current. The proposed method adopts a proportional resonant (PR) controller for the output current control of the inverter, and a PR filter to extract the 2nd order harmonic voltage at the point of common coupling (PCC). The islanding state can be detected by measuring the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage at the PCC by injecting a 2nd order harmonic current with a 0.8% magnitude. The proposed method provides accurate and fast detection under grid voltage unbalance and load unbalance. The operation of the proposed method has been verified through simulations and experiments with a 5kW hardware set-up, considering the islanding test circuit suggested in UL1741.


Key words: 2nd order harmonic current injection, Inverter-based distributed generation (DG), Islanding detection, Proportional resonant (PR) controller, Proportional resonant filter


Manuscript received Apr. 17, 2017; accepted Aug. 28, 2017

Recommended for publication by Associate Editor Kai Sun.

Corresponding Author: erichan@mju.ac.kr Tel: +82-31-330-6366, Myongji University

*Dept. of Electrical Engineering, Myongji University, Korea

**KAPES, Korea



Ⅰ. INTRODUCTION

Inverter-based distributed generation (DG), which supplies power to the load in parallel with the grid, should be protected from grid faults by quickly disconnecting the grid and detecting the islanding state. When islanding occurs, the DG changes its operation from current control to voltage control. According to the regulations of the Korea Electric Power Corporation, islanding should be detected within 0.5 second, while islanding detection time is defined to be within 2 seconds according to international regulations such as UL1741 and IEEE1547.

Islanding detection methods are classified into passive techniques and active techniques. Well established passive methods include over/under voltage protection (OVP/UVP) and over/under frequency protection (OFP/UFP)[1]-[3], as well as phase jump detection (PJD) [4]. In passive techniques the islanding state is detected using only the system information at the PCC. Passive techniques can be simply implemented. However, they show inaccuracy in cases where the output of the distributed power source is similar to the size of the load power. Their non-detection zone (NDZ) [5] is relatively wide when compared with active techniques.

Various studies have been conducted on active techniques [6]-[8]. Frequency deviation measurements by the discontinuous injection of voltage, current or reactive power into systems were proposed in [9]-[11]. Other active techniques that include impedance measuring, harmonics detection, frequency bias detection, Sandia frequency shift (SFS), Sandia voltage shift (SVS), and frequency jump detection were proposed in [12]-[14]. Among the above active techniques, frequency bias detection has been applied for the inverters linked to photovoltaic systems that are currently coming into wide use. However, since this method discontinuously injects voltage, current or reactive power, some voltage harmonics can be generated, which leads to power quality deterioration, and the shortening of the lifetime of power devices.

In [15], an islanding detection method was proposed using a positive feedback for the grid voltage and frequency. However, due to the voltage disturbances and noise in the feedback voltage controller, this method brings about voltage and current harmonics, which make systems unstable.

In [16], islanding state is detected by sensing magnitude variations of the load impedance after injecting negative- sequence voltage from the inverter. However, this method can only be applied for known values of load impedance. If the load impedance is unknown, the magnitude variation of the load impedance cannot be measured.

In [17]-[19], a negative-sequence current injection method was proposed. This method measures magnitude variations of the negative-sequence voltage at the PCC after injecting 1~ 3% of negative-sequence current. However, if the grid voltage is unbalanced, a negative-sequence voltage occurs at the PCC. Therefore, it is impossible to detect the islanding state under grid voltage unbalance.

In [20], the impedance variation of a grid before and after islanding is measured to distinguish the islanding state. However, this method can only be applied under the assumption that all of the 3-phase grid impedances are equal. If the grid impedance for each phase is different, this method cannot be applied.

In [21], an islanding detection method is proposed to inject a high frequency voltage signal with a magnitude of 3% and to measure the high-frequency impedance. This method has a disadvantage since a detection error can occur when high- frequency harmonics exists in the network. In actual hardware implementations, high-frequency harmonics can introduce interference to the controller and gate drive circuit.

In [22], an islanding detection method is proposed to utilize the high frequency harmonics generated in an inverter due to the dead time of switching and to measure the high- frequency impedance. This method has the same disadvantage as the method proposed in [21].

This paper presents an active islanding detection method for DG units that are interfaced with the grid through an inverter. The proposed method is based on continuously injecting a 2nd order harmonic current with a 0.8% magnitude through current controllers, and quantifying the corresponding 2nd order harmonic voltage at the PCC, as an islanding detection signal. For accurate measurement of the 2nd order harmonic voltage and the fundamental voltage, a proportional resonant (PR) controller and a PR filter were adopted. The operational feasibility of the proposed method was verified through computer simulations and experiments conducted on a 5kW hardware set-up for the islanding detection test circuit suggested in UL1741.

The reason for selecting the 2nd order harmonic current is that normal three phase systems do not have even-order harmonics. If 2nd order harmonic current is injected, the response can be easily detected to recognize the islanding state without interference. The magnitude of the injected 2nd order harmonic current was determined to be 0.8%, which is less than the allowable value of 1.08% in the IEC-61000 specification. The advantage of the proposed method is to offer a simple, fast and accurate islanding detection in the non-detection zone under unbalanced grid voltages and unbalanced loads.



Ⅱ. PROPOSED ISLANDING DETECTION


A. Islanding Detection Test Circuit

A standard testing circuit for islanding detection has been presented in UL1741 [23] and IEEE1547 [24]. Since these standard testing circuits are quite similar to each other, the required testing conditions described in UL1741 were applied in this paper.

Fig. 1 shows a circuit diagram for the islanding detection described in UL1741. The AC grid, distributed power source, and load are assumed to be a lumped parameter model using RLC components. Here R_f and L_f represent the resistance and inductance of the series harmonic filter. The transformer connects the distributed power source to the grid at the PCC. The load resonant frequency was set to 60Hz, which is the same as the grid frequency. In this case, the RLC load comes to be seen as a pure resistive load because the inductive reactive power and the capacitive reactive power are equal.


그림입니다.
원본 그림의 이름: image1.emf
원본 그림의 크기: 가로 545pixel, 세로 206pixel

Fig. 1. UL1741 standard islanding detection circuit.


B. Second-Order Harmonic Current Injection

Fig. 2 shows a circuit diagram of the grid-tied DG analyzed in this paper. The DG is connected to an AC grid through a harmonic filter and transformer.


그림입니다.
원본 그림의 이름: image2.emf
원본 그림의 크기: 가로 404pixel, 세로 186pixel

Fig. 2. Circuit diagram for a grid-tied DG.


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원본 그림의 크기: 가로 92pixel, 세로 59pixel represents the 60Hz fundamental current, and 그림입니다.
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원본 그림의 크기: 가로 107pixel, 세로 64pixel represents the 2nd order harmonic current. When the 2nd order harmonic current is injected from the DG, the grid impedance looks smaller than the load impedance. Therefore, all of the 2nd order harmonic current flows into the grid. This can be explained with the equivalent circuits for the fundamental and 2nd order harmonic currents shown in Fig. 3.


Fig. 3. Equivalent circuits for a grid-tied DG: (a) Fundamental current, (b) 2nd order harmonic current.

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원본 그림의 이름: CLP00001b4c2993.bmp
원본 그림의 크기: 가로 1266pixel, 세로 620pixel

(a)

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원본 그림의 이름: CLP00001b4c0001.bmp
원본 그림의 크기: 가로 1261pixel, 세로 650pixel

(b)


Here, the DG can be regarded as a current source and the AC grid is represented as a voltage source. 그림입니다.
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원본 그림의 이름: CLP00001b4c0003.bmp
원본 그림의 크기: 가로 120pixel, 세로 82pixel represent the fundamental and 2nd order harmonic equivalent impedances for the harmonic filter, respectively. 그림입니다.
원본 그림의 이름: CLP00001b4c0002.bmp
원본 그림의 크기: 가로 106pixel, 세로 76pixel and 그림입니다.
원본 그림의 이름: CLP00001b4c0004.bmp
원본 그림의 크기: 가로 120pixel, 세로 82pixel represent the fundamental and 2nd order harmonic equivalent impedances for the load, respectively. 그림입니다.
원본 그림의 이름: CLP00001b4c0005.bmp
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원본 그림의 크기: 가로 120pixel, 세로 87pixel refer to the fundamental and 2nd order harmonic equivalent impedances for the grid, respectively.

In the case where the DG is connected to an AC grid, the fundamental and 2nd order harmonic voltages applied at the PCC can be represented as equations (1) and (2), respectively. Here, since the impedance values of 그림입니다.
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원본 그림의 이름: CLP00001b4c0009.bmp
원본 그림의 크기: 가로 108pixel, 세로 75pixel and 그림입니다.
원본 그림의 이름: CLP00001b4c000a.bmp
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원본 그림의 크기: 가로 224pixel, 세로 81pixel and 그림입니다.
원본 그림의 이름: CLP00001b4c000c.bmp
원본 그림의 크기: 가로 238pixel, 세로 84pixel. Thus, equations (3) and (4) can be derived from equations (1) and (2), respectively. According to equation (4), the 2nd order harmonic voltage cannot be detected at the PCC.

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원본 그림의 이름: CLP00001b4c000d.bmp
원본 그림의 크기: 가로 690pixel, 세로 190pixel          (1)

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원본 그림의 이름: CLP00001b4c000e.bmp
원본 그림의 크기: 가로 705pixel, 세로 186pixel         (2)

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원본 그림의 이름: CLP00001b4c000f.bmp
원본 그림의 크기: 가로 271pixel, 세로 104pixel        (3)

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원본 그림의 이름: CLP00001b4c0010.bmp
원본 그림의 크기: 가로 261pixel, 세로 92pixel         (4)


However, if the static transfer switch (STS) is opened and the operation mode is changed to the islanding mode, the fundamental voltage and 2nd order harmonic voltage at the PCC can be expressed by equations (5) and (6).

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원본 그림의 이름: CLP00001b4c0011.bmp
원본 그림의 크기: 가로 423pixel, 세로 95pixel   (5)

그림입니다.
원본 그림의 이름: CLP00001b4c0012.bmp
원본 그림의 크기: 가로 487pixel, 세로 98pixel         (6)

Where, 그림입니다.
원본 그림의 이름: CLP000015000002.bmp
원본 그림의 크기: 가로 93pixel, 세로 65pixel and 그림입니다.
원본 그림의 이름: CLP000015000003.bmp
원본 그림의 크기: 가로 108pixel, 세로 67pixel are the magnitudes of the fundamental current and 2nd order harmonic current injected by only the DG, respectively.

When a 2nd order harmonic current is applied to the RLC load, the 2nd order harmonic voltage is visible at the PCC. This phenomenon can provide a new islanding detection scheme. This paper proposes a new islanding detection scheme by evaluating the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage.

From equations (5) and (6), the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage can be represented by equation (7).

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원본 그림의 이름: CLP00001b4c0013.bmp
원본 그림의 크기: 가로 481pixel, 세로 181pixel         (7)

Fig. 4 shows the variation of the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage when injecting a 2nd harmonic current with a 0.8% magnitude into the UL1741 test circuit. This voltage magnitude ratio is nearly zero before the STS opens at 1.0s and goes up to 0.2% with a slope depending on the filter impedance on the inverter and the load impedance. According to the analyitcal results, the load impedance for the 2nd order harmonic current is 0.258 of that for the fundamental current.

The threshold value to distinguish the islanding state was set to 50% of the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage with enough of margins. The islanding detection time is about 25ms which is relatively fast.


그림입니다.
원본 그림의 이름: image5.emf
원본 그림의 크기: 가로 715pixel, 세로 215pixel

Fig. 4. Threshold value for islanding detection.


In the high-frequency harmonic injection method in [21], the islanding state is detected by measuring the harmonic impedance after injecting a harmonic voltage with a 3% magnitude and a 333Hz frequency, where the line frequency is 50Hz. According to their simulation results, the method in [21] has a detection delay of about 50ms. The frequency used is close to the 7th harmonic frequency, which is generated in non-linear loads such as diode bridges and converters. Therefore, a detection error can occur when a non-linear load is involved.



Ⅲ. 2ND ORDER HARMONIC CURRENT INJECTION METHOD

This paper proposes using a proportional resonant (PR) controller to inject the 2nd order harmonic current, which shows a infinite open-loop gain and no phase angle delay at the resonant frequency.

Since the PR controller does not have a steady-state error, it provides a simple control on the stationary reference frame without a complicated rotational reference frame transform. Thus, the control algorithm can be easily implemented with a low-cost microprocessor. The PR controller can inject the 2nd order harmonic current with a parallel resonant controller [25], [26]. The PR controller can be expressed by equation (8).

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원본 그림의 이름: CLP00001b4c0014.bmp
원본 그림의 크기: 가로 981pixel, 세로 287pixel       (8)

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원본 그림의 크기: 가로 53pixel, 세로 42pixel is resonant frequency of the controller, Kp is the proportional gain, and Ki is the integration gain.

Since the PR controller has an excellent performance in terms of eliminating the steady-state error of AC signals, the 2nd order harmonic current controller is connected in parallel with the fundamental current controller as shown in Fig. 5.


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원본 그림의 이름: CLP00001b4c001c.bmp
원본 그림의 크기: 가로 1485pixel, 세로 524pixel

Fig. 5. Configuration of a PR controller.


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원본 그림의 크기: 가로 102pixel, 세로 75pixel and 그림입니다.
원본 그림의 이름: CLP00001b4c0017.bmp
원본 그림의 크기: 가로 103pixel, 세로 76pixel are the reference values of the fundamental and 2nd order harmonic currents in the stationary reference frame, and 그림입니다.
원본 그림의 이름: CLP00001b4c0018.bmp
원본 그림의 크기: 가로 78pixel, 세로 77pixel is the measured output current at the inverter output terminal.

Since the proposed scheme distinguishes the islanding state by the ratio of the 2nd order harmonic voltage to the fundamental voltage, accurately measuring the magnitude of the fundamental voltage and 2nd order harmonic voltage at the PCC is significant.

In order to implement the PR control in a digital system, an appropriate discretization must be performed. A generalized integrator (GI) can be transformed to its equivalent form (9).

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원본 그림의 이름: CLP00001b4c0019.bmp
원본 그림의 크기: 가로 1114pixel, 세로 284pixel       (9)

For accurate measurement, a PR filter with the transfer function expressed in equation (10) was considered in [27].

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원본 그림의 이름: CLP00001b4c001a.bmp
원본 그림의 크기: 가로 667pixel, 세로 171pixel           (10)

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원본 그림의 크기: 가로 72pixel, 세로 51pixel is the resonant frequency of the filter, and k is the damping factor.

Since the fundamental and 2nd order harmonic voltages are sinusoidal through filtering the inverter output voltage, as shown in Fig. 6, the voltage magnitude ratio for islanding detection can be obtained by equation (11).

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원본 그림의 이름: CLP000012a028d3.bmp
원본 그림의 크기: 가로 719pixel, 세로 326pixel         (11)


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원본 그림의 이름: CLP00001b4c001d.bmp
원본 그림의 크기: 가로 1481pixel, 세로 558pixel

Fig. 6. Configuration of a PR filter.


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원본 그림의 이름: CLP00001b4c0023.bmp
원본 그림의 크기: 가로 119pixel, 세로 81pixel and 그림입니다.
원본 그림의 이름: CLP00001b4c0024.bmp
원본 그림의 크기: 가로 129pixel, 세로 84pixel are the magnitudes of the fundamental voltage and the 2nd order harmonic voltage.

Fig. 7 shows a block diagram to describe the proposed islanding detection method and the inverter controller. After detecting the islanding state and opening the STS, the PR voltage controller, which is connected in series with the PR current controller, starts to maintain the PCC voltage. Thus, the reference value of the PR current controller is determined by the output of the PR voltage controller, which has the same structure represented in equation (8).


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원본 그림의 이름: CLP00001b4c0020.bmp
원본 그림의 크기: 가로 1487pixel, 세로 1002pixel

Fig. 7. Block representation of the proposed islanding detection method.



Ⅳ. OPERATION ANALYSES


A. Islanding Detection under UL1741 Conditions

To verify the proposed islanding detection, simulations were conducted using PSCAD/EMTDC. Table 1 shows the circuit parameters of the inverter-based DG when the UL1741 regulation is applied. The inverter-based DG is represented by a battery energy storage system (BESS). V_grid and f_grid are the grid voltage and frequency. L_f and C_f are the filter inductor and capacitor, and R_f is the damping resistor for the filter. Q_f is the quality factor and f_sw is the switching frequency. R_load, L_load, C_load are the RLC values of the load.


TABLE I TEST CIRCUIT PARAMETERS

Items

Parameter

Rated Power

5kW

Battery Voltage

336~470.4V

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220Vrms

Filter 그림입니다.
원본 그림의 이름: CLP00001b4c0029.bmp
원본 그림의 크기: 가로 51pixel, 세로 60pixel

3mH

Filter 그림입니다.
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원본 그림의 크기: 가로 52pixel, 세로 61pixel

15uF

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0.1Ω

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60Hz

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10kHz

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9.68Ω

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원본 그림의 크기: 가로 115pixel, 세로 57pixel

10.27mH

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원본 그림의 크기: 가로 114pixel, 세로 53pixel

685.1uF


Fig. 8 shows the frequency variation at the PCC, the instantaneous grid current, the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage, and the islanding detection signal obtained from computer simulations with PSCAD/EMTDC. The power supplied by the BESS and the power consumption of the load were set to be equal.


그림입니다.
원본 그림의 이름: image9.emf
원본 그림의 크기: 가로 725pixel, 세로 567pixel

Fig. 8. Simulation results under UL1741 test conditions.


The system is islanded at time t=1.0s by opening the STS. Prior to the islanding event, the BESS also injects 2nd order harmonic current through the PR current controller in addition to the fundamental current. Since the system frequency remains within the limit of 60 ± 0.1 Hz, the islanding state cannot be detected by sensing the frequency variation only.

Although a 2nd order harmonic current of a 0.8% magnitude is injected by the PR current controller, the 2nd order harmonic voltage at the PCC is not visible until t=1.0s. However, the level of the 2nd order harmonic voltage appears while the 2nd order harmonic current starts to flow into the load from 1.0s. Therefore, the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage rises and reaches 0.2%.


B. Islanding Detection under an Unbalanced Grid Voltage

In actual distribution systems, the grid voltage is not always balanced. If the instantaneous grid voltage is not balanced when the BESS is operated in the coupled state with the grid, a negative-sequence voltage appears at the PCC. Thus, islanding detection by injecting a negative-sequence current or voltage cannot be applied in general.

Fig. 9 shows the instantaneous grid voltage, the unbalance ratio, the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage, and the islanding detection signal. The top waveforms show the grid voltage where the Phase-B and Phase-C voltages are 10% lower than the Phase-A voltage.

The detection method based on a negative-sequence voltage injection cannot be used for islanding detection when the grid voltage unbalance is larger than 5%. Therefore, the grid unbalance ratio was set to 10% and islanding occurs at 1.0s in this simulation. The magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage remains at 0% under the voltage unbalance. However, when islanding occurs, the magnitude ratio rises and reaches 0.2%. Therefore, the proposed scheme provides an accurate and fast islanding detection under an unbalanced grid voltage.


그림입니다.
원본 그림의 이름: image10.emf
원본 그림의 크기: 가로 703pixel, 세로 608pixel

Fig. 9. Simulation results under an unbalanced grid voltage.


C. Islanding Detection under an Unbalanced Load

In this case study, all of the conditions comply with the UL1741 test conditions except that the load resistance is not balanced. Simulations were performed to evaluate the islanding detection accuracy and the detection sensitivity due to load unbalance. It is assumed that the load in Phase-A is changed with a step variation of ±10% between 0.2s and 1.8s.

Fig. 10 shows the load current, the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage, and the islanding detection signal. The balanced three-phase load is operated between 0.2s and 0.5s.


그림입니다.
원본 그림의 이름: image11.emf
원본 그림의 크기: 가로 708pixel, 세로 567pixel

Fig. 10. Simulation results under an unbalanced load.


The unbalanced three-phase load reduced the Phase-A load by 10%, and is operated between 0.5s and 0.75s. The unbalanced three-phase load increased the Phase-A load by 10%, and is operated between 0.75s and 1.0s.

The magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage is kept at 0% despite the load unbalance and step variation. However, the voltage magnitude ratio rises and reaches 0.2% when islanding occurs at 1.0s. Therefore, the voltage magnitude ratio can be used as a stable detection signal for islanding.


D. Islanding Detection Performance under Variations of the Load Sharing Ratio

The response of the proposed islanding detection method under the load sharing ratio was analyzed, where the grid sharing is assumed to be 40% and 60%. When the grid shares the load by 40% and 60%, the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage is zero before the STS is open, and the islanding state can be detected as shown in Fig. 11(a) and Fig. 11(b), respectively. Therefore, the grid load sharing ratio does not affect the islanding detection itself. However, if the grid load sharing ratio becomes larger, the detection is easier and faster. This result is not surprising because the islanding detection is a lot more difficult when the grid current is near zero.


Fig. 11. Simulation results under the load sharing ratio: (a) 40%, (b) 60%.

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원본 그림의 크기: 가로 581pixel, 세로 410pixel

(a)

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E. Islanding Detection Performance under Variations of the Grid Impedance

The response of the proposed islanding detection method under the weak grid condition was analyzed and shown in Fig. 12, where the grid impedance is assumed to be 1.0 and 2.0 times the inverter impedance of 3mH. When the grid impedance is 1.0 times, the load current is mainly provided by the inverter and the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage is shown to be 0.3 and the islanding state can be detected as shown in Fig. 12(a). However, when the grid impedance is 2.0 times, the load current is mainly provided by the inverter and the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage is shown to be 0.49 and the islanding state can be critically detected as shown in Fig. 12(b). Therefore, the proposed method cannot be applied for power systems in which the grid impedance is 2 times larger than the inverter impedance.


Fig. 12. Simulation results under a weak grid: (a) =1.0, (b)=2.0.

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Ⅴ. HARDWARE EXPERIMENTS

Fig. 13 shows a hardware test set-up to experimentally verify the proposed islanding detection. The entire system was configured using a 5kWh lithium-polymer battery, a 5kVA inverter, a main controller, an RLC load, and a 5kVA power transformer. To verify the validity of the simulations, all of the conditions for the experiment were set identically to those in Table 1.


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Fig. 13. Experimental setup for islanding detection.


Fig. 14 shows experimental results for islanding detection when the grid voltage is balanced. From top to bottom, the figures show the variations of system frequency, the instantaneous grid current, the voltage ratio, and the islanding detection signal. Before the occurrence of islanding at 1.0s, small amounts of current flow into the grid because the power consumption of the load and the amount of power supplied by the BESS are the same. As with the results obtained in the simulation, the frequency variation cannot be used for islanding detection since the frequency variation is negligible.

Since a 2nd order harmonic current with a 0.8% magnitude is injected after the occurrence of islanding, the grid is blocked and the level of the 2nd order harmonic voltage measured at the PCC rises simultaneously. However, the voltage magnitude ratio rises slowly and reaches 0.2%. Thus, this value can be utilized to detect the islanding state.


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Fig. 14. Anti-islanding test results under the UL1741 test conditions.


Fig. 15 shows experimental results for islanding detection when the grid voltage is unbalanced. The unbalanced ratio was set to 10%, which is the same as that in the simulation. The voltage ratio of the 2nd order harmonic voltage to the fundamental voltage does not increase before 1.0s. However, once islanding occurs, a 2nd order harmonic voltage at the PCC appears due to the injected 2nd order harmonic current. Therefore, the voltage ratio of the 2nd order harmonic voltage to the fundamental voltage increases rapidly. The proposed method can effectively detect the islanding state under an unbalanced grid voltage.


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Fig. 15. Anti-islanding test results under an unbalanced grid voltage.


Fig. 16 shows experimental results for islanding detection when the load is unbalanced. The unbalanced ratio was set to be the same as that in the simulation. From 0.2s to 0.6s, the load in one phase was increased by 10% of the rated power; and from 0.6s to 2.0s, the load in one phase was decreased by 10% of the rated power. The voltage ratio of the 2nd order harmonic voltage to the fundamental voltage under a load unbalance is kept at 0% before islanding occurs. After islanding occurs at 1.0s, the voltage ratio increases proportional to the magnitude of the injected 2nd order harmonic current. The proposed method can effectively detect the islanding state under an unbalanced load voltage.


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Fig. 16. Anti-islanding test results under an unbalanced load.


Fig. 17 shows the analysis results of the proposed islanding detection method under the weak grid condition through experiments, where the grid impedance is assumed to be 1.0 and 2.0 times the inverter impedance of 3mH. When the grid impedance is equal to 1.0그림입니다.
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Fig. 17. Anti-islanding test results under a weak grid: (a) =1.0, (b) =2.0.

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Fig. 18 shows the performance of the PR controller and the PR filter. From top to bottom, the figures show the variations of inverter output current, the fundamental current and the injected 2nd order harmonic current. The inverter output current measured through current sensor has a 2nd order harmonic current. The second and third graphs show the fundamental current and 2nd order harmonic current extracted through the PR filter. These waveforms are identical to the waveforms injected by the PR controller.


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Fig. 18. Experimental results of a PR controller and a PR filter.



Ⅵ. CONCLUSION

This paper proposes a new islanding detection method by measuring the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage at the PCC after injecting 0.8% of 2nd order harmonic current. For accurate measurement of the 2nd order harmonic voltage and fundamental voltage, a proportional resonant (PR) controller and a PR filter were adopted.

The proposed method provides accurate and fast detection under grid voltage unbalance and load unbalance. The operation of the proposed method was verified through simulations with PSCAD/EMTDC and experiments with a 5kW hardware set-up. This was done considering the islanding test circuit in UL1741.

The proposed method can offer an islanding detection time within 25ms, which is much faster than the international standard of 2.0s. Therefore, the proposed detection method can provide a high-quality power to the load and enhance transient performance.

The proposed method was verified only for distribution systems with one DG. Therefore, future works will improve the proposed method so that it can be applied to distribution systems involving with two or more DGs. In case of systems with two DGs, two 2nd order harmonics with a phase shift of 90 degree can be used for islanding detection.

However, the proposed method cannot be applied to power systems that already contain 2nd order harmonic voltage. In addition, according to the analysis results, the proposed method cannot be applied to power systems in which the grid impedance is 2 times larger than the inverter impedance.



ACKNOWLEDGMENT

This research was supported by Korea Electric Power Corporation (grant number : R18XA06-52).



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Yoon-Seok Lee was born in Incheon, Korea. He received his B.S. and M.S. degrees in Electrical Engineering from Myongji University, Seoul, Korea, where he is presently working towards his Ph.D. degree. His current research interests include power electronics applications for distributed generation and microgrid systems.


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Won-Mo Yang was born in Osan, Korea. He received his B.S. and M.S. degrees in Electrical Engineering from Myongji University, Seoul, Korea. He is presently working as a Researcher at KAPES Co., Seoul, Korea. His current research interests include HVDC and FACTS.


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Byung-Moon Han received his B.S. degree in Electrical Engineering from Seoul National University, Seoul, Korea, in 1976; and his M.S. and Ph.D. degrees from Arizona State University, Tempe, AZ, USA, in 1988 and 1992, respectively. He was with the Westinghouse Electric Corporation as a Senior Research Engineer in the Science and Technology Center, Pittsburg, PA, USA. He is presently working as a Professor in the Department of Electrical Engineering, Myongji University, Seoul, Korea. His current research interests include power electronics applications for distributed generation, AC/DC microgrids, FACTS and HVDC.