사각형입니다.

https://doi.org/10.6113/JPE.2018.18.5.1567

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Enhanced Startup Diagnostics of LCL Filter for an Active Front-End Converter


Neeraj Agrawal* and Vinod John


†,*Department of Electrical Engineering, Indian Institute of Science, Bangalore, India



Abstract

The reliability of grid-connected inverters can be improved by algorithms capable of diagnosing faults in LCL filters. A fault diagnostic method during inverter startup is proposed. The proposed method can accurately generate and monitor information on the peak value and the location of the peak frequency component of the step response of a damped LCL filter. To identify faults, the proposed method compares the evaluated response with the response of a healthy higher-order damped LCL filter. The frequency components in the filter voltage response are first analytically obtained in closed form, which yields the expected trends for the filter faults. In the converter controller, the frequency components in the filter voltage response are computed using an appropriately designed fast Fourier transform and compared with healthy LCL response parameters using a finite state machine, which is used to sequence the proposed startup diagnostics. The performance of the proposed method is validated by comparing analytical results with the simulation and experimental results for a three-phase grid-connected inverter with a damped LCL filter.


Key words: Active front-end converter, DC–AC power conversion, Discrete Fourier transform, Fault diagnosis, Fast Fourier transform, Finite state machine, Power filter


Manuscript received Mar. 14, 2018; accepted Jun. 17, 2018

Recommended for publication by Associate Editor Kai Sun.

Corresponding Author: vjohn@iisc.ac.in Tel: +91-80-2293-2928, Fax: +91-80-2360-0444, IISc Bangalore, India

*Department of Electrical Engineering, Indian Institute of Science, India



Ⅰ. INTRODUCTION

Grid-connected voltage source converters (VSCs) present high-performance features, such as sinusoidal input current, constant dc voltage, controllable power factor, and ride- through capability. However, these devices encounter the problem of high switching frequency ripple in the grid current [1].

Inductive filters are the simplest filter configurations that can be used between pulse width-modulated VSCs and grids. However, inductive filters often fail to reduce high switching frequency ripples to acceptable levels [2]. A good solution to reducing the grid current ripple is to utilize an LCL filter on the AC side, as shown in Fig. 1 [1], [3].


그림입니다.
원본 그림의 이름: image1.png
원본 그림의 크기: 가로 456pixel, 세로 354pixel

Fig. 1. Schematic of a three-phase grid-connected inverter with a precharge circuit used for the startup diagnostics of the LCL filter before the S2 contactor is closed.


The reliability of power electronic equipment is crucial in general industrial applications. LCL filters, in addition to dc links and semiconductor switches, are weak components that impact the reliability of voltage-fed systems [4]-[7]. An industry-based survey revealed that inductors account for 8% of the total fragile components in power electronic systems [8]. Parameter variations or component faults in the LCL filter can increase harmonics and ripple injection in the grid. The open or short circuit of individual components in an LCL filter with a damping network can overload the filter component and shift resonant frequency. These effects, in turn, affect filtering. Consequently, electrical and thermal stresses increase and may ultimately lead to converter failure.

The high cost incurred by process interruption and repair and the general need to improve reliability have motivated studies on fault detection and diagnosis [7].

Variations in filter parameters can be attributed to the degeneration of insulation over time. Insulation degeneration leads to interturn faults in inductors or dry-out defects in capacitors. Moreover, shorts may be caused by dust collection on the filter component and pollution. Mechanical vibrations and thermal cycling can lead to the open circuit conditions of connectors and joints.

Numerous methods for increasing inverter fault detection capabilities to improve the reliability of VSCs have been proposed [9]-[16]. These methods primarily focus on the fault detection of the semiconductor switches of the insulated gate bipolar transistor (IGBT). Several studies have focused on fault detection in switches [7], [9], and [15] and short-circuit (SC) faults in switches [17]-[19]. IGBT fault diagnostic methods have been compared in detail [10]. Nevertheless, only a few reports are available on inductive elements in harmonic filters. Thus, the development of reliable methods for the evaluation of filter components under inverter startup in a power converter with LCL filter remains limited.

The filtering performance, resonance, and stability of LCL filters in inverters have been widely studied [3], [20]. However, improving the reliability of VSCs by analyzing faults in the LCL filter subsystem has not been comprehensively covered. Measures for improving the reliability of filter components include the detection of aging phenomena and potential faults [21]-[23]. An approach to monitoring the condition and detecting the degradation of the inductance of an LCL filter with a magnetic flux sensor has been presented [24]. The fault detection method proposed in the present work has the following advantages over that presented by [24]: First, it does not require extra sensors to detect filter failure. Second, it detects faults that occur during the startup of the inverter by using a precharge circuit (Fig. 1), thus helping prevent any fatal failures. Third, it detects faults in the inductance, capacitor, and the damping resistance of the filter. Open- and short-circuit faults in filter components also affect the reliability of the converter. These faults, which result in converter faults under startup conditions, can also be detected using the proposed method.

Many of the methods proposed for the detection of the aging phenomena in transformer windings have been discussed [23], [25]-[27]. The transfer function method is a common diagnostic and monitoring technique [28]. In this method, the spectral signature of the impulse responses of voltages and currents are compared to detect interturn short or winding failures [29]. The frequency response of the system is calculated by taking the fast Fourier transform (FFT) of the impulse response. This case is constrained by the offline nature of the frequency response evaluation. In the present work, the concept of the transfer function method is extended to the detection of variations in the parameters of a damped LCL filter. A major challenge to such an extension is the achievement of the exact analytical solution to the response of the higher-order damped LCL filter in terms of filter parameters. In addition to the investigation of startup diagnostics [30], the present work provides a comparison of the FFT and Fourier transform for different LCL filter parameters. The finite state machine (FSM) used for the LCL filter fault diagnosis is also explained. Furthermore, simulation results are compared with experimental results. The method used to obtain the pulsed step excitation for the desired frequency component of the LCL filter at startup is also described. The FFT of the filter step response is used to detect the parameter variations that can lead to faults in the LCL filter under startup conditions. The analytical expressions for the step response of a damped LCL filter is also derived to obtain the response’s discrete-time Fourier transform, which is implemented as FFT. Practical requirements, such as the number of samples and the length of the FFT window, are also identified. The FFT components of the filter response are compared with that of the nominal filter to check if the parameters are within the acceptable ranges. If the parameters are outside the acceptable ranges, then the power converter is prevented from continuing its startup sequence, thus preventing possible failure during the operation of the power converter.

The proposed method for the identification of faults in the LCL filter is experimentally verified under unreliable conditions emulated by changing LCL filter parameters. This verification method is performed if only one parameter changes significantly at a time during a fault. The method is rapid and can detect parameter variations without introducing a long delay during the startup sequence. The experimental results show that the digital resource consumption of the proposed LCL filter startup diagnostic algorithm is only 12% of that of a state-of-the-art active front-end (AFE) control program.

In Section II, the methods for exciting the LCL filter for diagnosis are discussed, and the analytical expressions for the spectral response are obtained. Section III presents a discussion on the FSM program implemented on the field programmable gate array (FPGA). Simulation and experimental results are presented in Section IV. The conclusion is provided in Section V.



Ⅱ. LCL FILTER ANALYSIS

An LCL filter with passive damping for an AFE converter is designed following the suggested method [31], [32]. Split-capacitor resistive damping is suitable for a wide range of power levels and is considered in this work [33]. Fig. 2 shows the LCL filter with a damping branch that consists of a capacitor Cd and a resistor Rd. In this configuration, the current is shared between the capacitor C1 and the damping branch. The LCL filter component parameters used in the power converter are given in Table I. The effects of parameter variations on the LCL filter are studied by analyzing its step response.


그림입니다.
원본 그림의 이름: image2.jpeg
원본 그림의 크기: 가로 699pixel, 세로 598pixel

Fig. 2. LCL filter with split capacitor damping topology showing the line-to-line excitation of the LCL filter component in Fig. 1 together with the damping resistors. The filter capacitors 그림입니다.
원본 그림의 이름: CLP00000fc4003b.bmp
원본 그림의 크기: 가로 71pixel, 세로 71pixel are represented by 그림입니다.
원본 그림의 이름: CLP00000fc4003a.bmp
원본 그림의 크기: 가로 76pixel, 세로 72pixel and 그림입니다.
원본 그림의 이름: CLP00000fc40039.bmp
원본 그림의 크기: 가로 76pixel, 세로 65pixel, and the damping resistor is represented by 그림입니다.
원본 그림의 이름: CLP00000fc40038.bmp
원본 그림의 크기: 가로 73pixel, 세로 71pixel.


TABLE I GRID, FILTER, AND CONVERTER PARAMETERS

PARAMETER

 

VALUE

Grid

 

 

Vg

Grid Voltage

230 V

Ig

Grid Current

15 A

fg

Grid Frequency

50 Hz

Filter

 

 

L1,L2

 

2.5 mH, 2.5 mH

C1,Cd

 

10 µF, 10 µF

Rd

 

25 Ω

Converter

 

 

IGBT’s

 

SKM75GAL123D

VCE

 

1200 V

IC

 

75 A

fC

 

10 kHz

Vdc

 

800 V

Cdc

 

1650 µF


A. Filter Excitation and Initial Conditions

The filter is excited by applying a step voltage by using IGBT switches in the inverter legs, as shown in Fig. 1. To measure the voltage step response, voltage 그림입니다.
원본 그림의 이름: CLP00000fc4003c.bmp
원본 그림의 크기: 가로 146pixel, 세로 78pixel across the capacitor 그림입니다.
원본 그림의 이름: CLP00000fc4003d.bmp
원본 그림의 크기: 가로 64pixel, 세로 72pixel is sensed by using a voltage sensor, where x(i) = 1. To measure the current step response, current 그림입니다.
원본 그림의 이름: CLP00000fc4003e.bmp
원본 그림의 크기: 가로 81pixel, 세로 79pixel through the inductor 그림입니다.
원본 그림의 이름: CLP00000fc4003f.bmp
원본 그림의 크기: 가로 70pixel, 세로 70pixel is sensed by using a current sensor, as shown in Fig. 2.

Initially, all IGBTs are in the off state, that is, the inverter is in the zero state. Likewise, 그림입니다.
원본 그림의 이름: CLP00000fc40040.bmp
원본 그림의 크기: 가로 80pixel, 세로 76pixel, 그림입니다.
원본 그림의 이름: CLP00000fc40041.bmp
원본 그림의 크기: 가로 95pixel, 세로 69pixel, and 그림입니다.
원본 그림의 이름: CLP00000fc40042.bmp
원본 그림의 크기: 가로 102pixel, 세로 66pixel are assumed to have zero initial conditions. 그림입니다.
원본 그림의 이름: CLP00000fc40043.bmp
원본 그림의 크기: 가로 421pixel, 세로 111pixel are the precharge voltages of the DC bus capacitors in Fig. 1, and the main contactor 그림입니다.
원본 그림의 이름: CLP00000fc40044.bmp
원본 그림의 크기: 가로 74pixel, 세로 69pixel is kept open.


B. Step-Pulse Excitation of the LCL Filter

Input step excitation can be applied to the LCL filter in three possible modes:

1. Input step excitation on the phase leg-to-neutral basis.

2. Input step excitation on a phase-to-phase basis, with the third leg unexcited.

3. Input step excitation from one phase leg to the other two phase legs that are operated in parallel.

The first method is suitable for a single-phase inverter or a three-phase four-wire inverter with a neutral connection. The other two methods can be used for three-phase three-wire inverters. In the second method, only the two legs of the inverter are operated at a time. In the third method, all three legs are operated simultaneously. When the three legs are used for excitation, changes in the parameters of an individual leg are difficult to detect because of coupling with the third leg. Therefore, in this work, the step input is applied through the second method.


C. Analysis of the Step Response of the LCL Filter

During the power converter startup, the precharge contactor 그림입니다.
원본 그림의 이름: CLP00000fc40045.bmp
원본 그림의 크기: 가로 66pixel, 세로 67pixel, shown in Fig. 1, is closed, and the main contactor 그림입니다.
원본 그림의 이름: CLP00000fc40046.bmp
원본 그림의 크기: 가로 74pixel, 세로 66pixel is kept open. Under this condition, the DC bus voltage is precharged to the peak line-to-line voltage, and the filter can be excited by applying appropriate gate pulses to the IGBTs. Given that the contactor 그림입니다.
원본 그림의 이름: CLP00000fc40046.bmp
원본 그림의 크기: 가로 74pixel, 세로 66pixel is open, the inductor 그림입니다.
원본 그림의 이름: CLP00000fc40047.bmp
원본 그림의 크기: 가로 69pixel, 세로 74pixel will not carry any current. The ground faults in all the filter components can be sensed by ensuring that 그림입니다.
원본 그림의 이름: CLP00000fc40048.bmp
원본 그림의 크기: 가로 567pixel, 세로 89pixel (Fig. 2) under all test conditions.

The transfer function estimation is used to detect parameter variations in 그림입니다.
원본 그림의 이름: CLP00000fc40049.bmp
원본 그림의 크기: 가로 239pixel, 세로 72pixel, and 그림입니다.
원본 그림의 이름: CLP00000fc4004a.bmp
원본 그림의 크기: 가로 80pixel, 세로 69pixel. A step voltage input is applied to the LCL filter by the inverter, and its voltage and current responses are measured. Variations in the filter parameters cause a shift in the measured output spectral components. The FFT of voltage 그림입니다.
원본 그림의 이름: CLP00000fc4004b.bmp
원본 그림의 크기: 가로 78pixel, 세로 77pixel is calculated to diagnose parameter variations in the LCL filter.

The state-space model of the LCL filter in Fig. 2 with open 그림입니다.
원본 그림의 이름: CLP00000fc40046.bmp
원본 그림의 크기: 가로 74pixel, 세로 66pixel is given by

그림입니다.
원본 그림의 이름: CLP00000fc421b1.bmp
원본 그림의 크기: 가로 392pixel, 세로 156pixel     (1)

where

그림입니다.
원본 그림의 이름: CLP00000fc40004.bmp
원본 그림의 크기: 가로 926pixel, 세로 697pixel    (2)

The characteristic equation of the LCL filter model with split-capacitor passive damping can be evaluated from a matrix and is given by

그림입니다.
원본 그림의 이름: CLP00000fc40005.bmp
원본 그림의 크기: 가로 1325pixel, 세로 141pixel        (3)

The roots of characteristic equation (3) are given by

그림입니다.
원본 그림의 이름: CLP00000fc40006.bmp
원본 그림의 크기: 가로 394pixel, 세로 299pixel     (4)

The expressions for 그림입니다.
원본 그림의 이름: CLP00000fc40007.bmp
원본 그림의 크기: 가로 63pixel, 세로 54pixel, 그림입니다.
원본 그림의 이름: CLP00000fc40008.bmp
원본 그림의 크기: 가로 62pixel, 세로 57pixel, and 그림입니다.
원본 그림의 이름: CLP00000fc40009.bmp
원본 그림의 크기: 가로 73pixel, 세로 57pixel in (4) are derived as

그림입니다.
원본 그림의 이름: CLP00000fc4000b.bmp
원본 그림의 크기: 가로 533pixel, 세로 891pixel       (5)

The transfer function of capacitor voltage 그림입니다.
원본 그림의 이름: CLP00000fc4000c.bmp
원본 그림의 크기: 가로 98pixel, 세로 84pixel to input voltage 그림입니다.
원본 그림의 이름: CLP00000fc4000d.bmp
원본 그림의 크기: 가로 108pixel, 세로 72pixel is expressed in terms of the parameters of the LCL filter by using (6):

그림입니다.
원본 그림의 이름: CLP00000fc4000e.bmp
원본 그림의 크기: 가로 950pixel, 세로 266pixel   (6)

The transfer function in (6) is used to obtain the expressions for the step response of 그림입니다.
원본 그림의 이름: CLP00000fc4000f.bmp
원본 그림의 크기: 가로 165pixel, 세로 100pixel.


D. FFT of LCL Filter Step Response

The step response of the damped LCL filter is obtained by first calculating the impulse response from the filter model in (1). The partial fraction expansion of the transfer function (6) is derived using (4) and (5) to calculate the impulse response.

그림입니다.
원본 그림의 이름: CLP00000fc40010.bmp
원본 그림의 크기: 가로 1054pixel, 세로 384pixel         (7)

where

그림입니다.
원본 그림의 이름: CLP00000fc40011.bmp
원본 그림의 크기: 가로 991pixel, 세로 173pixel


그림입니다.
원본 그림의 이름: CLP00000fc40012.bmp
원본 그림의 크기: 가로 1229pixel, 세로 174pixel

Equation (7) is multiplied by 1/s to obtain the partial fraction expansion for the step response. The step response is then further simplified through a second partial fraction expansion and reverted to the time domain. Accordingly, the closed form expression for the time-domain step response of the damped LCL filter is obtained and is given by (8).

그림입니다.
원본 그림의 이름: CLP00000fc40013.bmp
원본 그림의 크기: 가로 1081pixel, 세로 222pixel        (8)

where the analytical expressions for the coefficients are obtained as follows:

그림입니다.
원본 그림의 이름: CLP00000fc40014.bmp
원본 그림의 크기: 가로 639pixel, 세로 483pixel

The Fourier transform of the capacitor voltage response (8) in the continuous domain is given by (9)

그림입니다.
원본 그림의 이름: CLP00000fc40015.bmp
원본 그림의 크기: 가로 1272pixel, 세로 300pixel          (9)

The discrete Fourier transform (DFT) of VC1 is given by (10)

그림입니다.
원본 그림의 이름: CLP00000fc40016.bmp
원본 그림의 크기: 가로 1372pixel, 세로 400pixel          (10)

where N is the number of samples in the DFT window.

Equation (10) is implemented using an FFT algorithm on a digital signal processor (DSP). The maximum frequency component present in the step response is at 그림입니다.
원본 그림의 이름: CLP00000fc4004d.bmp
원본 그림의 크기: 가로 215pixel, 세로 62pixel, where 그림입니다.
원본 그림의 이름: CLP00000fc4004c.bmp
원본 그림의 크기: 가로 82pixel, 세로 55pixel corresponds to the LCL filter resonance frequency. The location and magnitude of the peak frequency component (그림입니다.
원본 그림의 이름: CLP00000fc4004c.bmp
원본 그림의 크기: 가로 82pixel, 세로 55pixel) depend on the filter parameters. Therefore, the variations in the parameters of the LCL filter are inferred from the spectrum of the step response. The dependencies of the spectral components of 그림입니다.
원본 그림의 이름: CLP00000fc40056.bmp
원본 그림의 크기: 가로 91pixel, 세로 75pixel are analytically obtained as the functions of the filter components. However, implementing (10) for all the frequency components is computationally complex. Thus, to simplify the computation, FFT, rather than DFT, is used.


E. Criteria for the Selection of Sampling Time (Ts) and Number of Samples(N)

For the calculation of FFT, Ts and N should be properly selected to extract the required spectral components. If the number of samples is N and the sampling time is Ts , then the total time window is T = N·Ts. The fundamental frequency component in the FFT equals 1/T. The first, second, and third harmonics are at 2/T, 3/T, and 4/T, respectively, and so forth. Therefore, T should be sufficiently large to detect the small variation in the frequency. T can be increased by increasing N or Ts. With an increase in N, the DSP computation time increases. With an increase in Ts, the information from the step response is lost because of undersampling and, consequently, will not be fully extracted by the FFT time window. However, an excessively large T is also not useful because filter oscillations will die out and no additional information of interest will be retained. In this work, the effects of N and Ts on step response are studied. The nominal values of the LCL filter parameters are L1 = L2= 2.5 mH, C1 = Cd = 10 µF, Rd = 25 Ω, 그림입니다.
원본 그림의 이름: CLP00000fc4004e.bmp
원본 그림의 크기: 가로 82pixel, 세로 58pixel ≈ 4333 rad/s, 그림입니다.
원본 그림의 이름: CLP00000fc4004f.bmp
원본 그림의 크기: 가로 70pixel, 세로 72pixel = 690 Hz, and 그림입니다.
원본 그림의 이름: CLP00000fc40050.bmp
원본 그림의 크기: 가로 70pixel, 세로 69pixel = 1.45 ms. To capture changes in the resonant frequency, T is set to be 10 times greater than T0. As a result of parameter variations, the change in 그림입니다.
원본 그림의 이름: CLP00000fc4004e.bmp
원본 그림의 크기: 가로 82pixel, 세로 58pixel is approximately 200 Hz, as shown in Table II. The minimum frequency shift should be lower than 200 Hz to capture variations reliably. Here, N = 256 and Ts = 100 µs provide a time window (T) of 25.6 ms. The minimum detectable frequency variation due to parameter changes is 40 Hz. This value corresponds to the detection of 6% change in the resonant frequency. When N = 128 and Ts = 42 µs and the corresponding time window (T ) is 5.376 ms, the minimum detectable frequency variation attributed to parameter change is 186 Hz. This value corresponds to a change of 27% in the resonant frequency. In this work, the results for N =128 and N = 256 are obtained. The results for N =128 samples are presented in Section IV for the clear differentiation between the adjacent bins of DSP-computed FFT response, which is captured using an oscilloscope.


TABLE II PARAMETER EFFECT SPECTRUM OF THE 128-POINT FFT: SAMPLING PERIOD, 42 µS; FREQUENCY RESOLUTION, 186 HZ

Parameter Value

Simulation

Experiment

L1 (mH)

Cd F)

C1 F)

Rd (Ω)

Peak Location

% of Peak Nominal Value

Peak Location

% of Peak Nominal Value

2.5

10

10

25

4th (744 Hz)

9.90%

4th (744 Hz)

0287h (7.06%)

5

10

10

25

3rd (558 Hz)

11.82%

3rd (558 Hz)

02C3h (7.79%)

2.5

Open

10

25

5th (930 Hz)

5.65%

5th (930 Hz)

0170h (3.10%)

2.5

10

10

Short

4th (744 Hz)

17.66%

4th (744 Hz)

02E3h (7.92%)



Ⅲ. FSM FOR LCL FILTER FAULT DIAGNOSIS

The algorithm for executing the FFT on the data collected after the excitation of the LCL filter (described in Section II-B) is sequenced using an FSM in the digital controller.

All combinations of the phase legs of the VSC and LCL filters are diagnosed. The FSM, shown in Fig. 3, is implemented in the FPGA of the digital controller platform to detect variations in filter parameters.


그림입니다.
원본 그림의 이름: image3.png
원본 그림의 크기: 가로 400pixel, 세로 298pixel

Fig. 3. Finite state machine for the detection and diagnosis of variations in the parameters of the LCL filter shown in Fig. 1. The transitions from one state to another are represented by arrows, and the activity in the state is indicated.


All the gate pulses to the inverter are given through the FPGA. Thus, the DSP and the FPGA should be synchronized. The instant the FPGA provides gate pulses to the IGBT inverter for filter excitation is synchronized with the instant the DSP starts to collect samples of the voltage response using its analog-to-digital converter (ADC).

In the FPGA, the start of the LCL filter diagnosis controller corresponds to state S0. The diagnosis program waits for time t1, which is the settling time. The system then enters state S1, as shown in Fig. 3. In state S1, the FPGA sends a start signal to the DSP. When the DSP acknowledges, the start signal and after a path delay time, the FPGA applies step pulses to the filter. Simultaneously, the DSP captures the voltage step response through its ADCs and stores the samples in its memory. The DSP then calculates the FFT of the stored voltage step response data. The DSP also stores the calculated FFT values of the samples by using an in-place FFT algorithm [34]. It then evaluates the location and magnitude of the voltage response spectrum and subsequently detects the filter parameter variations by comparing the FFT peak and location of the tested LCL filter with those of a known healthy LCL filter. The results of this comparison correspond to row 1 in Table II. The DSP then sends the status signal of whether the filter leg is healthy to the FPGA. Similarly, the other combinations of the inverter legs are diagnosed. After the diagnosis is completed, the DSP sends a flag signal to the FPGA that indicates if the filter is considered healthy. The converter can start only if the FSM evaluates a healthy flag in state S4. Otherwise, a flag indicating the faulty phase is provided to the host user.



Ⅳ. SIMULATION AND EXPERIMENTAL RESULTS

The configuration of the inverter as an AFE converter with an LCL filter is shown in Fig. 1. The nominal system parameters, including those of the filter, are listed in Table I. The LCL filter parameters are varied in the simulations to verify the ability of the proposed algorithm to detect changes in filter parameters. The VSC is connected to the grid as a two-level AFE converter with a switching frequency of 10 kHz. To validate the proposed method, the values of the filter components are changed in the circuit in the experimental hardware, as indicated in Table II. The test excitation signal is applied using the IGBT of the VSC, as explained in Section II-B.


A. Simulation Results

1) Continuous-Time and Discrete-Time Analytical Results: The diagrams in Fig. 4 are plotted using analytical equations given by (9) and (10) of the amplitude response. Fig. 4 presents a comparison between the peak amplitude of the continuous Fourier transform and the corresponding peak of the discrete FFT. The figure shows that sensitivity levels to the filter parameter variations range from 50% to 200% of the nominal values. Fig. 4(d) shows that parabolic behavior is enhanced with the variation in Rd but not with the variation in other parameters (i.e., 그림입니다.
원본 그림의 이름: CLP00000fc4001e.bmp
원본 그림의 크기: 가로 149pixel, 세로 73pixel, and 그림입니다.
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원본 그림의 크기: 가로 70pixel, 세로 64pixel) because the value of 그림입니다.
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원본 그림의 크기: 가로 74pixel, 세로 70pixel is optimized to minimize filter loss [31], [32].


Fig. 4. Comparison of FFT and the Fourier transform results showing variations in the peak values with increases in the following parameters: (a) Filter inductance, L1(mH), (b) Filter capacitance, 그림입니다.
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원본 그림의 크기: 가로 179pixel, 세로 70pixel, (c) Damping capacitance, 그림입니다.
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원본 그림의 크기: 가로 193pixel, 세로 73pixel, (d) Damping resistance, 그림입니다.
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원본 그림의 크기: 가로 172pixel, 세로 66pixel. (The directional arrows indicate the corresponding y-axis of the curve. The black dots represent the values of the nominal parameters of the filter.)

그림입니다.
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(a)

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(d)


2) Fault Discrimination: The effects of the variations in the filter parameters on peak location are plotted using analytical equations (9) and (10). The diagrams are shown in Fig. 5. The plots show that peak location is less sensitive to 그림입니다.
원본 그림의 이름: CLP00000fc40051.bmp
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원본 그림의 크기: 가로 149pixel, 세로 73pixel, and 그림입니다.
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원본 그림의 크기: 가로 78pixel, 세로 68pixel).


Fig. 5. Comparison of the FFT and Fourier transform for the peak location for the variations in the following parameters: (a) Filter inductance, L1(mH), (b) Filter capacitance, 그림입니다.
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원본 그림의 크기: 가로 186pixel, 세로 75pixel, (c) Damping capacitance, 그림입니다.
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원본 그림의 크기: 가로 190pixel, 세로 76pixel, (d) Damping resistance, 그림입니다.
원본 그림의 이름: CLP00000fc4001d.bmp
원본 그림의 크기: 가로 172pixel, 세로 66pixel. (The directional arrows indicate the corresponding y-axis of the curve. The black dots represent the nominal values of the parameters of the filter.)

그림입니다.
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원본 그림의 크기: 가로 1272pixel, 세로 806pixel

(a)

그림입니다.
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(b)

그림입니다.
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(c)

그림입니다.
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원본 그림의 크기: 가로 1225pixel, 세로 785pixel

(d)


   Furthermore, the effect of the variation in Rd on peak location shows an opposite trend to that of L1 and C1. Therefore, 그림입니다.
원본 그림의 이름: CLP00000fc40027.bmp
원본 그림의 크기: 가로 68pixel, 세로 66pixel has changed if the peak location is unchanged but the peak amplitude has decreased, as shown in Fig. 4(c). Rd has changed if the peak location (ω) has increased. Conversely, either 그림입니다.
원본 그림의 이름: CLP00000fc40028.bmp
원본 그림의 크기: 가로 65pixel, 세로 69pixel or 그림입니다.
원본 그림의 이름: CLP00000fc40029.bmp
원본 그림의 크기: 가로 71pixel, 세로 67pixel has changed if the peak location (ω) has decreased. Given that 그림입니다.
원본 그림의 이름: CLP00000fc40028.bmp
원본 그림의 크기: 가로 65pixel, 세로 69pixel and 그림입니다.
원본 그림의 이름: CLP00000fc40029.bmp
원본 그림의 크기: 가로 71pixel, 세로 67pixel show the same change trend, only the identification of the leg in which the filter parameter has changed, and not the discrimination of the individual components (i.e., 그림입니다.
원본 그림의 이름: CLP00000fc40028.bmp
원본 그림의 크기: 가로 65pixel, 세로 69pixel and 그림입니다.
원본 그림의 이름: CLP00000fc40029.bmp
원본 그림의 크기: 가로 71pixel, 세로 67pixel), is feasible.

3) FFT Using Simulation: Fig. 7 shows the FFT of the voltage step response of LCL filter with a damping resistor, in which the number of samples is 128 and the sampling time is 42 µs. The FFT is calculated using MATLABTM The FFT of the voltage step response is shown for varying values of inductance (그림입니다.
원본 그림의 이름: CLP00000fc40028.bmp
원본 그림의 크기: 가로 65pixel, 세로 69pixel), capacitance (그림입니다.
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원본 그림의 크기: 가로 147pixel, 세로 80pixel), and damping resistor (Rd) taken from Table II.


B. Experimental Results

Fig. 6 shows a flowchart of fault detection in the LCL filter through FFT during startup.


그림입니다.
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Fig. 6. Flowchart of fault detection in the LCL filter during inverter setup.


Fig. 7. Calculation of the FFT of the simulated voltage step response: (a) Nominal LCL filter parameters, (b) L1 = 2× 그림입니다.
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원본 그림의 크기: 가로 243pixel, 세로 69pixel, (c)  Cd= 0.5× 그림입니다.
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원본 그림의 크기: 가로 251pixel, 세로 70pixel, (d) With\hout damping branch.

그림입니다.
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원본 그림의 크기: 가로 1506pixel, 세로 751pixel

(a)

그림입니다.
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원본 그림의 크기: 가로 1477pixel, 세로 749pixel

(b)

그림입니다.
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원본 그림의 크기: 가로 1502pixel, 세로 764pixel

(c)

그림입니다.
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원본 그림의 크기: 가로 1498pixel, 세로 740pixel

(d)


The step pulses to the filter are applied to two phases at a time, as shown in Fig. 9. The voltage signal captured by the DSP corresponds to the sensor signal 그림입니다.
원본 그림의 이름: CLP00000fc40053.bmp
원본 그림의 크기: 가로 148pixel, 세로 77pixel in Fig. 2. Therefore, when the combination of excitations is used on all three pairs of phases, a fault in a particular phase can be determined. Fig. 8 shows the FFT of the voltage step response of the LCL filter with damping resistor. The FFT is calculated in the DSP. It is outputted using a digital-to-analog converter and captured on an oscilloscope to verify the accurate evaluation of the FFT. The results in Table II confirm that as the parameters change, the peak frequency location and amplitude correspond to those predicted by analysis and simulation. Therefore, the calculated peak frequency location and amplitude of frequency spectrum can be used to diagnose faults in the LCL filter.


Fig. 8. Experimental FFT of voltage step response calculated in the DSP and outputted to an oscilloscope to visualize the computation within the DSP: (a) Nominal LCL filter parameters, (b) 그림입니다.
원본 그림의 이름: CLP00000fc40034.bmp
원본 그림의 크기: 가로 57pixel, 세로 65pixel = 2× 그림입니다.
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원본 그림의 크기: 가로 246pixel, 세로 66pixel, (c) 그림입니다.
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원본 그림의 크기: 가로 62pixel, 세로 60pixel = 0.5× 그림입니다.
원본 그림의 이름: CLP00000fc40037.bmp
원본 그림의 크기: 가로 245pixel, 세로 71pixel, (d) Without damping branch. Scale Y: 500 mv/div, X: 200 µs/div, 42 µs = 186 Hz.

그림입니다.
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원본 그림의 크기: 가로 1407pixel, 세로 639pixel

(a)

그림입니다.
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(b)

그림입니다.
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원본 그림의 크기: 가로 1402pixel, 세로 604pixel

(c)

그림입니다.
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원본 그림의 크기: 가로 1292pixel, 세로 601pixel

(d)


Fig. 9. Step voltage pulse applied to the LCL filter: (a) Healthy filter (Row 5 of Table II), (b) Unhealthy filter (Row 2 of Table II). Scale Y: Ch1 acknowledges signal 5 V/div, Ch2 step response (a) 1 V/div, (b) 2 V/div, Scale X: 10 ms/div.

그림입니다.
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원본 그림의 크기: 가로 620pixel, 세로 319pixel

(a)

그림입니다.
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원본 그림의 크기: 가로 619pixel, 세로 318pixel

(b)


Fig. 8 shows the variation in the first peak, which corresponds to the filter resonance frequency with respect to parameter variations. For the nominal parameters, the resonant frequency is approximately 744 Hz (4th harmonic). As the filter parameters are varied, the frequency shifts from the 3rd to the 5th harmonic, and the peak amplitude varies from 3% to 10%. These frequency and amplitude variations are tabulated in Table II. The DSP calculated spectrum for the different experimental conditions closely matches the simulation results shown in Fig. 7.


C. Computational Resource Requirement and Execution Time

Resource consumption by the digital controller and the time taken for algorithm execution are major considerations in the implementation of fault diagnostic programs. For the diagnostic logic elements, only 12% of what is typically used for the control of the inverter is required. The total time taken for the diagnosis of the filter for all three phases is less than 1 s, which is considered an acceptable delay in the startup sequence of an inverter in many applications.



Ⅴ. CONCLUSION

The fault detection and diagnosis techniques for an LCL filter in a grid-connected inverter during startup are analyzed. The transfer function method is extended to filter diagnosis and used with step excitation to detect parameter variations in the LCL filter. The exact analytical response of the higher- order damped LCL filter is derived in terms of the filter parameters. The continuous and discrete spectral analysis results of the damped LCL filter are compared and verified. An approach for filter diagnosis that combines FSM- and FFT-based methods is proposed. The use of FSM to implement the startup diagnostic algorithm is explained. The proposed method uses the FFT of the step response to identify parameter changes in the damped LCL filter. The proposed method is verified through analysis, time-domain simulations, and experiments on a prototype AFE rectifier with a damped LCL filter. The magnitude and location of the peak of the FFT response can be used to identify the faulted phase. The execution of the proposed diagnostic method in an advanced digital controller platform requires minimal additional resources and introduces less than 1 s of delay in the startup of the inverter.



ACKNOWLEDGMENT

This work was supported by the Central Power Research Institute of the Ministry of Power, Government of India, under the Power Conversion, Control, and Protection Technologies for Microgrid project.



REFERENCES

[1] E. J. Bueno, F. Espinosa, F. J. Rodriguez, J. Urefia, and S. Cobreces, “Current control of voltage source converters connected to the grid through an LCL-filter,” in 35th Ann. IEEE Power Electron. Conf., Vol. 1, pp. 68-73, 2004.

[2] IEEE application guide for ieee std 1547(tm), ieee standard for interconnecting distributed resources with electric power systems, IEEE Std 1547.2-2008, pp. 1-217, April 2009.

[3] K. Jalili and S. Bernet, “Design of LCL filters of active- front-end two-level voltage-source converters,” IEEE Trans. Ind. Electron., Vol. 56, No. 5, pp. 1674-1689, May 2009.

[4] A. Babel, A. Muetze, R. Seebacher, K. Krischan, and E. Strangas, “Condition monitoring and failure prognosis of igbt inverters based on on-line characterization,” in IEEE Energy Conversion Congress and Exposition (ECCE), pp. 3059-3066, 2014.

[5] B. Ji, X. Song, W. Cao, V. Pickert, Y. Hu, J. Mackersie, and G. Pierce, “In situ diagnostics and prognostics of solder fatigue in igbt modules for electric vehicle drives,” IEEE Trans. Power Electron., Vol. 30, No. 3, pp. 1535-1543, Mar. 2015.

[6] K. Debaprasad and B. Bose, “Investigation of fault modes of voltage-fed inverter system for induction motor drive,” IEEE Trans. Ind. Appl., Vol. 30, No. 4 pp. 1028-1038, Jul./ Aug. 1994.

[7] K. Rothenhagen and W. Fuchs, “Performance of diagnosis methods for igbt open circuit faults in three phase voltage source active rectifiers,” in 35th Ann. IEEE Power Electron Conf., Vol. 6, pp. 4348-4354, 2004.

[8] S. Yang, A. Bryant, P. Mawby, D. Xiang, L. Ran, and P. Tavner, “An industry-based survey of reliability in power electronic converters,” IEEE Trans. Ind. Appl., Vol. 47, No. 3, pp. 1441-1451, May 2011.

[9] R. de Araujo Ribeiro, C. Jacobina, E. Cabral da Silva, and A. Lima, “Fault detection of open-switch damage in voltage-fed pwm motor drive systems,” IEEE Trans. Power Electron., Vol. 18, No. 2, pp. 587-593, Mar. 2003.

[10] B. Lu and K. S. Sharma, “A literature review of igbt fault diagnostic and protection methods for power inverters,” IEEE Trans. Ind. Appl., Vol. 45, No. 5, pp. 1770-1777, Sep.-Oct. 2009.

[11] B. Gonzalez-Contreras, J. Rullan-Lara, L. Vela-Valdes, and A. Clau-dio S., “Modelling, simulation and fault diagnosis of the three-phase inverter using bond graph,” in IEEE Ind. Electron Int. Symp., pp. 130-135, 2007.

[12] F. Huang and F. Flett, “IGBT fault protection based on di/dt feedback control,” in IEEE Power Electron. Specialists Conf., pp. 1478-1484, 2007.

[13] P. Gilreath and B. Singh, “A new centroid based fault detection method for 3-phase inverter-fed induction motors,” in 36th IEEE Power Electron. Specialists Conf., pp. 2664-2669, 2005.

[14] C. Kral and K. Kafka, “Power electronics monitoring for a controlled voltage source inverter drive with induction machines,” in 31st Annu. IEEE Power Electron. Specialists Conf., Vol. 1, pp. 213-217, 2000.

[15] M. Awadallah and M. Morcos, “Diagnosis of switch open-circuit fault in pm brushless dc motor drives,” in Large Engineering Systems Conf. on Power Engineering, pp. 69-73, 2003.

[16] M. Rodriguez, A. Claudio, D. Theilliol, and L. Vela, “A new fault detection technique for igbt based on gate voltage monitoring,” in IEEE Power Electron. Specialists Conf., pp. 1001-1005, 2007.

[17] R. Pagano, Y. Chen, K. Smedley, S. Musumeci, and A. Raciti, “Short circuit analysis and protection of power module IGBTs,” in 20th Annu. IEEE Appl. Power Electron. Conf. and Exposition, Vol. 2, pp. 777-783, 2005.

[18] R. Pagano and A. Raciti, “Evolution in IGBT’s protection against short circuit behaviors by gate-side circuitry,” in IEEE Ind. Electron. Int. Sym., Vol. 3, pp. 913-918, 2002.

[19] A. Bhall, S. Shekhawat, J. Gladish, and G. Dolny, “IGBT behavior during desat detection and short circuit fault protection,” in Power Semicond. Devices & ICs, 1998. Kyoto. Proc. of the 1998 Int. Symp., pp. 245-248, 1998.

[20] M. Liserre, F. Blaabjerg, and S. Hansen, “Design and control of an lcl-filter-based three-phase active rectifier,” IEEE Trans. Ind. Appl., Vol. 41, No. 5, pp. 1281-1291, Sep.-Oct., 2005.

[21] T. Paulraj, S. Hari Kishan, and S. Dhana, “Modeling and location of faults in power transformer using transfer function and frequency response analysis,” in Advanced Communication Control and Computing Technologies (ICACCCT), International Conf., pp. 83-87, 2014.

[22] M. Bigdeli, M. Vakilian, E. Rahimpour, and D. Azizian, “Transformer winding diagnosis using comparison of transfer function coefficients,” in 8th Electrical Engineering/ Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), International Conf., pp. 681-683, 2011.

[23] J. Bak-Jensen, B. Bak-Jensen, and S. Mikkelsen, “Detection of fualts and aging phenomena in transformers by transfer functions,” IEEE Trans. Power Del., Vol. 10, No. 1, pp. 308-314, Jan. 1995.

[24] S. Chandar and S. K. Panda, “Degradation detection and diagnosis of inductors in lcl filter integrated with active front end rectifier,” IEEE Trans. Power Electron., Vol. 33, No. 2, pp. 1622-1632, Feb. 2018.

[25] E. Rahimpour, J. Christian, and K. Feser, “Transfer function method to diagnose axial displacement and radial deformation of transformer windings,” IEEE Trans. Power Del., Vol. 18, No. 2, pp. 493 -505, Apr. 2003.

[26] T. Leibfried and K. Feser, “Monitoring of power transformers using the transfer function method,” IEEE Trans. Power Del., Vol. 14, No. 4 pp. 1333-1341, Oct. 1999.

[27] I. M.K. and V. M., “Transformer fault detection by frequency response analysis,” IOSR J. Electr. Electron. Eng., Vol. 1, No. 4, pp. 27-32, Jul.-Aug. 2012.

[28] K. Ragavan and L. Satish, “An efficient method to compute transfer function of a transformer from its equivalent circuit,” IEEE Trans. Power Del., Vol. 20, No. 2, pp. 780- 788, Apr. 2005.

[29] J. Christian and K. Feser, “Procedures for detecting winding displacements in power transformers by the transfer function method,” IEEE Trans. Power Del., Vol. 19, No. 1, pp. 214-220, Jan. 2004.

[30] N. Agrawal and V. John, “Lcl filter startup diagnostics for an active front end converter,” in Power Electronics, Drives and Energy Systems IEEE International Conf., pp. 1-6, 2016.

[31] R. Beres, X. Wang, F. Blaabjerg, C. Bak, and M. Liserre, “Comparative evaluation of passive damping topologies for parallel grid-connected converters with lcl filters,” in Power Electronics International Conf., pp. 3320-3327, 2014.

[32] C. Chen, Z. Wang, Y. Zhang, G. Li, and Y. Wu, “A novel passive damping lcl-filter for active power filter,” in Transportation Electrification Asia-Pacific (ITEC Asia- Pacific), IEEE Conf. and Expo, pp. 1-5, 2014.

[33] T. C. Wang, Z. Ye, G. Sinha, and X. Yuan, “Output filter design for a grid-interconnected three phase inverter,” in 34th Ann. Power Electron. Specialists, IEEE conf., Vol. 2, pp. 779-784, 2003.

[34] E. O. Brigham, The Fast Fourier Transform and Its Applications. Prentice-Hall, 1988.



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사진 찍은 날짜: 2017년 04월 13일 오후 13:41

Neeraj Agrawal received his B.Tech degree in Electrical Engineering from Harcourt Butler Technological University, Kanpur, India, in 2011 and his M.E. degree in Electrical Engineering from the Indian Institute of Science, Bangalore, India, in 2013. He has worked as an Edison Engineer at GE Global Research and Transportation, Bangalore, India. He is currently working as a Data Scientist with Honeywell Technology Solutions, Bangalore, India. His research interests include the application of machine learning techniques in the field of power electronics.


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Vinod John (S’92–M’00–SM’09) received his B.Tech degree in Electrical Engineering from the Indian Institute of Technology, Madras, India; his M.S.E.E. degree in Power Electronics from the University of Minnesota, Minneapolis, MN, USA; and his Ph.D. degree in Power Electronics from the University of Wisconsin–Madison, Madison, WI, USA. He has worked in research and development positions at GE Global Research, Niskayuna, NY, USA, and Northern Power, Barre, VT, USA. He is currently an Associate Professor at the Indian Institute of Science, Bangalore, India. His research interests include power electronics and distributed generation, power quality, high-power converters, and motor drives.