https://doi.org/10.6113/JPE.2018.18.5.1608

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Fast Diagnosis Method for Submodule Failures in MMCs Based on Improved Incremental Predictive Model of Arm Current

Kunshan Xu^† and Shaojun Xie^*

^†,*College of Automation Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, China

Abstract

The rapid and correct isolation of faulty submodules (SMs) is of great importance for improving the reliability of modular multilevel converters (MMCs). Therefore, a fast diagnosis method containing fault detection and fault location determination was presented in this paper. An improved incremental predictive model of arm current was proposed to detect failures, and the multi-step prediction method was used to eliminate the negative impact of disturbances. Moreover, a control method was proposed to strengthen the fault characteristics to rapidly locate faulty arms and faulty SMs by detecting the variation rate of the SM capacitor voltage. The proposed method can rapidly and easily locate faulty SMs under different load conditions without the need for additional sensors. The experimental results have validated the effectiveness of the proposed method by using a single-phase MMC with four SMs per arm.

Key words: Fault detection, Fault location, Modular multilevel converter (MMC), Predictive model, Submodule (SM) failure

Manuscript received Jun. 23, 2017; accepted Jul. 1, 2018

Recommended for publication by Associate Editor Yong Kang.

^†Corresponding Author: xks1986@163.com Tel: +86-18260091063, Nanjing Univ. of Aeronautics and Astronautics

^*College of Automation Engineering, Nanjing University of Aeronautics and Astronautics, China

Ⅰ. INTRODUCTION

Modular multilevel converters (MMCs) have been widely used in high power applications, such as high voltage direct current (HVDC) transmissions [1]-[3], power quality controllers [4] and high voltage motor drivers [5] due to their advantages such as flexibility, extensibility, high efficiency, good output performance, low switching frequency and common dc bus [6]-[8].

The MMC shown in Fig. 1 contains six arms, each of which is composed of many submodules (SMs). The SMs are constructed by one capacitor and two power semiconductor devices, and a failure in any of the SM can lead to an abnormal state. The reliability of the MMC is limited by the large number of devices. Therefore, in order to improve the reliability of MMCs, once SMs failures occur, it is necessary to correctly detect the faults and to rapidly isolate the relevant SMs.

Fig. 1. Power circuit of a three-phase MMC.

Power semiconductor devices are the most vulnerable components in SMs [9]. The faults of power semiconductor devices can be divided into two categories: short-circuit fault and open-circuit fault. The former can be detected by hardware circuits integrated into the drivers of power switches, while the latter is difficult to detect and may cause serious damage to the MMC. Therefore, detecting the open-circuit faults of power devices in MMCs has become a research hotspot in recent years [10]-[16]. The rapidity and robustness of fault diagnosis methods under complicated conditions are two important issues within this topic.

The fault diagnosis methods for open-circuit failures in MMC can be divided into two classes: 1) model-based [10]- [14] and 2) artificial intelligence-based [14]-[16]. The authors of [10] proposed a fault detection method to eliminate the influence of disturbances by using a Kalman filter. However, the diagnosis time is longer than 100ms. In [11], a fault diagnosis method based on the sliding mode observer was proposed, and the robustness of this method was analyzed in [12]. However, at least 50ms is needed to detect and locate faults, and the amount of calculation increases significantly as the number of SMs increases. A fault diagnosis method composed of fault detection, fault tolerance and fault location based on the state observer was proposed in [13]. However, more than 30ms is needed to detect a fault and only a single fault can be diagnosed. In addition, disturbances and uncertainties may have negative impacts on the detection results of this method. A clustering algorithm and calculated capacitance methods were proposed in [14]. The former is robust, but the algorithm is complicated and requires a large amount of calculation. The latter is relatively simple, but the robustness is poor under a small arm current. Moreover, both methods need at least 13ms to detect and locate faults. A detection method based on the state machine was proposed in [15], which can diagnose various faults within 5ms. However, the complexity and cost of the system structure increase with an increasing number of SMs for the adoption of multiple additional voltage sensors. An adaptive linear neuron-recursive least squares (ADALINE-RLS) algorithm to estimate capacitor voltages was proposed to detect and locate different types of SM faults in [16]. However, it needs more than 30ms and has a considerable amount of calculation.

A fast fault diagnosis method for SM failures in MMCs based on detecting the variation rate of the SM capacitor voltage was presented in [17]. The work presented in this paper is an improved method. This paper proposes a new fast fault diagnosis method composed of three steps, i.e. fault detection, fault feature strengthening and fault location determination. The fault detection step finds faults by comparing the difference between the predictive arm currents based on an improved incremental predictive model and the measured arm currents with a threshold value. Disturbances are eliminated by using the multi-step prediction method. The fault feature strengthening step is designed to make the fault characteristics more remarkable. Afterwards, the fault is located in the fault location step by the characteristics of the variation rate of the SM capacitor voltage. The proposed method can locate SM failures without additional sensors. Furthermore, the robustness and rapidity of the fault diagnosis method are verified by experimental results obtained with a single phase MMC prototype.

This paper is organized as follows. The mathematical model and fault characteristics of MMCs are reviewed in Section II. Section III presents the fault diagnosis method including fault detection, fault feature strengthening, and fault location determination. In Section IV, the effectiveness of the proposed method is verified with experimental results. Finally, some conclusions are drawn in Section V.

Ⅱ. MATHEMATICAL MODEL AND FAULT CHARACTERISTICS OF MMCS

A. Mathematical Model of MMCs

In Fig. 2, an equivalent circuit of a single-phase MMC is used for analysis, where U_dc is the DC voltage, u_o represents the AC voltage, u_u and i_u are the voltage and current of the upper arm, u_l and i_l are the voltage and current of the lower arm, R_s is the arm parasitic resistance, and i_c is defined as the circulating current flowing through both the upper and lower arms. The equation of the upper and lower arm current in the MMC can be expressed as follows:

   (1)

     (2)

         (3)

   (4)

   (5)

    (6)

     (7)

Fig. 2. Equivalent circuit of a single phase of MMC.

Where, u_sm(u)(i), s_u(i), u_c,u(i) and u_sm(l)(i), s_l(i), u_c,l(i) are the output voltage, switching functions and capacitor voltage of the ith SM of the upper and lower arms respectively. In addition, i= 1, 2, ..., N.

In Fig. 1, when the state of S₁ is ON and the state of S₂ is OFF, the SM voltage u_sm is the capacitor voltage U_c, and s_u(i) or s_l(i) is 1. When the state of S₁ is OFF and the state of S₂ is ON, u_sm(u)(i) or u_sm(l)(i) is 0, and s_u(i) or s_l(i) is 0.

B. Fault Characteristics of SM Open-circuit Faults

The fault characteristics of SM open-circuit failures are analyzed in this section. As shown in Fig. 3, there are three types of SM faults: S₁ fault, S₂ fault, and S₁&S₂ fault. Table I depicts the SM output voltage under SM open-circuit faults.

TABLE I SM OUTPUT VOLTAGE UNDER SM OPEN-CIRCUIT FAULTS

S	iu/il	usm
		normal	S1 fault	S2 fault	Both S1 and S2 fault
1	＋ －	Uc Uc	Uc 0	Uc Uc	Uc 0
0	＋ －	0 0	0 0	Uc 0	Uc 0

Fig. 3. Three types of SM open-circuit faults: (a) S₁ fault, (b) S₂ fault, (c) S₁&S₂ fault.

(a)	(b)	(c)

As shown in Fig. 3(a), when a S₁ fault occurs and the arm current is negative, the capacitor of the faulty SM cannot discharge. In this case, the capacitor voltages of the healthy SMs are lower than those of the faulty SMs, and the absolute value of the voltage slope of the healthy SMs is larger than that of the faulty SMs, which are nearly zero. As shown in Fig. 3(b), when a S₂ fault occurs and the arm current is positive, the capacitor charges when the switching function is 0. Then the capacitor voltages of the healthy SMs are lower than those of the faulty SMs, and the absolute value of the voltage slope of the healthy SMs is smaller than that of the faulty SMs. As shown in Fig. 3(c), the fault characteristics of a S₁&S₂ fault contain the fault characteristics of S₁ and S₂ faults. Therefore, the fault diagnosis method of both S₁ faults and S₂ faults can diagnose such faults, which will not be discussed in this paper. However, the case in which a S₁ fault and a S₂ fault occur on different arms will be analyzed in this paper.

Based on u_sm shown in Table I and equation (4) and (5), when a S₁ fault occurs, if the arm current is negative and the switching function is 1, the measured value of the arm voltage is smaller than the ideal value. When a S₂ fault occurs, if the arm current is positive and the switching function is 0, the measured value of the arm voltage is larger than the ideal value. The fault characteristics of SM open-circuit faults are shown in Table II. and represent ideal values of the upper and lower arm voltage, respectively.

TABLE II FAULT CHARACTERISTICS OF SM OPEN-CIRCUIT FAULTS

type	absolute value of voltage slopes of capacitors	arm voltage	detection condition
S1 fault	Healthy SM > Faulty SM (nearly 0)	(S=1)	iarm < 0
S2 fault	Healthy SM < Faulty SM	(S=0)	iarm > 0

Ⅲ. PROPOSED FAULT DIAGNOSIS METHOD

A. Fault Detection

The predictive values of the arm currents can be calculated by (1) and (2). Normally, the difference between the predicted value and the measured value is small. However, the difference becomes larger when faults occur because the measured value of the arm voltage deviates from the ideal value.

Equations (1) and (2) lead to a predictive model for arm current using discretization and adding the compensation c:

         (8)

where:

, .

x(k) is the measured value of the arm current, is the predictive value of the arm current, f_s is the sampling frequency, c is the compensation for the error between the predictive value and the measured value caused by uncertainties such as scale error, sampling delay, parameter deviation, etc., and is the compensation gain.

e(k) is defined as the difference between the predictive value and measured value of the arm current. e(k) is expected to be small when a MMC works normally, and it becomes much larger when faults occur. Therefore, c can be denoted as:

   (9)

where:

e₁ is the expected error, and e₂ is the unexpected error.

When |e(k)| is smaller than e₁, e(k), which is larger than e₁ is added to compensate for e(k). When |e(k)| is larger than e₁, e(k) is substituted by e₁ or -e₁. If the error is caused by the SM faults that exist all the time while faults occur, e(k) cannot be compensated by e₁ and is larger than e₂. No compensation is added, and e(k) increases quickly and becomes larger than the threshold value.

From (8), parameter uncertainties, measurement errors and disturbances can make e(k) larger than e₂ under healthy condition or they can make e(k) smaller than e₁ under faulty condition. Then the detection result may be wrong. The parameter uncertainties and measurement errors in can be compensated by c. However, those in Bu(k) cannot be compensated during one sampling cycle. When B is small, there is small difference caused by Bu(k) and the detection result is not affected. Increasing the sampling frequency can make B small when L is determined.

The multi-step prediction method used to eliminate disturbances is shown in Fig. 4. is the predictive value at time k+p based on the value at time k-1. In this paper, denotes f(k+1) = f(k+1) - f(k), and it is used to calculate (8). Formula (10) is expressed as:

    (10)

where:

, .

(10) is defined as an incremental predictive model. By using the value from time k–1 to k+p–1, , … , are obtained, and the average predicted values at time k+p can be expressed as (11). If p is selected properly, the disturbances become quite small in .

           (11)

Fig. 4. Block diagram of the multi-step predictive method.

Disturbances in can also affect the detection results. J, the average value of the difference between and from time k to k+p-1, is used for detection.

     (12)

In (9), J is used to replace e(k). The proposed fault detection method is shown in Fig. 5. If J is larger than J_th, a fault has occurred. Otherwise, the MMC works normally.

Fig. 5. Flowchart of the proposed fault detection method.

The greater the number of faulty SM, the more obvious the fault characteristics become. Therefore, fault characteristics under one faulty SM are used to design the parameters of the fault detection method. Let x(k) be equal to . Then the difference e_err caused by the SM failure is obtained from (8):

        (13)

where, U_c is the rated value of the SM capacitor voltage.

The design principle of the parameters is as follows. If e₁ is larger than e_err, the error caused by one SM fault is compensated and the fault cannot be detected. Therefore, e₁ should be smaller than e_err. If e₁ is smaller than the scale error of the arm current under the rated load, the error caused by the scale error is not compensated, and faults are detected by mistake in the normal condition. Therefore, e₁ should be larger than the scale error of the arm current under the rated load. The smaller e₂ is, the better. If e₂ is smaller than e₁, e(k) can be from less than e₁ to larger than e₂, and the compensation does not work. Therefore, it should be larger than e₁. The larger J_th is, the greater the robustness and the longer the fault detection time. Moreover, to eliminate disturbances, p should be larger than the value of the disturbances divided by e₁. In this paper, e₂ is four times larger than e₁, and J_th is five times larger than e₂.

B. Fault Feature Strengthening

Since the structures of the upper arm and the lower arm are the same, the fault characteristics of the upper arm are analyzed as an example.

As discussed in Section II, S₁ open circuit failures are detected only when the corresponding arm current is negative and u_u becomes smaller than the ideal value, as shown in (1). i_u increases to zero even if the direction of i_u changes. The operating states of the faulty and healthy SMs are the same. Therefore, the differences between the voltage characteristics are quite small and cannot be used for determining location. Furthermore, the predicted value of i_u is calculated and does not increase when S₁ open circuit failures occur. The difference between the predicted value and the measured value of i_u is smaller than zero. If u_o increases, i_u increases and the characteristics of the SM capacitor voltage are large enough to locate faulty SMs. As shown in (2), u_o increases by increasing u_l. When S₂ open circuit failures occur, the same method is used. The fault characteristics of the SM capacitor voltage increase as u_l decreases. The difference between the predicted value and the measured value of i_l is larger than zero. The greater u_l changes, the larger the fault characteristic becomes. To rapidly locate faulty SMs and to avoid a direction change of u_o, U_dc/2 is added to or subtracted from u_l. In addition, the corresponding number of extra SMs needed to be put into working or cut off is N/2.

To maintain the balance of the capacitor voltages of the SMs, it should be put in or cut off circularly. When faults of the upper arm are detected, an extra N/2 SMs (e.g. 1, 2, …, N/2) of the lower arm work in the first circulating time, and in the second circulating time, another extra N/2 SMs (e.g. N/2, (N+1)/2, …, N) of the lower arm start working, and so on. To reduce the switching frequency, the circulating time is five times larger than the switching time. The fault feature strengthening method is shown in Fig. 6. When SMs failures occur, the difference between the predicted and measured values of i_arm is used to judge whether the fault type is a S₁ fault or a S₂ fault. If it is a S₁ fault, an extra N/2 SMs of the healthy arm are put into working circularly. Otherwise, an extra N/2 SMs of the healthy arm are cut off circularly. If a S₁ fault at the upper arm and a S₂ fault at lower arm occur simultaneously, one faulty type is located at first and then the other. Finally, if the faulty SMs are located during one location circle, they should be cut off, and corresponding fault tolerance control schemes should be applied.

Fig. 6. Flowchart of the proposed fault feature strengthening method.

C. Fault Location

The characteristics of the capacitor voltage are illustrated in Table II in Section II. When a S₁ fault occurs, the absolute voltage slopes of healthy SM capacitors are larger than those of faulty SM capacitors, which are nearly 0. To improve the robustness of the fault location method, the average value of the voltage slopes for all of the SM capacitors per arm is used. When the value of the average slopes divided by the slope of the SM capacitor voltage is infinite, it is faulty. When the value of the average slopes divided by the slope of the SM capacitor voltage is smaller than 1, it is healthy. When a S₂ fault occurs, the capacitors of the faulty SMs are charged all the time, and the capacitor voltages increase. In addition, the capacitor voltages of healthy SMs also increase. Therefore, there is no obvious difference between healthy SMs and faulty SMs in terms of slope. To enlarge the difference, all of the SMs in fault arm are turned off. As a result, the healthy SMs cannot be charged. Unlike the characteristics of a S₁ fault, the value of the average slopes divided by the slope of the healthy SM capacitor voltage is infinite. If one or more of the healthy and faulty SMs are put in or cut off simultaneously, the faulty SMs cannot be located. Therefore, the average value of the SM capacitor voltage calculated within one switching period is used for location determination.

In this paper, is defined as the voltage slope of the ith SM capacitor, is the average value, and is the division of and .

           (14)

   (15)

   (16)

where:

, .

 is the average of the SM capacitor voltages, M is the sample point, which is equal to the value of the sampling frequency divided by the switching frequency, and j is the calculated interval point.

The proposed location process is shown in Fig. 7. When faults are detected, η_u(l)oc(i) is calculated. If it is larger than the threshold value η_th, this SM is determined to be the fault one while S₁ is faulty. In addition, if S₂ is faulty, SM i is healthy. After these SMs are excluded, the left SMs are shown to be faulty. Since there is a great difference between healthy SMs and faulty SMs, η_th is selected as 5000 to improve robustness in this paper.

Fig. 7. Flowchart of the proposed fault location method.

D. Simulation Verification

Simulations have been carried out to verify the above analysis. Fig. 8 shows the circuit configuration of the simulation prototype. The circuit parameters of the simulations are listed in Table III. The values of the diagnosis parameters are as follows: =1, e₁=0.2, e₂=6, J_th=50A, p=8, j=3 and η_th=5000. In the simulations, a fault occurs at t₁, and is detected at t₂. Finally, the fault SM is located at t₃. In Fig. 9 and Fig. 10, the MMC works normally before t₁. There is no difference between the predicted value and the measured value of the arm current, and the SM capacitor voltages are well balanced. In Fig. 9, a S₁ fault of SM1 at the upper arm occurs at t₁, where i_u is supposed to be decreasing and becomes smaller than 0. However, it is equal to 0 from t₁ to t₂. The fault feature strengthening method begins working at t₂, and i_u starts to decrease. Subsequently, the capacitor voltage of SM1 is kept constant, and the capacitor voltages of the other SMs start to decrease. η_uoc(1) is larger than 5000, and the others are equal to 0 at t₃. Therefore, SM1 is faulty, and the other SMs are healthy. In Fig. 10, a S₂ fault of SM1 at the upper arm occurs at t₁, where i_u is supposed to be increasing.

TABLE III CIRCUIT PARAMETERS OF THE SIMULATIONS

DC supply voltage (Udc)	1200V
Average circulating current	20A
number of SM per arm (N)	8
arm inductance (L)	10mH
SM capacitance	2.2mF
switching frequency	1kHz
sample frequency	50kHz

Fig. 8. Circuit configuration of the simulations and the experimental prototype.

Fig. 9. Simulation waveforms of a S₁ open-circuit fault of SM1 at the upper arm.

Fig. 10. Simulation waveforms of a S₂ open-circuit fault of SM1 at the upper arm.

However, it decreases and then increases a little from t₁ to t₂. Then the capacitor voltages of all the SMs at upper arm continue to increase and there is no difference between the faulty and the healthy SMs in terms of slope. The fault feature strengthening method begins working at t₂, where i_u starts to increase quickly, and all of the SMs in upper arm are turned off. Finally, η_uoc(1) is equal to 0, and the others are larger than 5000. Therefore, SM1 is faulty, and the other SMs are healthy.

E. Discussion of the Computational Burden

The robustness and rapidity of the proposed fault diagnosis method are improved. However, the computational burden is increased. A comparison is made between the computational burdens of the method proposed in this paper and those reported in recent works, as shown in Table IV. Since [13] can only locate a single fault, the calculated capacitance method in [14] cannot diagnose faults under a small arm current, and [15] needs additional sensors, the computational burdens of those paper are not analyzed. In Table IV, N is the number of SMs per arm, M_e is the number of faulty SMs in [12], and M_ca is the number of samples within one fundamental period which is 10 in [14]. The computational burdens of the methods in these papers are greater than that of the proposed method except [10]. However, the diagnosis time in [10] is much longer than that in the proposed method. In addition, the robustness is lower than that in the proposed method because the negative aspect of the measurement error and parameter uncertainties are not taken into consideration in [10].

TABLE IV COMPARISON OF COMPUTATIONAL BURDEN

	Multiplication	Addition
KF[10]	2N+2	2N+2
SMO[12]
CA[14]
A-RLS[16]	14N+18	14N+10
proposed method	3p+p(p+1)/2+3N	4p+p(p+1)/2+2N(M+2)

Ⅳ. EXPERIMENTAL INVESTIGATION

In this section, experimental results are shown to verify the effectiveness of the proposed diagnosis method. The circuit and diagnosis parameters of the experimental prototype are listed in Table V and Table VI. The circuit configuration of the experimental prototype is shown in Fig. 8. A downscaled single phase MMC prototype with four SMs per arm is built, and some photographs of it are shown in Fig. 11. The arm currents, AC-link current, AC-link voltage, DC-link voltage and DC-link current are measured with a TI DSP TMS320F28335 where the proposed diagnosis method and control method are implemented. In the meantime, a Xilinx FPGA X3CS400PQG208 is adopted to perform pulse width modulation and it transmits the PWM signals to the SMs and DSP. Moreover, each of the SMs is controlled by an ALTERA CPLD EPM240, which controls the IGBT IKW75N60T, and sends the SM capacitor voltages back to the FPGA. The predicted values of the arm currents are displayed by converting them into analog signals with a digital-analog converter DAC7541. Due to the limited number of SMs, the carrier phase-shifted pulse-width modulation (CPSPWM) and the associated capacitor voltage balancing control method proposed in [8] are adopted. In the conducted experiments, 2% measurement errors and 5% disturbances in the signal measurements are added. In addition, 10% parameter uncertainties are added in the arm inductors, and R_s is 0.1 W.

TABLE V CIRCUIT PARAMETERS OF THE EXPERIMENTS

rated active power	750W
light active power	150W
DC supply voltage (Udc)	300V
number of SM per arm (N)	4
arm inductance (L)	10mH
SM capacitance	3.3mF
switching frequency	5kHz
sample frequency	20kHz

TABLE VI DIAGNOSIS PARAMETERS OF THE EXPERIMENTS

p	8
	1
e1	0.15
e2	0.6
Jth	3
ηth	5000
j	3

Fig. 11. Photographs of single-phase MMC: (a) Power circuit (1), (b) Power circuit (2), (c) Structure of a SM.

A. S₁ Fault of the Upper Arm Under Rated Load

Fig. 12 shows experimental waveforms of a S₁ open-circuit fault of SM1 at the upper arm under rated load. The predicted values of the arm currents can match the measured ones under normal condition. However, cannot match i_u while the fault occurs. In addition, is smaller than i_u. Therefore, the faulty device is S₁. The fault is detected 2.2ms after it occurs. Afterwards, the capacitor voltage of SM1 is maintained, and the voltages of SM2 and SM3 at the upper arm decrease during the fault feature strengthening process. Finally, the fault is located after 3ms by using η_loc(i).

Fig. 12. Experimental waveforms of a S₁ open-circuit fault of SM1 at the upper arm under rated load.

B. S₁ Fault of the Upper Arm Under Light Load

Experimental waveforms of a S₁ open-circuit fault of SM1 at the upper arm under light load are shown in Fig. 13. The fault characteristics of the arm currents and capacitor voltages of the SMs under rated load and light load are the same. However, the fault detection time is as long as 2.5ms because the arm current is smaller. The fault location time is 3.5ms.

Fig. 13. Experimental waveforms of a S₁ open-circuit fault of SM1 at the upper arm under light load.

C. S₂ Fault of the Upper Arm Under Rated Load

Fig. 14 shows experimental waveforms of a S₂ open-circuit fault of SM2 at the upper arm under rated load. When no fault occurs, can match . However, cannot match under the faulty condition. In addition, the difference between and i_u is larger than 0. Therefore, the faulty device is S₂. The fault detection time is 2.1ms. By using the fault feature strengthening method, the capacitor voltage of SM2 increases and the voltages of SM1 and SM3 at the upper arm change little. Finally, the fault location time is 2.6ms.

Fig. 14. Experimental waveforms of a S₂ open-circuit fault of SM2 at the upper arm under rated load.

D. S₂ Fault of the Upper Arm Under Light Load

Fig. 15 shows experimental waveforms of a S₂ open-circuit fault of SM2 at the upper arm under light load. The fault characteristic of the S₂ fault under light load is the same as that under rated load. The fault detection time is 2.6ms, and the fault location time is 2.9ms.

Fig. 15. Experimental waveforms of a S₂ open-circuit fault of SM2 at the upper arm under light load.

E. S₁ Fault of the Upper Arm and S₂ Fault of the Lower Arm Under Rated Load

Experimental waveforms of a S₁ open-circuit fault of SM1 at the upper arm and a S₂ open-circuit fault of SM3 at the lower arm under rated load are shown in Fig. 16. and can match i_u and i_l under the normal condition. However, they cannot match while a fault occurs. is smaller than , and is larger than i_l. Therefore, the faulty device of the upper arm is S₁, and the faulty device of the lower arm is S₂. The fault detection times of the upper arm and the lower arm are 2.3ms and 2.1ms, respectively. Afterwards, the S₁ fault of SM1 at the upper arm is located by using the fault feature strengthening method and the fault location method, and the fault location time of the S₁ fault is 2.3ms. Finally, when the SM1 fault at the upper arm is located, the S₂ fault of SM3 at the lower arm is located 3ms later.

Fig. 16. Experimental waveforms of a S₁ open-circuit fault of SM1 at the upper arm and a S₂ open-circuit fault of SM3 at the lower arm under rated load.

Ⅴ. CONCLUSIONS

This paper proposed a rapid and robust fault diagnosis method for SM open circuit failures based on an improved predictive model of the arm current. The SM failures are detected by comparing the difference between the predicted value and measured value of the arm current. Then the disturbances are eliminated by using a multi-step prediction method. The fault characteristics are enlarged and the fault types are detected by adopting the fault feature strengthening method. Moreover, the faulty SMs are located by the proposed location method by using the fault characteristics which are the average slopes of the SM capacitor voltages divided by themselves. Experimental results show that the fault diagnosis time of one arm fault is shorter than that of two arm faults. These results also confirm that the proposed fault diagnosis method can detect and locate multiple SMs failures within 10ms under different load conditions by using only one threshold value. This method is easy to implement in a microprocessor without additional sensors.

ACKNOWLEDGMENT

This work was supported by the National Natural Science Foundation of China under Award 51477077.

REFERENCES

[1] N. Flourentzou, V. G. Agelidis, and G. Demetriades, “VSC based HVDC power transmission systems: An overview,” IEEE Trans. Power Electron., Vol. 24, No. 3, pp. 592-602, Feb. 2009.

[2] R. Marquardt, “Modular multilevel converter: An universal concept for HVDC-networks and extended dc-bus- applications,” in Proc. ECCE ASIA, pp. 502-507, Jun. 2010.

[3] Y.-J. Jo, T. H. Nguyen, and D.-C. Lee, “Capacitance estimation of the submodule capacitors in modular multilevel converters for HVDC applications,” J. Power Electron., Vol. 16, No. 5, pp. 1752-1762, Sep. 2016.

[4] H. M. Pirouz and M. T. Bina, “Modular multilevel converter based STATCOM topology suitable for medium-voltage unbalanced systems,” J. Power Electron., Vol. 10, No. 5, pp. 572-578, Sep. 2010.

[5] M. Hagiwara, I. Hasegawa, and H. Akagi, “Start-up and low-speed operation of an electric motor driven by a modular multilevel cascade inverter,” IEEE Trans. Ind. Appl., Vol. 49, No. 4, pp. 1556-1565, Apr. 2013.

[6] M. A. Perez, S. Bernet, J. Rodriguez, S. Kouro, and R. Lizana, “Circuit topologies, modeling, control schemes, and applications of modular multilevel converters,” IEEE Trans. Power Electron., Vol. 30, No. 1, pp. 4-17, Mar. 2014.

[7] S. Debnath, J. Qin, B. Bahrani, M. Saeedifard, and P. Barbosa, “Operation, control, and applications of the modular multilevel converter: A review,” IEEE Trans. Power Electron., Vol. 30, No. 1, pp. 37-53, Jan. 2015.

[8] M. Hagiwara and H. Akagi, “Control and experiment of pulse width-modulated modular multilevel converters,” IEEE Trans. Power Electron., Vol. 24, No. 7, pp. 1737-1746, Jul. 2009.

[9] F. Richardeau and T. Pham, “Reliability calculation of multilevel converters: Theory and applications,” IEEE Trans. Ind. Electron., Vol. 60, No. 10, pp. 4225-4233, Oct. 2013.

[10] F. Deng, Z. Chen, M. R. Khan, and R. Zhu, “Fault detection and localization method for modular multilevel converters,” IEEE Trans. Power Electron., Vol. 30, No. 5, pp. 2721-2732, May 2015.

[11] S. Shao, P. W. Wheeler, J. C. Clare, and A. J. Watson, “Fault detection for modular multilevel converters based on sliding mode observer,” IEEE Trans. Power Electron., Vol. 28, No. 11, pp. 4867-4872, Nov. 2013.

[12] S. Shao, A. J. Watson, J. C. Clare, and P. W. Wheeler, “Robustness analysis and experimental validation of a fault detection and isolation method for the modular multilevel converter,” IEEE Trans. Power Electron., Vol. 31, No. 5, pp. 3794-3805, May 2016.

[13] B. Li, S. Shi, B. Wang, G. Wang, W. Wang, and D. Xu, “Fault diagnosis and tolerant control of single IGBT open-circuit failure in modular multilevel converters,” IEEE Trans. Power Electron., Vol. 31, No. 4, pp. 3165-3176, Apr. 2016.

[14] Q. Yang, J. Qin, and M. Saeedifard, “Analysis, detection, and location of open-switch submodule failures in a modular multilevel converter,” IEEE Trans. Power Del., Vol. 31, No. 1, pp. 155-164, Feb. 2016.

[15] R. Picas, J. Zaragoza, J. Pou, and S. Ceballos, “Reliable modular multilevel converter fault detection with redundant voltage sensor,” IEEE Trans. Power Electron., Vol. 31, No. 1, pp. 39-51, Jan. 2017.

[16] M. Abdelsalam, M. I. Marei, and S. Tennakoon, “An integrated control strategy with fault detection and tolerant control capability based on capacitor voltage estimation for modular multilevel converters,” IEEE Trans. Ind. Appl., Vol. 53, No. 3, pp.2840-2851, May/Jun. 2017.

[17] K. Xu, S. Xie, Y. Yan, Z. Zhang, B. Zhang, and Q. Qian, “A fast fault diagnosis method for submodule failures in modular multilevel converters,” in Proc. ECCE, pp. 1125- 1130, Oct. 2017.

Kunshan Xu was born in Jiangsu, China. He received his B.S. and M.S. degrees in Automation from the Shandong University of Science and Technology, Qindao, China, in 2007 and 2010, respectively. He is presently working towards his Ph.D. degree in Electrical Engineering from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China. He is a Member of the IEEE. His current research interests include modular multilevel converters.

Shaojun Xie was born in Hubei, China, in 1968. He received his B.S., M.S. and Ph.D. degrees in Electrical Engineering from from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 1989, 1992 and 1995, respectively. In 1992, he joined the Faculty of Electrical Engineering Teaching and Research Division, NUAA, where he is presently working as a Professor in the College of Automation Engineering. In past five years, he has authored and coauthored over 100 technical papers published in journals and international conference proceedings. His current research interests include aviation electrical power supply and power electronic conversion.