사각형입니다.

https://doi.org/10.6113/JPE.2018.18.6.1751

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Accurate Power Sharing in Proportion for Parallel Connected Inverters by Reconstructing Inverter Output Impedance


Shengli Huang and Jianguo Luo*


†,*School of Mechanical and Electrical Engineering, North China Institute of Science and Technology, Beijing, China



Abstract

This paper presents parallel-connected inverters to achieve accurate proportional power sharing. Due to line impedance mismatch, reactive power cannot be distributed proportionally when using the conventional P-ω and Q-E droop. In order to realize reactive proportional power sharing, the ratio of the droop coefficients should be inversely proportional to their power-sharing ratios. Meanwhile, the ratio of the line impedance should be inversely proportional to the desired power-sharing ratio, which is very difficult to be met in practice. In order to deal with this issue, a practical control strategy is presented. By measuring the PCC voltage and using the virtual impedance, the output impedance of individual inverters is reconstructed to counteract the line impedance effect. In order to guarantee system stability, a low pass filter is designed to suppress the bandwidth of the line compensation. Finally, the simulation and experimental results are given to verify the effectiveness of the proposed control strategy.


Key words: Droop control, Parallel-connected inverter, Proportional power sharing, Virtual impedance


Manuscript received Mar. 20, 2018; accepted May 31, 2018

Recommended for publication by Associate Editor Jongbok Baek.

Corresponding Author: huangshengli_1979@163.com Tel: +86-10-6159-2761, Fax: +86-10-6159-1483, North China Inst. Sci. Technol.

*Sch. Mechanical & Electr. Eng., North China Inst. Sci. Technol., China



Ⅰ. Introduction

Distributed generation (DG) has become a competitive option when compared to conventional centralized power systems due to its flexibility, low emission, low cost, and high reliability. Distributed generation supported by a battery storage system can stablize a microgrid system [1]-[4]. A key problem for parallel inverters is shareing power among them. The centralized control strategies can achieve equal [5] or weighing power sharing [6]. In order to achieve plug-and- play for redundancy considerations, decentralized control is preferred. The most competitive control strategy among them is droop control. The main advantage of droop control is that it avoids communications among all of its constituent units. However, it also has limitations such as P-Q coupling and accurate power sharing.

Power sharing relying on droop control has been investigated in a number of studies [7]-[12]. The stability of droop control depends a lot on line impedance characteristics. In order to solve the P-Q coupling problem, a virtual impedance is employed. Mismatch of the line impedance has an impact on power sharing. When the virtual impedance is much larger than the line impedance, the mismatch of the line impedance can be negligible and the output power is equally shared. Traditionally, inverter output impedance is designed to be inductive. However, if output impedance is resistive, the harmonic currents can be shared [10]. Therefore, a virtual impedance behaving inductively at the fundamental frequency but resistively in harmonics has been proposed [10].

When inverters work in the grid-connected mode, the active and reactive power can be controlled by a PI controller to track desired power set points. However, in the islanded mode, the output power should meet the load demands. Low-bandwidth communication has been applied in droop control [13]-[17]. A mode adaptive control working in both the grid-connected mode and the islanded mode is proposed in [15], where the power set points can be changed with the aid of a low-bandwidth communication link to meet the power requirements. Hierarchical control also relies on low-bandwidth communication links to achieve power management [16]. To improve reactive power sharing, the reactive power control error can be estimated by injecting small active power disturbances [17]. However, the control strategy has to be activated by a low-bandwidth communication link from its central controller. Although low-bandwidth communication is widely used for microgrids and distributed generations, it complicates the system design and lead to poor reliability when communication fails.

When using P-ω and Q-E droop control, reactive power sharing is the key issue for islanded microgrids. Due to line impedance mismatch, it is difficult to achieve accurate reactive power sharing. An online estimation method can realize accurate reactive power sharing [18]. However, the inverter should estimate the droop coefficients in the grid-connected mode first. Therefore, the approach is complicated and not practical for islanded operation. To overcome the load effects, an improved droop control was proposed in [19], [20]. In [20], the condition for proportional power sharing is illustrated and a control strategy is proposed. However, a detailed demonstration is not given. In addition, closed loop control implementation for the proposed strategy is not given and the line impedance mismatch is not considered. Power sharing is seriously affected by individual line impedances. Furthermore, the line impedance has some effects on the dynamic response [21], [22]. By designing inverter output impedance properly, the steady state and dynamic responses can be improved [23], [24]. Although many recent works [25]-[27] for parallel connected inverters can achieve accurate load power sharing, most of them did not take the line impedance into account, especially for proportional power sharing.

In this paper, accurate power sharing is investigated considering line impedance mismatch. Most droop control methods concentrate on equal power sharing. The contribution of this paper is to design virtual impedances to achieve accurate proportional power sharing by considering the factors caused by line impedance. The voltage drop across the line impedance is counteracted by inverter virtual impedance. Therefore, the power quality at the PCC is improved. This paper is organized as follows. Proportional power sharing based on droop control is analyzed and the conditions for accurate power sharing are illustrated in Section II. Section III presents the proposed control strategy and analyses the stability of the system. Simulation and the experimental results are provided in Sections IV and V. Finally, some conclusions are given in Section VI.



Ⅱ. PROPORTIONAL POWER SHARING ANALYSIS BASED ON DROOP CONTROL

With droop control, power sharing can be obtained without communications. Due to its flexibility, it is widely used in distributed generation. P-ω and Q-E is employed when the line impedance is inductive, while P-E and Q-ω is employed when the line impedance is resistive. In this paper, P-ω and Q-E is taken as an example to analyze the control scheme. The proposed control strategy in this paper is easily extended to P-E and Q-ω droop. A two parallel-connected inverters system is shown in Fig. 1.


그림입니다.
원본 그림의 이름: CLP0000232c2350.bmp
원본 그림의 크기: 가로 1524pixel, 세로 398pixel

Fig. 1. Diagram of parallel-connected inverters.


The control strategy of the P-ω and Q-E droop for inverter #i(i=1,2) is shown as follows:

그림입니다.
원본 그림의 이름: CLP0000232c0003.bmp
원본 그림의 크기: 가로 402pixel, 세로 226pixel     (1)


A. Active Power Sharing

As can be seen in Fig. 1, when the system operates in the steady states, the angular speeds at different spots are the same, i.e. ω12. The characteristics of the P-ω control are shown in Fig. 2(a). Therefore, in steady state, it is possible to obtain:

그림입니다.
원본 그림의 이름: CLP0000232c0004.bmp
원본 그림의 크기: 가로 323pixel, 세로 97pixel        (2)


Fig. 2. Characteristic of P-ω and Q-E droop control: (a) P-ω droop control; (b) Q-E droop control.

그림입니다.
원본 그림의 이름: CLP0000232c0001.bmp
원본 그림의 크기: 가로 843pixel, 세로 600pixel

(a)

그림입니다.
원본 그림의 이름: CLP0000232c0002.bmp
원본 그림의 크기: 가로 1037pixel, 세로 597pixel

(b)


The active power ratio can be expressed as 그림입니다.
원본 그림의 이름: CLP0000232c0032.bmp
원본 그림의 크기: 가로 276pixel, 세로 153pixel. The active power ratio of the inverters is inversely proportional to the droop coefficients. When m1=m2, the load active power is equally shared. As can be seen in Fig. 1, assuming that the line impedance is purely inductive, where Zline_i=j⋅Xi=j⋅ωLi, the active and reactive powers of the inverter injected into the PCC [28] are expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c0005.bmp
원본 그림의 크기: 가로 853pixel, 세로 380pixel       (3)

Substituting (3) into (2) yields:

그림입니다.
원본 그림의 이름: CLP0000232c0006.bmp
원본 그림의 크기: 가로 366pixel, 세로 180pixel      (4)


B. Reactive Power Sharing

Under steady states, the voltage amplitudes at different spots are different due to a voltage drop across line impedance. The characteristics of the Q-E droop are shown in Fig. 2(b). The dashed line shows the traditional droop. The solid line illustrates the droop characteristic taking into account the line impedances, where Vline_i is the voltage drop of the line for inverter #i. Under steady states, the relationship between the reactive power and the line impedance voltage drop is given by 그림입니다.
원본 그림의 이름: CLP0000232c0007.bmp
원본 그림의 크기: 가로 575pixel, 세로 87pixel. Due to the line impedance mismatch, even if the droop coefficients ni are the same, the load reactive power cannot be shared equally.

As can be seen in Fig. 1, the PCC voltage is obtained as:

그림입니다.
원본 그림의 이름: CLP0000232c0008.bmp
원본 그림의 크기: 가로 770pixel, 세로 149pixel       (5)

The active and reactive powers are shared at the ratio of N as follows:

그림입니다.
원본 그림의 이름: CLP0000232c0009.bmp
원본 그림의 크기: 가로 578pixel, 세로 170pixel

then E1=E2 and io_1=Nio_2. Because δ1 and δ2 are very small, sinδ1=δ1, sinδ2=δ2, cosδ1=1, and cosδ2=1. According to (5), it is possible to obtain:

그림입니다.
원본 그림의 이름: CLP0000232c000a.bmp
원본 그림의 크기: 가로 1504pixel, 세로 563pixel     (6)

Substituting (4) into (6) leads to:

그림입니다.
원본 그림의 이름: CLP0000232c000b.bmp
원본 그림의 크기: 가로 1291pixel, 세로 393pixel

그림입니다.
원본 그림의 이름: CLP00000ea83f3d.bmp
원본 그림의 크기: 가로 1904pixel, 세로 524pixel           (7)

Therefore, 그림입니다.
원본 그림의 이름: CLP0000232c000c.bmp
원본 그림의 크기: 가로 305pixel, 세로 143pixel. According to (4) and E1=E2, when the active and reactive powers are shared at the ratio of N, it is possible to obtain: δ1=δ2 and X2=NX1.

Conversely, suppose the following relationship is satisfied:

그림입니다.
원본 그림의 이름: CLP0000232c000f.bmp
원본 그림의 크기: 가로 530pixel, 세로 147pixel,

substituting this relationship into (4) leads to그림입니다.
원본 그림의 이름: CLP0000232c0010.bmp
원본 그림의 크기: 가로 243pixel, 세로 79pixeland L2=NL1. The following is obtained as:

Therefore, the following is obtained as:

그림입니다.
원본 그림의 이름: CLP0000232c0011.bmp
원본 그림의 크기: 가로 771pixel, 세로 211pixel          (8)

According to (8), if the active power is shared at the ratio of N, the reactive power can be shared at the same ratio of N as long as the droop coefficients and the line reactance are inversely proportional to the desired power ratio. If the droop coefficients and the line reactance for all of the inverters are identical, the load power can be shared equally.



Ⅲ. PROPOSED CONTROL STRATEGY


A. General Control Strategy

In order to achieve accurate power sharing, the line reactance values must be designed to be inversely proportional to the desired power sharing ratio. In practice, this is very difficult to implement.

In order to decouple the P-Q coupling, virtual impedance has been used in [19]. The output impedance of the inverters can be programmed to reach desired values. The general expression of the virtual impedance is written as:

그림입니다.
원본 그림의 이름: CLP0000232c0012.bmp
원본 그림의 크기: 가로 1075pixel, 세로 198pixel   (9)

where vrefi is the voltage reference of the inverter #i, Rv is the virtual resistance, and Lv is the virtual inductance. If Rv is equal to zero, the output impedance is mainly inductive. Meanwhile, if Lv is equal to zero, the output impedance is mainly resistive. In order to satisfy the P-ω and Q-E droop control, the output impedance is designed to be inductive. Assuming that the inverter voltage control loop bandwidth is high enough to achieve high-precision voltage tracking, the output voltage of the inverter #i is expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c0013.bmp
원본 그림의 크기: 가로 1074pixel, 세로 359pixel   (10)

According to (10), the output voltage expression can be transferred into the Laplace domain as follows:

그림입니다.
원본 그림의 이름: CLP0000232c0014.bmp
원본 그림의 크기: 가로 934pixel, 세로 370pixel    (11)

where Gv_i(s) is the virtual impedance. Thus, the PCC voltage in the Laplace domain is expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c0015.bmp
원본 그림의 크기: 가로 1095pixel, 세로 274pixel       (12)

As long as Gv_i(s)+Zline_i(s) is inductive and inversely proportional to the desired power ratio, accurate power sharing can be obtained. Therefore, the output impedance of the inverter #i Gv_i(s) can be designed as sLv_i-Zline_i(s), and the PCC voltage is expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c0016.bmp
원본 그림의 크기: 가로 1055pixel, 세로 187pixel

If the inverter output impedance offsets the line impedance, the load reactive power can be proportionally shared. In this case, the voltage reference for the inverter is expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c0017.bmp
원본 그림의 크기: 가로 1239pixel, 세로 183pixel      (13)

Nevertheless, the line characteristic is unknown and the line impedance value is hard to obtain in practice. As can be seen in Fig. 1, the voltage drop across the line impedance is equal to vi-vpcc. Therefore, voltage reference shown in (12) can be written as:

그림입니다.
원본 그림의 이름: CLP0000232c0018.bmp
원본 그림의 크기: 가로 1346pixel, 세로 177pixel   (14)

where ωo is the cut-off frequency of a low pass filter. The low pass filter can filter out high frequency noises and maintain system stability. From (14), in order to achieve accurate reactive load sharing, each of the inverters should measure the PCC voltage. The line impedance of the inverter can be compensated by itself. In order to achieve equal power sharing, especially equal reactive power sharing, the droop coefficients for all of the inverters must be designed to be the same and the output impedance can be reconstructed by the virtual impedance including line impedance compensation. Generally, in order to achieve proportional power sharing, the virtual inductive reactance and the droop coefficients of the inverters should be designed to be inversely proportional to the power sharing ratio. Taking two inverters as an example, if the system meets 그림입니다.
원본 그림의 이름: CLP0000232c001a.bmp
원본 그림의 크기: 가로 437pixel, 세로 161pixel, the power can be shared as 그림입니다.
원본 그림의 이름: CLP0000232c001b.bmp
원본 그림의 크기: 가로 278pixel, 세로 143pixel.


B. Implementation for Three-Phase Inverters

Fig. 3 shows a control diagram of the proposed control strategy for the three-phase inverter #i, which is implemented in the synchronous rotating d-q frame. The controllers of the voltage control loop and the inner current control loop are the PI controller. vd_i and vq_i are the output voltage transformed in the d-q frame; id_i and iq_i are the output current in the d-q frame; and vpccd and vpccq are the PCC voltage in the d-q frame. The voltage drop across the virtual inductor can be expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c001c.bmp
원본 그림의 크기: 가로 1324pixel, 세로 117pixel   (15)


그림입니다.
원본 그림의 이름: CLP0000232c0019.bmp
원본 그림의 크기: 가로 1628pixel, 세로 878pixel

Fig. 3. Control diagram for the three-phase inverter.


where Xv_i is the impedance of the virtual inductive reactance. Therefore, the voltage reference of the inverter in the d-q frame is written as:

그림입니다.
원본 그림의 이름: CLP0000232c001d.bmp
원본 그림의 크기: 가로 1222pixel, 세로 571pixel       (16)

The virtual impedance in the d-q frame is more robust than that in the stationary frame, because the virtual reactance does not vary with the frequencies. In order to achieve accurate power sharing, Xv_i for the inverters should be inversely proportional the power sharing ratio.


C. Stability of the Control Strategy

Small-signal analysis has been widely used for analyzing droop control. The designs of the droop coefficients and the virtual impedance have been discussed in [4], [17], [20]. This subsection concentrates on a stability analysis of the line impedance compensation. The voltage drops across line impedance in the d-q axes are expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c001e.bmp
원본 그림의 크기: 가로 1006pixel, 세로 235pixel      (17)

where Li and ri are the inductance and resistance of the line impedance. Therefore, the output current can be obtained as:

그림입니다.
원본 그림의 이름: CLP0000232c001f.bmp
원본 그림의 크기: 가로 721pixel, 세로 235pixel         (18)

where:

그림입니다.
원본 그림의 이름: CLP00000ea80001.bmp
원본 그림의 크기: 가로 1015pixel, 세로 155pixel

The output currents variations according to output voltage disturbances are given by:

그림입니다.
원본 그림의 이름: CLP0000232c0020.bmp
원본 그림의 크기: 가로 622pixel, 세로 205pixel   (19)

The output active and reactive powers are expressed as:

그림입니다.
원본 그림의 이름: CLP0000232c0021.bmp
원본 그림의 크기: 가로 755pixel, 세로 357pixel       (20)

where ωc is the cutoff frequency for the power calculation. Substituting (17) into (19), the power variations according to the output voltage are given by:

그림입니다.
원본 그림의 이름: CLP0000232c0022.bmp
원본 그림의 크기: 가로 497pixel, 세로 409pixel        (21)

where:

그림입니다.
원본 그림의 이름: CLP0000232c0023.bmp
원본 그림의 크기: 가로 1153pixel, 세로 349pixel          (22)

According to (16), the dynamic performance of the inverter can be obtained as:

그림입니다.
원본 그림의 이름: CLP0000232c0024.bmp
원본 그림의 크기: 가로 362pixel, 세로 217pixel    (23)

where:

그림입니다.
원본 그림의 이름: CLP0000232c0025.bmp
원본 그림의 크기: 가로 1361pixel, 세로 212pixel

The performance of the inverter can be evaluated by the root locus of the characteristic equation of matrix Ai. The root locus with different cutoff frequencies ωo is shown in Fig. 4. When ωo is very small, the system is determined by the dominant poles λ3 and λ4. When ωo is equal to zero, the control strategy is the conventional droop method. When ωo increases, λ3 and λ4 move to the left side of the plane, and λ1 and λ2 move toward the right side of the plane. Meanwhile, λ1 and λ2 become the dominant poles with an increase of ωo. When ωo is too large, the system becomes unstable.


그림입니다.
원본 그림의 이름: CLP0000232c0026.bmp
원본 그림의 크기: 가로 1028pixel, 세로 769pixel

Fig. 4. Root locus of the inverter with 0<ωo<1000.


As shown in (15), when ωo is too large, the line impedance compensation can be viewed as having no low pass filter. In this case, the voltage control loop errors are written as:

그림입니다.
원본 그림의 이름: CLP0000232c0027.bmp
원본 그림의 크기: 가로 1439pixel, 세로 420pixel   (24)

As can be seen in (23), the PCC voltage works as the feedback of the voltage control loop. Each inverter generates its voltage amplitude reference. However, the PCC voltage is the voltage feedback for all of the inverters. The coupling among all of the inverters makes the system unstable. A low pass filter is necessary for the line impedance compensation. On the one hand, ωo should be selected small enough for stability considerations. On the other hand, ωo should be large enough to not generate a phase delay or amplitude attenuation in the fundamental frequency performance, which corresponds to DC components in the d-q frame. Therefore, ωo is chosen as 300rad/s (47.7Hz) in this paper. Due to the low pass filter, high frequency voltage variations can be filtered out. It should be pointed out that for nonlinear loads, the instantaneous voltage drop across the line impedance cannot be calculated with the control strategy. Therefore, the proposed control strategy is not suitable for accurate power sharing in facing nonlinear loads.



Ⅳ. SIMULATION VERIFICATION

The simulations are done with Matlab/Simulink to verify the proposed control strategy. The system is composed of two three-phase inverters. The specifications of the system are shown in Table I. In order to verify the proposed control strategy under extreme conditions, the line impedances of the inverters are purposely set to be dramatically different.


TABLE I SYSTEM SPECIFICATIONS

Items

Value

Items

value

Nominal line-to-line voltage

380V/50Hz

Rated power of the load

2kW-500kvar

Line impedance of the inverter #1

5Ω +2mH

Line impedance of the inverter #2

0.1Ω+1.2mH

Filter capacitor

60μF

Filter inductor of the inverter

2mH

ωo

300rad/s

ωc

62.8rad/s

Switching frequency:fsw

10kHz

 

 


Fig. 5 and Fig. 6 show simulation results of equal power sharing when the proposed control strategy is activated at 0.4s. Fig. 5 shows the output power response, where m1=m2=0.0004, n1=n2=0.008 and Xv_1=Xv_2=2Ω. Before 0.4s, the conventional droop control with virtual impedance is implemented. Although active power can be shared equally between the two inverters, reactive power sharing is not obtained due to line impedance mismatch. After 0.4s, reactive power can be shared by the two inverters with the proposed control strategy. The inverter output impedance counteracts the line impedance. Therefore, the magnitude of the PCC voltage is raised after 0.4s. As a result, the active powers of the two inverters increase. Fig. 6 shows the currents of the two inverters. As can be seen from the extended figure, before 0.4s, although the droop coefficients for the two inverters are the same, the instantaneous values of their respective phase currents are different due to line impedance mismatch. In addition, circulating currents circulate between the two inverters in this case. However, after 0.4s, the two inverters share the load current equally under the steady state. As can be seen from the extended figure, the phase currents of the two inverters have the same instantaneous values.


그림입니다.
원본 그림의 이름: CLP0000232c0028.bmp
원본 그림의 크기: 가로 1527pixel, 세로 742pixel

Fig. 5. Simulation results of power sharing when the proposed control is activated at 0.4s.


그림입니다.
원본 그림의 이름: CLP0000232c0029.bmp
원본 그림의 크기: 가로 1873pixel, 세로 782pixel

Fig. 6. Simulation results of the currents equal sharing.


Fig. 7 and Fig. 8 show simulation results of proportional load power sharing when the proposed control strategy is activated at 0.4s. Fig. 7 shows the power response of the two inverters, where m1=0.0008, m2=0.0004, n1=0.016, n2=0.008, Xv_1=4 and Xv_2=2. For the two inverters, the ratio of the droop coefficients is 2. Therefore, the ratio of the output power is desired to be 1:2. As can be seen from the extended figure, before 0.4s, P1=675W, P2=1350W, Q1=-296Var and Q2=-155Var. The ratio of the active power is 1:2. However, the ratio of the reactive power is 1:0.52 due to the line impedance mismatch. After 0.4s, the proposed control strategy is activated. From the extended figures, it can be seen that P1=685W, P2=1370W, Q1=-152Var and Q2=-306Var. The ratio of the active power is still 1:2, and the ratio of the reactive power is 1:2.01, which is nearly equal to 1:2. Fig. 8 shows the output currents of the two inverters. Before 0.4s, there is a phase error between the currents of the inverters, which can be seen from the zero crossing points of the currents. Therefore, circulating currents exist between the inverters. After 0.4s, there is no phase error with the control strategy. The circulating currents between the two inverters have been suppressed and eliminated. Section II B has demonstrated that there is no phase error for the individual output currents once the load active and reactive powers are shared proportionally with the same ratio. The simulation results agree well with the previous analysis.


그림입니다.
원본 그림의 이름: CLP0000232c002a.bmp
원본 그림의 크기: 가로 1153pixel, 세로 889pixel

Fig. 7. Simulation results of proportional power sharing when the proposed control is activated at 0.4s.


그림입니다.
원본 그림의 이름: CLP0000232c002b.bmp
원본 그림의 크기: 가로 1884pixel, 세로 699pixel

Fig. 8. Simulation results of the currents proportional sharing.



Ⅴ. EXPERIMENTAL VERIFICATION

A laboratory prototype composed of two three-phase inverters was built to verify the effectiveness of the proposed control strategy. A photo of the experimental setup is shown in Fig. 9. The line impedance for inverter #1 is 5+j0.628 (5Ω+2mH), and the line impedance for inverter #2 is 0.1+j0.377 (0.1Ω+1.2mH). The rated load power is 2kW- 500var. The controllers of the two inverters are both implemented by a TMS320F2812 DSP.


그림입니다.
원본 그림의 이름: CLP0000232c002c.bmp
원본 그림의 크기: 가로 801pixel, 세로 883pixel

Fig. 9. Experimental setup.


Fig. 10 shows the line-to-line PCC voltage vab and phase-a currents of the two inverters, where m1=m2=0.0004, n1=n2=0.008 and Xv_1=Xv_2=2Ω. Before t1, the inverters are controlled by the conventional droop control with the same virtual impedance. As can be seen from the extended figure, there is phase error between the currents due to line impedance differences, which illustrates that the reactive power is not equally shared. After t1, the proposed control strategy is activated. The two currents coincide perfectly. Therefore, the load power, including the active and reactive power, is equally shared by the inverters.


그림입니다.
원본 그림의 이름: CLP0000232c002d.bmp
원본 그림의 크기: 가로 958pixel, 세로 884pixel

Fig. 10. Current response for equal sharing when the proposed control strategy is activated.


Fig. 11 shows experimental results of the proportional power sharing between the two inverters, where m1=0.0008, m2=0.0004, n1=0.016 and n2=0.008. Therefore, the load power is desired to be shared by inverters with a ratio of 0.5. Fig. 11(a) shows experimental results when the control strategy is implemented without line impedance compensation but with the same virtual impedance. Fig. 11(b) shows experimental results when the control strategy is implemented without line impedance compensation but with proportional virtual impedance. Fig. 11(c) shows experimental results when the control strategy is implemented with line impedance compensation and the same virtual impedance. Because the total inverter output impedance, including the line impedance, is not proportional to the droop coefficients, there is a phase error between the two currents, which indicates that the load reactive power is not shared proportionally. Fig. 11(d) shows experimental results when the control strategy is implemented with line impedance compensation and proportional virtual impedance. As can be seen, the peak value of ia_1 is 2A, and the peak value of ia_2 is 4A. Meanwhile, there is no phase error between the two currents. Therefore, the load currents are proportionally shared by the two inverters. The load power is also proportionally shared by the inverters. The harmonic current in Fig. 10 is caused by the nonlinearity of the filter inductors.


Fig. 11. Current waveforms for the proportional power sharing when the ratio of the droop coefficients is 2: (a) Without line impedance compensation and with Xv_1=Xv_2=2Ω; (b) Without line impedance compensation but with Xv_1=4Ω andXv_2=2Ω; (c) With line impedance compensation and Xv_1=Xv_2=2Ω; (d) With line impedance compensation and Xv_1=4Ω, Xv_2=2Ω.

그림입니다.
원본 그림의 이름: CLP0000232c002e.bmp
원본 그림의 크기: 가로 1167pixel, 세로 760pixel

(a)

그림입니다.
원본 그림의 이름: CLP0000232c002f.bmp
원본 그림의 크기: 가로 1213pixel, 세로 797pixel

(b)

그림입니다.
원본 그림의 이름: CLP0000232c0030.bmp
원본 그림의 크기: 가로 1192pixel, 세로 759pixel

(c)

그림입니다.
원본 그림의 이름: CLP0000232c0031.bmp
원본 그림의 크기: 가로 1180pixel, 세로 750pixel

(d)



Ⅵ. CONCLUSION

This paper proposes a control strategy to achieve equal power sharing in the presence of line impedance mismatch. Based on virtual impedance reconstruction, the parallel- connected inverters have the same output impedance. Inaccurate reactive power sharing due to line impedance mismatch is reduced. Moreover, the proposed control strategy can be extended to conditions where proportional power sharing is required. If the ratio of the droop coefficients and that of the impedance of the inverters at the PCC are the inverse of the desired power-sharing ratio, the inverters can proportionally share the load power by overcoming the mismatch of the line impedance. The stability of the line impedance compensation has been analyzed. The design of the cutoff frequency of the low pass filter for the line impedance compensation is given. The effectiveness of the proposed control strategy is verified by simulation and experimental results.



REFERENCES

[1] Z. Guo, K. Sun, T. Wu, and C. Li, “An improved modulation scheme of current-fed bidirectional DC–DC converters for loss reduction,” IEEE Trans. Power. Electron., Vol. 33, No. 5, pp. 4441-4457, Jul. 2018.

[2] D. Sha, J. Zhang, X. Wang, and W. Yuan, “Dynamic response improvements of parallel-connected bidirectional DC–DC converters for electrical drive powered by low-voltage battery employing optimized feed forward control,” IEEE Trans. Power. Electron., Vol. 32, No. 10, pp. 7783-7794, Oct. 2017.

[3] D. Sha, X. Wang, and D. Chen, “High-efficiency current- fed dual active bridge DC–DC converter with ZVS achievement throughout full range of load using optimized switching patterns,” IEEE Trans. Power. Electron., Vol. 33, No. 2, pp. 1347-1357, Feb. 2018.

[4] D. Sha, G. Xu, and Y. Xu, “Utility direct interfaced charger/discharger employing unified voltage balance control for cascaded h-bridge units and decentralized control for CF-DAB modules,” IEEE Trans. Ind. Electron., Vol. 64, No. 10, pp.7831-7841, Oct. 2017.

[5] D. Sha, Z. Guo, and X. Liao, “Control strategy for input- parallel–output-parallel connected high-frequency isolated inverter modules,” IEEE Trans. Power. Electron., Vol. 26, No. 8, pp. 2237-2248, Aug. 2011.

[6] T. F. Wu, Y. E. Wu, H. M. Hsieh, and Y. K. Chen, “Current weighting distribution control strategy for multi- inverter systems to achieve current sharing,” IEEE Trans. Power. Electron., Vol. 22, No. 1, pp. 160-168, Jan. 2007.

[7] K. Brabandere, B. Bolsens, J. Keybus, A. Woyte, J. Driesen, and R. Belmans, “A voltage and frequency droop control method for parallel inverters,” IEEE Trans. Power. Electron., Vol. 22, No. 4, pp. 1107-1115, Jul. 2007.

[8] Y. Mohamed and E. El-Saadany, “Adaptive decentralized droop controller to preserve power sharing stability of paralleled inverters in distributed generation microgrids,” IEEE Trans. Power Electron., Vol. 23, No. 6, pp. 2806- 2816, Nov. 2008.

[9] Z. Guo, D. Sha, and X. Liao, “Wireless paralleled control strategy of three-phase inverter modules for islanding distributed generation systems,” J. Power Electron., Vol. 13, No. 3, pp. 479-486, May 2013.

[10] J. M. Guerrero, J. Matas, L. G. de Vicuna, M. Castilla, and J. Miret, “Wireless-control strategy for parallel operation of distributed-generation inverters,” IEEE Trans. Ind. Electron., Vol. 53, No. 5, pp. 1461-1470, Oct. 2006.

[11] U. Borup, F. Blaabjerg, and P. N. Enjeti, “Sharing of nonlinear load in parallel-connected three-phase converters,” IEEE Trans. Ind. Appl., Vol. 37, No. 6, pp. 1817-1823, Nov. 2001.

[12] Z. Guo, D. Sha, and X. Liao, “Voltage magnitude and frequency control of three-phase voltage source inverter for seamless transfer,” IET Power Electron., Vol. 7, No.1, pp. 200-208, Apr. 2013.

[13] J. He, Y. Li, J. Guerrero, F. Blaabjerg, and J. Vasquez, “An islanding microgrid power sharing approach using enhanced virtual impedance control scheme,” IEEE Trans. Power. Electron., Vol. 28, No. 11, pp. 5272-5282, Jul. 2013.

[14] Y. Zhang and H. Ma, “Theoretical and experimental investigation of networked control for parallel operation of inverters,” IEEE Trans. Ind. Electron., Vol. 59, No. 4, pp. 1961-1970, Apr. 2012.

[15] J. Kim, J. M. Guerrero, P. Rodriguez, R. Teodorescu, and K. Nam, “Mode adaptive droop control with virtual output impedances for an inverter-based flexible AC microgrid,” IEEE Trans. Ind. Electron., Vol. 26, No. 3, pp. 689-701, Mar. 2011.

[16] J. M. Guerrero, J.C. Vasquez, J. Matas, L. G. de Vicuna, and M. Castilla, “Hierarchical control of droop-controlled ac and dc microgrids - a general approach toward standardization,” IEEE Trans. Ind. Electron., Vol. 58, No. 1, pp. 158-172, Jan. 2011.

[17] J. He, and Y. W. Li, “An enhanced microgrid load demand sharing strategy,” IEEE Trans. Power. Electron., Vol. 27, No. 9, pp. 3984-3995, Sep. 2012.

[18] Y. W. Li and C. Kao, “An accurate power control strategy for power-electronics -interfaced distributed generation units operating in a low-voltage multibus microgrid,” IEEE Trans. Power. Electron., Vol. 24, No. 12, pp. 2977- 2988, Dec. 2009.

[19] C. K. Sao and P. W. Lehn, “Autonomous load sharing of voltage source converters,” IEEE Trans. Power. Del., Vol. 20, No. 2, pp. 2009-2016, Apr. 2005.

[20] Q. Zhong, “Robust droop controller for accurate proportional load sharing among inverters operated in parallel,” IEEE Trans. Ind. Electron., Vol. 60, No. 4, pp. 1281-1290, Apr. 2013.

[21] N. Pogaku, M. Prodanovic, and T. C. Green, “Modeling, analysis and testing of autonomous operation of an inverter-based microgrid,” IEEE Trans. Power Electron., Vol. 22, No. 2, pp. 613-625, Mar. 2007.

[22] E. Barklund, N. Pogaku, and M. Prodanovic, “Energy management in autonomous microgrid using stability- constrained droop control of inverters,” IEEE Trans. Power Electron., Vol. 23, No. 5, pp. 2346-2352, Sep. 2008.

[23] J. M. Guerrero, L. G. de Vicuña, J. Matas, M. Castilla, and J. Miret, “Output impedance design of parallel-connected ups inverters with wireless load-sharing control,” IEEE Trans. Ind. Electron., Vol. 52, No. 4, pp. 1126-1135, Aug. 2005.

[24] J. He and Y. W. Li, “Analysis, design, and implementation of virtual impedance for power electronics interfaced distributed generation,” IEEE Trans. Ind. Appl., Vol. 47, No. 6, pp. 2525-2538, Nov./Dec. 2011.

[25] J. Liu, Y. Miura, H. Bevrani, and T. Ise, “Enhanced virtual synchronous generator control for parallel inverters in microgrids,” IEEE Trans. Smart Grid, Vol. 8, No. 5, pp. 2268-2277, Sep. 2017.

[26] M. Gao, M. Chen, C. Wang, and Z. Qian, “An accurate power-sharing control method based on circulating-current power phasor model in voltage-source inverter parallel- operation system,” IEEE Trans. Power Electron., Vol. 33, No. 5, pp. 4458-4476, May 2018.

[27] Y. Shi, W. Wu, H. Wang, Y. Du, and J. Su, “The parallel multi-inverter system based on the voltage-type droop control method,” IEEE J. Emerg. Sel. Topics Power Electron., Vol. 4, No. 4, pp. 1332-1341, Dec. 2016.

[28] J. M. Guerrero, L. Vicuña, J. Matas, and J. Miret, “A wireless controller to enhance dynamic performance of parallel inverters in distributed generation systems,” IEEE Trans. Power Electron., Vol. 19, No. 5, pp. 1205-1213, Sep. 2004.



그림입니다.
원본 그림의 이름: image52.jpeg
원본 그림의 크기: 가로 192pixel, 세로 225pixel

Shengli Huang was born in Henan, China, in 1979. He received his Ph.D. degree from the Institute of Electrical Engineering, Chinese Academy of Sciences, Beijing, China, in 2009. He is presently working as an Associate Professor at the North China Institute of Science and Technology, Beijing, China. His current research interests include power electronics converters and motor control.


그림입니다.
원본 그림의 이름: image53.png
원본 그림의 크기: 가로 104pixel, 세로 122pixel

Jianguo Luo was born in Hunan, China, in 1977. He received his Ph.D. degree from Beihang University, Beijing, China, in 2008. He is presently working as an Associate Professor at the North China Institute of Science and Technology, Beijing, China. His current research interests include mechanical, electrical and robot technologies.