https://doi.org/10.6113/JPE.2018.18.6.1760

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Control Bandwidth Extension Method Based on Phase Margin Compensation for Inverters with Low Carrier Ratio

Qikang Wei^*, Bangyin Liu^†, and Shanxu Duan^*

^†,*State Key Laboratory of Advanced Electromagnetic Engineering and Technology, School of Electrical and Electronic Engineering, Huazhong University of Science and Technology, Wuhan, China

Abstract

This paper presents a control bandwidth extension method for inverters with a low carrier ratio. The bandwidth is extended at the price of decreasing the phase margin. Then the phase margin is compensated by introducing an extra leading angle into an inverse Park transformation. The model of the controller with the proposed method is established. The magnitude and phase characteristics are also analyzed. Then the influence on system stability when the leading angle is introduced is analyzed. The proposed method is applied to design an inverter controller with both a large bandwidth and a desired phase margin, and the experimental results verify that the controller performs well in the steady-state and in terms of transient response.

Key words: Bandwidth, Dynamic, Inverter, Low carrier ratio, Stability

Manuscript received Mar. 26, 2018; accepted Jul. 15, 2018

Recommended for publication by Associate Editor Hao Ma.

^†Corresponding Author: lby@hust.edu.cn Tel: +86-27-87558427, Fax:+86-27-87559303, Huazhong University of Science and Technology

*State Key Lab. Advanced Electromagnetic Eng. & Tech., School of Electr. & Electron. Eng., Huazhong Univ. Sci. & Tech., China

Ⅰ. INTRODUCTION

The carrier ratio (fc / fo) of inverters in high power and medium frequency application is often low [1]-[6]. This feature makes the design of the digital controller challenging since the bandwidth is usually limited. Typically, the bandwidth is limited to less than 10% of the PWM frequency [7], [8]. This phenomenon is partly due to the inevitable delay time in digital control. In a bode plot of the controller, the phase decreases dramatically as the frequency increases due to the delay. This limits the extension of the bandwidth. However, a large bandwidth is always desired to acquire fast dynamic characteristics, especially for inverters with a low carrier ratio.

A lot of work has been done to acquire a fast transient response or to extend the bandwidth. Theoretically, predictive and deadbeat regulators can be used to acquire a fast transient response. However, they are usually quite sensitive to uncertainties in the plant parameters [9], [10]. Reference [11] proposed a method that compensated for the phase of the resonance frequency by a modified resonant controller. To gain a good dynamic response and steady state performance, resonant controllers with parallel structures were adopted. Too many resonant controllers make the system complex and may result in stability issues. In [12], the state feedback concepts are used to compensate for the PWM transport delay. As a result, the controller gains can be distinctly increased. These methods perform well. However, they require certain controllers such as PR controllers and make the controllers complex. Reference [13] mentions that undesirable dynamic coupling of dq current components strongly affects the stability and control performance of the current control systems for low carrier ratio inverters. In addition, an output feedback decoupling control method is proposed, which is based on linear control for multiple-input-multiple-output systems. A systematic procedure for increase accurate dynamics assessment and tuning of synchronous-frame proportional–integral current controllers is presented in [14].

There are also some works to decrease or compensate for time-delay. In [15], the duty-ratio update mode is modified to achieve a variable delay time. The time-delay is discussed in detail and a method to acquire a relatively small delay was proposed [16]. An extra leading angle is introduced into the inverse Park transformations of multiple synchronous frames to compensate for the delays of specific signals [17]-[20]. The phase of the voltage output is advanced to compensate for the delay of fundamental signals in [21], [22]. The authors of [23] introduced a phase lead network to cope with rotating frame errors caused by delays, which has an equivalent effect. These works compensate for the delay. As a result, the leading angle is relatively small. Since the leading angle gets larger, new problems arise. This requires a more in-depth study.

In this paper, a method for introducing an extra leading angle to compensate for the delay is expanded to compensate for the phase margin. On this basis, the control bandwidth can be extended without changing the structure of the controller. When compared with the traditional control block, the only difference is the inverse Park transformation. Applying this method, the phase margin can be increased by more than 90 degrees. As a result, the bandwidth can be significantly extended. The key to apply this method is to properly design both positive sequence (PS) signals and negative sequence (NS) signals, which was not studied in the above mentioned delay compensate methods.

This paper is organized as follows. In section II, the controller characteristics with synchronous frame rotation, i.e. introducing an extra leading angle into an inverse Park transformation, is introduced and its mechanism is illustrated. In section III, the controller of a 400Hz inverter with increase proposed method is designed. Experimental results and some conclusions are presented in sections IV and V, respectively.

Ⅱ. CONTROLLER CHARACTERISTIC WITH SYNCHRONOUS FRAME ROTATION

A diagram of the control block in the stationary reference frame is shown in Fig. 1. In this diagram, I denotes the input signal of controller, and O denotes the output signal. F(j) denotes the controller. A and A^* are the frame transformations. is the fundamental rotating angle frequency. The process of signal conversion from the input to the output can be described as follows:

   (1)

Fig. 1. Control block in the stationary frame.

Generally, the synchronous frame rotating angle remains the same in /dq transformations and dq/ transformations. Here, an extra angle is added to in the dq/ transformation. This method has been used to compensated for delay. In this paper, the extra leading angle is used to compensated for the phase margin. Therefore, it will be quite large, and introduce some new problems. In order to understand the mechanism of introducing a leading angle, both PS and NS signals will be considered.

The input signal I is firstly transformed into the stationary frame. For the PS input signal, after the abc/ transformation, the vector signals are:

                  (2)

For NS, after the abc/ transformation, the signals are:

                 (3)

Where A₊ and A_- are the amplitudes, and and are the initial phase angles in the stationary frame, denotes the rotating angle frequency of the PS signal in the stationary frame, and _- is that for the NS signal. and stand for the PS signal, and and stand for the NS signal.

For an arbitrary linear controller F(j), define the change of the amplitude as M(), and the change of the phase as . The controller can be described as:

                        (4)

According to the control block (shown in Fig. 1), the open loop output signal can be expressed as:

    (5)

For the PS input signal, the output signal is:

         (6)

For the NS input signal, the output signal is:

         (7)

Comparing Equ. (6) with Equ. (7), there are two important features. The first one is that the characteristics of the magnitude (M () and M ()) and phase and of the PS and the NS are different. This is due to the fact that the controller works at the frequency in the synchronous frame not the initial frequency in the stationary frame. This difference depends on the ratio of to In the other words, inverters with a low carrier ratio have bigger differences. The other feature is that when the synchronous frame rotates an angle , the phase characteristic of the PS increases while those of the NS decreases.

A vector diagram of the frame rotation process is shown in Fig. 2. Fig. 2(a) and Fig. 2(b) stand for the PS, and Fig. 2(c) stands for the NS. Comparing Fig. 2(a) with Fig. 2(b), the phase characteristic is altered while the magnitude characteristic of the signal remains the same when the synchronous frame rotates. For the PS, the signal rotates counterclockwise. Meanwhile for the NS, the signal rotates clockwise. Thus, in Fig. 2(c), the clockwise direction is selected to be the positive direction of the angle. Comparing Fig. 2(b) with Fig. 2(c), the phase increases for the PS but decreases for the NS when the synchronous frame rotates counterclockwise.

Fig. 2. Vector graph of the synchronous frame rotating process: (a) Positive sequence without frame rotation; (b) Positive sequence with frame rotation; (c) Negative sequence with frame rotation.

(a)

(b)

(c)

Ⅲ. HIGH BANDWIDTH CONTROLLER DESIGN

As mentioned above, the phase of the PS increases while that of the NS decreases. Therefore, the controller should be carefully designed, considering both the PS and NS signals, in order to compensate for the phase margin.

A. Modification of the Inner Current Loop

A control block for an inverter with an LC filter is shown in Fig. 3. A pure proportion (P) controller is chosen. The P controller has the same magnitude and phase characteristic for the PS and NS in all frequencies. This feature simplifies the design of the outer loop with the proposed method. The design of the parameters of the P controller follows the general design principles. It should be noted that the feedback signal of the inductor current is transformed into the synchronous frame. In addition, during the transformation, the synchronous frame is rotated by angle (shown in Fig. 3). By this modification, the control block can be deduced to the equivalent block shown in Fig. 4.

Fig. 3. Control block for an inverter with an LC filter.

Fig. 4. Equivalent control block for an inverter with a LC filter.

In digital control, a time delay is inevitable. One and a half sampling delay time is considered in the control design. By applying the inner current loop, the resonance peak is tuned as shown in Fig. 5. The crossover frequency is 1587Hz. Thus, the inverter with a current loop is treated as a plant for the outer loop design.

The function of the inner current loop is:

    (8)

Fig. 5. Bode plot of an inverter and an inverter with an inner current loop.

Where K_Ip are the parameters of the P controller, and T_c is the control period.

B. Modeling of the Outer Voltage Loop with Phase Margin Compensation

Since PI controllers are the most widely used, one is chosen to be the outer loop controller. According to the analysis in section 2, the controller with the proposed method for PS signals can be written as:

      (9)

The PI controller can be divided into a P controller and an I controller. Then their models can be deduced according to Equ. (9). The PI controller for the PS input signal is:

   (10)

Where F₊() denotes the PI controller for the PS. K_p and K_i are the parameters. A bode plot of the PI controller for the PS signal is shown in Fig. 6. For the PS, the phase margin increases according to .

Like the PS, the model of the PI controller for the NS signal can be written as:

Fig. 6. Bode plot of a PI controller for positive sequence signals.

   (11)

Where F_-() denotes the PI controller for the NS. A bode plot of the PI controller for the NS signal is shown in Fig. 7. For the NS, the phase margin is decreased according to .

Fig. 7. Bode plot of a PI controller for negative sequence signals.

According to the models in Equ. (9) and Equ. (10), this can be defined as:

                     (12)

The magnitude equation and the phase equation of the PS can be deduced as:

      (13)

In addition, for NS, it is:

     (14)

Where and denote the magnitude and phase equations of the NS signal, respectively.

C. Analysis of Magnitude

It is important to study the magnitude characteristics of both the PS and the NS. Comparing Equ. (13) with Equ. (14), with denoting the same rotating angle frequency of the PS and NS , the magnitude difference when is:

        (15)

According to Equ. (15), the curve of the difference of the two sequences magnitudes is shown in Fig. 8. The magnitude of the PS is always larger than that of the NS at the same frequency. In addition, the magnitude difference decreases with an increase in the frequency. That is a very interesting feature that makes it possible to design the magnitude of the NS so that it is below zero while the magnitude of the PS is above zero.

Fig. 8. Curve of the difference of the magnitude and frequency

As analyzed above, the magnitude of the PS is larger than that of the NS. If the magnitude of the NS can be further designed below zero, the NS is always stable and the phase of the NS can be decreased without limitations. Fig. 9 shows a typical open-loop bode plot of the controller for the NS. According to the characteristics of the PI controller and the inner current loop, the peak value appears at 0Hz or the resonance rotating angle frequency (). Therefore, to make the magnitude of the NS below zero, it satisfies:

   (16)

Fig. 9. Open-loop bode plot of a controller for negative sequence signals.

Where M_Inner() is the magnitude of the inner current loop. According to Equ. (8), M_Inner(0)=K_Ip. Define the resonance peak value of the inner current loop M_Inner()= K_Ip*X. Equ. (16) turns to be:

             (17)

Equ. (17) can verify whether the magnitude of the NS has been designed below zero or not. In fact, it is very easy to design the magnitude of the NS below zero in inverters with a low carrier ratio. There is a simple proof. Suppose that . Solve Equ. (17) and a should satisfy:

                       (18)

As shown in Fig. 10, if the difference of the magnitude between the peak value and the value at 0Hz is less than 20dB, then X is less than 10. Suppose a=b, solve Equ. (18), and a should be less than 14. This condition can be easily satisfied in a inverter with a low carrier ratio.

Fig. 10. Bode plot of a controller with only an inner loop.

D. Application Notes and Limitation of the Method

Making the magnitude of the NS below zero is a special condition where the phase margin of the PS can be adjusted without limits of the NS. In fact, even when the magnitude of the NS is not below zero, the proposed method can be applied to compensate for the phase margin. The phase margin of the NS is usually larger than that of the PS. Therefore, the proposed method can be directly applied to compensate for the phase margin of the conventional controller without changing the controller parameters. For example, it can be applied to the control of grid-connected converters by just introducing a leading angle. However, in this case, the phase margin of the NS is not much larger than that of the PS. Thus, the angle is limited. It cannot be set too large or the NS will be unstable due to the decrease of the phase margin. In fact, this is also the reason why introducing a leading angle can compensate for the delay without considering the phase margin of the NS. The angle is too small to make the NS unstable.

Even if the magnitude of the NS is designed to be below zero, the angle still has an upper limit. The phase of the PS should be between -180 degrees and 180 degrees at a frequency where the magnitude is above zero. This feature can be seen from Fig. 11. However, the phase margin of the PS can be increased by more than 90 degrees.

Fig. 11. Bode plot of the open-loop of the designed system.

Fig. 11 is a bode plot of the open-loop of the designed system. As it shows, the crossover frequency is larger than the conventional design result at the price of an insufficient phase margin. In addition, this system is unstable. However, when introducing an extra leading angle, it is able to compensate for the phase margin. By choosing a suitable value, the system becomes stable and performs well.

In short, this method enlarges phase margin of the PS at the price of reducing the phase margin of the NS. It is very simple and can be applied in a conventional controller with very little change. In addition, in inverters with a low carrier ratio, this method is less restricted.

Ⅳ. EXPERIMENTAL VERIFICATION

For experimental verification, the TMS320F28335 DSP controlled three phase inverter shown in Fig. 12 is utilized. The key parameters of the system are listed in Table I.

Fig. 12. System diagram of a three phase inverter.

TABLE I KEY PARAMETERS OF THE SYSTEM

Symbol	Parameter	Value
L	Inductor	0.5mH
C	Capacitor	50uF
fs	Switching Frequency	6kHz
fo	Fundament Frequency	400Hz
Vdc	DC Bus Voltage	400V
fctrl	Controlling Frequency	12kHz
Tdelay	Delay time	1.5Tc
Kip	Inner loop Parameters	Kip = 0.8
Kp1, Ki1	Outer loop Parameters (original controller)	Kp1 = 0.135 Ki1 = 920.3
Kp2, Ki2	Outer loop Parameters (bandwidth extended)	Kp2 = 0.27 Ki2 = 1004
r	Equivalent Resistance	0.2
R	Load Resistance	11

To show the advantages of the control bandwidth extension method, two controllers are compared. The first one is the original controller, where the crossover frequency is set at 553Hz, about 10% of the switching frequency. The phase margin is 61°. An open-loop bode plot of this is shown in Fig. 13(a). The second one is the modified controller. The crossover frequency increases, as shown in Fig. 11. Then the phase margin is compensated. An extra angle = 90° is introduced. An open-loop bode plot of the modified controller is shown in Fig. 13(b). The crossover frequency is 1161Hz, and the phase margin is 67.7°.

Fig. 13. Bode plots of the open-loop of the system: (a) Original controller; (b) Modified controller with a leading angle of =90°.

(a)

(b)

The closed-loop bode plots of two controllers are shown in Fig. 14. They are both zero at a frequency of 400Hz, which means that the steady error is theoretically zero. In addition, the magnitude is small for the two controllers, which means they have good waveforms. The bandwidth of original controller is 1205Hz, and it is extended to 1135Hz with the proposed method.

Fig. 14. Bode plots of the closed-loop of the system: (a) Original controller; (b) Modified controller with a leading angle of =90°.

(a)

(b)

A. Verification of Phase Margin Compensation

The control bandwidth extension method is based on phase margin compensation. Therefore, it needs to be verified whether the phase margin compensation works or not. The phase margin is -22.3° as shown in Fig. 11. The experiment is performed with introducing leading angles of = 0°, 60° and 90°, respectively. The results are shown in Fig. 15. The system trips out on an over-current fault for = 0°. = 60° makes system stable. = 90° has the best performance. All of these results indicate that the stability improved and that the system had a better dynamic with an increase of angle .

Fig. 15. Experimental results for the start-up process: (a) Leading angle =0°; (b) Leading angle =60°; (c) Leading angle =90°.

(a)

(b)

(c)

B. Steady-State Verification

According to Fig. 14, the two controllers performed well at the steady-state. Experimental results are shown in Fig. 16 and Fig. 17. The RMS values for each of the phases are 115.4V, 117.8V and 116.6V for the original controller, and 114.7V, 116.5V and 116.3V for the modified controller. When the output power is 3.6kW, it becomes 116.0V, 117.5V and 116.3V for the original controller, and 115.5V, 115.8V and 116.3V for the modified controller. The THD of the capacitor voltage is about 1% for both of the controllers, in both loaded and unloaded states. These results coincide with the bode plot in Fig. 14, and indicate that the inverter with the proposed method performs well at the steady-state.

Fig. 16. Capacitor voltage without a load: (a) Original controller; (b) Modified controller with a leading angle of =90°.

(a)

(b)

Fig. 17. Capacitor voltage with a load: (a) Original controller; (b) Modified controller with a leading angle of =90°.

(a)

(b)

C. Transient Response Verification

The transient response is the most important for the bandwidth extension method. This characteristic is also experimentally verified. Fig. 18 shows experimental results obtained for testing the transient response of the system on a sudden change of load. The inverter works in the steady-state. The resistance of load is 11, and the total output power is about 3.6 kW. Then the switch is suddenly cut off. For the original controller, the first peak value of phase B increased by at least 15V, and the waveform of phase A is obviously distorted.

Fig. 18. Capacitor voltage for a change of load: (a) Original controller; (b) Modified controller with a leading angle of =90°.

(a)

(b)

For the modified controller, the first peak value of phase B increased by about 6V. The system comes into the steady state in less than 3ms. These results indicate that the modified method has far better dynamic performance than the original controller. This coincides with the bode plot in Fig. 13. The bandwidth is extended, and the dynamic characteristic is improved.

D. Verification of Application in an Inverter with a Lower Carrier Ratio

The proposed method is better applied in an inverter with a lower carrier ratio since the magnitude of the NS is easier to design under zero. Experimental results when the carrier ratio is 6 are shown in Fig. 19. The switching frequency is changed from 6kHz to 2.4kHz. A powder core inductor is used and the inductor, when the current is zero, is 2600uH. The capacitor is changed from 50uF to 20uF. The controller is designed with a crossover frequency of 785.2Hz and a phase margin of -64.5° as shown in Fig. 19(a). Therefore, the system is unstable as verified by the experimental results of Fig. 19(b). The system became stable with the proposed method. The leading angle is 125° in Fig. 19(c). The quality of the waveform is not very good due to the small carrier ratio. These experimental results verify that the magnitude of the NS can be designed under zero and that the stability is changed when the leading angle changes.

Fig. 19. Experimental results when the switching frequency is 2.4kHz: (a) Open-loop bode plot of the inverter; (b) Leading angle = 0°; (c) leading angle = 125.

(a)

(b)

(c)

Ⅴ. CONCLUSIONS

A bandwidth extension method for low carrier ratio digital controlled inverters is proposed in this paper. This method is based on phase margin compensation. The compensation is realized by introducing an extra leading angle into an inverse Park transformation. In addition, its mechanism is studied by considering both the positive sequence and negative sequence components. It is revealed that the phase margin of the positive sequence can be increased at the price of a decrease of the phase margin of negative sequence. The application notes are discussed and a controller design process is offered. The bandwidth is extended. Experimental results show that the inverter performs well in terms of both its steady-state and transient response.

ACKNOWLEDGMENT

This work is supported by the National Key R&D Program of China (2016YFB0900400) and the National Natural Science Foundation of China (51777084).

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Qikang Wei received his B.S. degree in Electrical Engineering from the Huazhong University of Science and Technology (HUST), Wuhan, China, in 2013, where he is presently working towards his Ph.D. degree in the School of Electrical and Electronics Engineering. His current research interests include renewable energy applications and large capacity inverters.

Bangyin Liu received his B.S., M.S. and Ph.D. degrees in Electrical Engineering from the Huazhong University of Science and Technology (HUST), Wuhan, China, in 2001, 2004 and 2008, respectively. He was a Postdoctoral Research Fellow in the Department of Control Science and Engineering, HUST, from 2008 to 2010. He is presently working as an Associate Professor in the School of Electrical and Electronics Engineering, HUST. His current research interests include renewable energy applications, power quality and power electronics applied to power systems.

Shanxu Duan received his B.S., M.S. and Ph.D. degrees in Electrical Engineering from the Huazhong University of Science and Technology (HUST), Wuhan, China, in 1991, 1994 and 1999, respectively. Since 1991, he has been a Faculty Member in the College of Electrical and Electronics Engineering, HUST, where he is presently working as a Professor. His current research interests include stabilization, nonlinear control of power electronic circuits and systems, fully digitalized control techniques for power electronics apparatus and systems, and optimal control theory and corresponding application techniques for high-frequency PWM power converters. Dr. Duan is a Senior Member of the Chinese Society of Electrical Engineering and a Council Member of the Chinese Power Electronics Society. He was selected as one of the New Century Excellent Talents by the Ministry of Education of China in 2007. He was also the recipient of the honor of “Delta Scholar” in 2009.