사각형입니다.

https://doi.org/10.6113/JPE.2018.18.6.1780

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



High-Pass-Filter-Based Virtual Impedance Control for LCL-filtered Inverters Under Weak Grid


Jiangfeng Wang*, Yan Xing*, Li Zhang, Haibing Hu*, Tianyu Yang*, and Daorong Lu*


College of Energy and Electrical Engineering, Hohai University, Nanjing, China

*College of Automation Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, China



Abstract

Voltage feed-forward control (VFFC) is widely used in LCL-type grid-tied inverters due to its advantages in terms of disturbance rejection performance and fast dynamic response. However, VFFC may worsen the stability of inverters under weak grid conditions. It is revealed in this paper that a large phase-lag in the low-frequency range is introduced by VFFC, which reduces the phase margin significantly and leads to instability. To address this problem, a novel virtual-impedance-based control, where a phase-lead is introduced into the low-frequency area to compensate for the phase lag caused by VFFC, is proposed to improve system stability. The proposed control is realized with a high-pass filter, without high-order-derivative components. It features easy implementation and good noise immunity. A detailed design procedure for the virtual impedance control is presented. Both theoretical analysis and experimental results verify the effectiveness of the control proposed.


Key words: Grid-tied inverter, Stability, Virtual impedance, Voltage feed-forward control, Weak grid


Manuscript received Nov. 17, 2017; accepted Aug. 9, 2018

Recommended for publication by Associate Editor Sung-Jin Choi.

Corresponding Author: zhanglinuaa@ hhu.edu.cn Tel: +86-25-58099080, Hohai University

*Col. Autom. Eng., Nanjing Univ. Aeronautics & Astronautics, China



Ⅰ. INTRODUCTION

Recently, distributed generation (DG) systems have attracted a lot of attention due to environmental aspects [1], [2]. With the increased number of grid-connected power electronic devices and the growing penetration of DGs, distributed power grids feature the characteristic of a weak grid, and a large set of grid impedance values is yielded with long transmission lines [3], [4]. When a grid-tied inverter is connected to a weak grid, the possible wide range of grid impedance values introduces challenges the control of the grid-tied inverter in terms of stability [5].

For grid-tied inverters, voltage feed-forward control (VFFC) has been widely applied in single-phase [6] and three-phase systems [7]. When applied in a stiff grid case (where the grid impedance can be ignored), the well-known VFFC achieves good steady-state performance due to the rejection of the current harmonics caused by grid distortion. It can also improve the dynamics performance in the case of the start-up procedure or grid voltage sags, swells and flickers. However, it has been revealed in recent studies [8]-[10] that under weak grid conditions, the feed-forward link of PCC voltage results in a “positive feedback control” which may reduce the stability of the system and its control performance. Actually, for an LCL-type grid-tied inverter, no matter what type of current control schemes, e.g. grid current control [8], inverter-side inductor current control [9] or weighted average current control [10], is used, VFFC may lead to instability due to the varied grid impedance.

Recently, more and more researchers have devoted themselves to reexamining the performance of conventional control schemes in a weak grid. Single-loop current control, which is aimed at reducing the number of additional sensors, has been studied in [11], [12]. In a weak grid, the resonance frequency of an LCL filter can vary in a wide range due to variations of the grid impedance, which indicates that single current feedback is not able to guarantee stability [13]. In this scenario, an additional damping is required and dual-loop current control is preferred [8], [14].

Impedance-based stability-assessment has been shown to be an effective approach in weak grid systems, which realize the decoupling of grid-tied inverters and grid subsystems [15], [16]. In order to ensure system stability, a sufficient phase margin is required at the frequency of the intersection between the inverter output impedance and the grid impedance [14]. Since grid impedance is determined by the utility grid and is difficult to change, the stability of the system has to be improved by shaping the inverter output impedance. Numerous impedance shaping methods have been proposed to enhance stability by employing an additional compensation network in the current loop [17], [18], modifying the voltage feed-forward link [8], [19], [20], or introducing a virtual impedance [14], [21], [22]. Impedance shaping methods by inserting a narrow-band filter or lead-lag network to boost the phase angle have been introduced in [17], [18]. These methods can mitigate the adverse impacts caused by VFFC and improve system robustness. However, the designs of the current regulator and phase compensation network are complicated. In [8] and [19], adaptive grid voltage feed-forward methods based on on-line grid impedance estimation were adopted to obtain an appropriate phase margin under weak grid conditions. However, the effectiveness of this method relies on the accuracy of the estimated grid impedance. Meanwhile, current quality might be sacrificed due to the injection of extra harmonics into the grid current [23]. The authors of [20] further proposed an adaptive feed-forward algorithm without grid impedance estimation, which features a high robustness against grid impedance variations and low current harmonics. Unfortunately, it still suffers from a heavy computational burden. In [14] and [22], the virtual impedance method was proposed to guarantee strong stability-robustness in weak grid systems. Nevertheless, multiple derivative terms are required in the feedback link, which can amplify high-frequency noises and deteriorate the control performance. In brief, the existing impedance shaping methods still suffer due to complexity, dependence on online grid impedance measurements and unsatisfactory capability in terms of noise rejection.

In this paper, the instability induced by VFFC, since a large phase lag is introduced and the phase margin is reduced significantly in the low-frequency range, is revealed. In addition, an improved virtual-impedance-based control employing a high-pass filter is proposed, which features easy implementation and good noise immunity. With the proposed control, grid- tied inverters can adapt to a wide range of grid impedance. This paper is organized as follows. In Section II, the output impedance modeling of a grid-tied inverter with dual-loop current control is briefly presented, and the influence of VFFC on system stability is analyzed using an impedance- based analysis method. In Section III, a high-pass-filter-based virtual impedance control is proposed and compared with conventional solutions. Detailed design procedures for the proposed control are presented. Experimental verifications are given in Section IV. Finally, some conclusions are drawn in Section V.



Ⅱ. STABILITY ANALYSIS ON AN INVERTER WITH VFFC


A. Output Impedance Modeling

A single-phase grid-tied inverter with an LCL filter is shown in Fig. 1, where the weak grid is emulated by an ideal grid voltage source vg in series with a grid impedance Zg and vpcc is the PCC voltage. Dual-loop current control with grid voltage feed-forward is illustrated in Fig. 2, where the PWM unit is simplified to KPWM, Gd(s) is the digital delay, Hic is the feedback coefficient of the capacitor current, Gi(s) is the PI current regulator, and the feed-forward function Gf(s) is set to 1/KPWM. Iref is the current amplitude reference, and the phase angle θ of the PCC voltage fundamental is determined by the synchronous reference frame PLL (SRF-PLL).


그림입니다.
원본 그림의 이름: CLP00002404353f.bmp
원본 그림의 크기: 가로 1539pixel, 세로 708pixel

Fig. 1. Main circuit of a single-phase LCL-type grid-tied inverter.


그림입니다.
원본 그림의 이름: CLP000024040001.bmp
원본 그림의 크기: 가로 1878pixel, 세로 547pixel

Fig. 2. Control block diagram of a single-phase LCL-type grid-tied inverter.


Using the equivalent transformation method, the injected grid current ig(s) can be written as:

그림입니다.
원본 그림의 이름: CLP000024040002.bmp
원본 그림의 크기: 가로 716pixel, 세로 170pixel         (1)

where Zo(s) is the inverter output impedance without VFFC, and Zf(s) is the impedance introduced by VFFC. The expressions of Zo(s) and Zf(s) are given by:

그림입니다.
원본 그림의 이름: CLP000024040005.bmp
원본 그림의 크기: 가로 1407pixel, 세로 211pixel         (2)

그림입니다.
원본 그림의 이름: CLP000024040006.bmp
원본 그림의 크기: 가로 1430pixel, 세로 222pixel        (3)

Based on the aforementioned impedance modeling, an equivalent circuit of the grid-tied inverter can be derived as shown in Fig. 3, where Zo_eq(s) represents the output impedance of the inverter with VFFC, and is expressed as:

그림입니다.
원본 그림의 이름: CLP000024040007.bmp
원본 그림의 크기: 가로 623pixel, 세로 177pixel   (4)


그림입니다.
원본 그림의 이름: CLP00000d380003.bmp
원본 그림의 크기: 가로 1311pixel, 세로 746pixel

Fig. 3. Equivalent circuit of a grid-tied inverter with VFFC.


B. Impedance-Based Stability Analysis

Based on the impedance analysis method, a grid-tied inverter system can be modeled as two subsystems, i.e., a grid-tied inverter subsystem and a weak grid subsystem, as shown in Fig. 3. The system stability can be determined by checking whether the impedance ratio Zg(s)/Zo(s) satisfies the Nyquist stability criterion [15]. For this criterion, the phase margin (PM) must be positive if Zg(s) and Zo(s) intersect at fi, which is expressed as:

그림입니다.
원본 그림의 이름: CLP000024040008.bmp
원본 그림의 크기: 가로 1185pixel, 세로 107pixel        (5)

Typically, grid impedance is mainly introduced by the long-distance transmission wires, and it can be simplified as a

series-connected inductor and resistor. Considering the worst case, the grid impedance is regarded as a purely inductive component with a 90° phase angle. Then Eq. (5) can be rewritten as:

그림입니다.
원본 그림의 이름: CLP00002404000a.bmp
원본 그림의 크기: 가로 671pixel, 세로 100pixel           (6)

From Eq. (6), it can be seen that the phase margin is determined by arg[Zo(j2πfi)]. Thus, to improve the stability of a grid-tied inverter, it is necessary to boost the phase angle of the inverter output impedance around the intersection frequency.

As discussed above, when VFFC is employed, an additional impedance Zf(s) is introduced in parallel with the original output impedance, and the shaped output impedance becomes Zo_eq(s). Substituting Eqns. (2)-(3) into Eq. (4) yields:

그림입니다.
원본 그림의 이름: CLP00002404000b.bmp
원본 그림의 크기: 가로 1098pixel, 세로 191pixel   (7)

where:

그림입니다.
원본 그림의 이름: CLP00002404000c.bmp
원본 그림의 크기: 가로 1386pixel, 세로 187pixel         (8)

A bode plot of the transfer function Gz(s) is drawn in Fig. 4, with the example parameters given in Section III. D. It can be seen that a large phase-lag θlag(=∠Gz(j2πf)) is induced by Zf(s), and that the lower the frequency, the larger θlag. As a result, the phase margin PM in Eq. (6) is significantly reduced.


그림입니다.
원본 그림의 이름: CLP000024040004.bmp
원본 그림의 크기: 가로 1139pixel, 세로 874pixel

Fig. 4. Bode plot of the transfer function Gz(s).


For comparison, a bode plot of the output impedance Zo(s) and Zo_eq(s) is depicted in Fig. 5. As shown in Fig. 5, the magnitude of Zo_eq(s) is higher than Zo(s) in the low- frequency range, which indicates that VFFC improves the low frequency harmonics suppression capability. However, the larger the grid-inductance Lg, the lower the intersection frequency fi, and the smaller phase margin PM. Once the intersection frequency turns to the low-frequency range, as shown in the blue area in Fig. 5, the phase margin becomes a negative value, which results in system instability. A Nyquist plot of the impedance ratio Zg(s)/Zo(s) and Zg(s)/Zo_eq(s), under weak grid conditions with Lg=0.5mH and 3.2mH, is shown in Fig. 6. It can be seen that the grid-tied inverter without VFFC is stable in both cases, since the Nyquist plot of the impedance ratio does not encircle the point (-1,j0). Meanwhile, a grid-tied inverter with VFFC is also stable with Lg=0.5mH. However, when Lg=3.2mH, the curve with VFFC surrounds the point (-1,j0), which indicates that the grid-tied inverter with VFFC becomes unstable with an increase of Lg.


그림입니다.
원본 그림의 이름: CLP000024040009.bmp
원본 그림의 크기: 가로 1059pixel, 세로 855pixel

Fig. 5. Bode plot of grid impedance (pink) and inverter output impedance: without VFFC (red) and with VFFC (blue).


Fig. 6. Nyquist plot of the impedance ratio Zg(s)/Zo(s) (blue) and Zg(s)/Zo_eq(s) (red): (a) Lg=0.5mH; (b) Lg=3.2mH.

그림입니다.
원본 그림의 이름: CLP000012cc4240.bmp
원본 그림의 크기: 가로 1149pixel, 세로 672pixel

(a)

그림입니다.
원본 그림의 이름: CLP00002404000e.bmp
원본 그림의 크기: 가로 1216pixel, 세로 671pixel

(b)


Based on the impedance analysis, it is found that the instability induced by VFFC is mainly due to the fact that a large phase-lag is introduced and the phase margin is reduced significantly in the low-frequency range.



Ⅲ. PROPOSED HIGH-PASS-FILTER-BASED VIRTUAL IMPEDANCE CONTROL

According to the above analysis, a large phase-lag is induced by VFFC, which significantly reduces the phase margin and leads to instability. As a result, phase-leading compensation is always necessary to improve the system stability.


A. Conventional Virtual-Impedance-Based Control

To ensure system stability under a weak grid, the conventional solution [14] introduces a virtual pure inductance Lv at the output terminal of the grid-tied inverter, as shown in Fig. 7, where Zv(s) = sLv. In addition, Zv(s) offers a 90° phase-lead under all frequencies and compensates the phase-lag. A control block diagram of a grid-tied inverter with virtual impedance is drawn in Fig. 8(a). Moving the feedback node of ig(s) from the output of the transfer function 1/sCf to the output of the transfer function Gi(s), an equivalent block diagram is obtained, as shown in Fig. 8(b). Through an equivalent transformation, the transfer function Gv(s) in Fig. 8(b) is given by:

그림입니다.
원본 그림의 이름: CLP000024040010.bmp
원본 그림의 크기: 가로 972pixel, 세로 188pixel        (9)


그림입니다.
원본 그림의 이름: CLP00002404000f.bmp
원본 그림의 크기: 가로 1178pixel, 세로 633pixel

Fig. 7. Equivalent circuit with virtual impedance.


Fig. 8. Conventional virtual impedance control: (a) control block diagram; (b) its equivalent transformation.

그림입니다.
원본 그림의 이름: CLP00000d380002.bmp
원본 그림의 크기: 가로 1882pixel, 세로 495pixel

(a)

그림입니다.
원본 그림의 이름: CLP00000d380001.bmp
원본 그림의 크기: 가로 1895pixel, 세로 497pixel

(b)


It is worth noting that 1/Gd(s) is a prediction transfer function, which cannot be realized in practice. Hence, the conventional implementation function of the feedback link, defined as Gfb(s), is given by:

그림입니다.
원본 그림의 이름: CLP000024040011.bmp
원본 그림의 크기: 가로 1454pixel, 세로 153pixel       (10)

As can beseen from Eq. (10), multiple derivative feedbacks of the injected grid current are required to realize the virtual impedance. These derivative terms are difficult to realize in practical applications regardless of what implementation, like analog or digital control, is adopted. Meanwhile, they are prone to the measurement noise that is inevitably introduced when sampling the injected current. A discrete method like the backward difference can be used for noise filtering [14]. However, the effect might be unsatisfactory. The noises can also be suppressed by adopting a high-order low-pass filter. However, this makes the parameter design difficult and complex. On the other hand, Gv(s) is also sensitive to the parameters of the LCL filter, and parameter mismatches might occur due to the tolerance or aging of the filter components. Thus, in order to effectively ensure the stability of a system, the implementation of virtual impedance needs to be handled carefully under practical considerations.


B. Principle of the Proposed High-Pass-Filter-Based Virtual Impedance Control

To simplify the implementation function Gfb(s) and completely eliminate the pure derivative components, the derivation of the modified implementation function is carried out as the following two-steps:

Step 1. Simplification of Gv(s)

Based on the analysis mentioned in Section II, the instability induced by VFFC is mainly due to the large phase-lag introduced and the fact that the phase margin is significantly reduced in the low-frequency range, where the virtual impedance should be employed to boost the phase angle of the output impedance. At low frequencies, the transfer function given by Eq. (10) can be approximated by a proportional component, which is expressed as:

그림입니다.
원본 그림의 이름: CLP000024040016.bmp
원본 그림의 크기: 가로 593pixel, 세로 176pixel    (11)

Replacing Gv(s) with 그림입니다.
원본 그림의 이름: CLP000024040018.bmp
원본 그림의 크기: 가로 132pixel, 세로 70pixel, the equivalent series virtual impedance is derived as:

그림입니다.
원본 그림의 이름: CLP000024040017.bmp
원본 그림의 크기: 가로 1320pixel, 세로 158pixel   (12)

A bode plot of the equivalent virtual impedance is given in Fig. 9, with the example parameters given in Section III. D. It can be seen that the virtual impedance 그림입니다.
원본 그림의 이름: CLP000024040019.bmp
원본 그림의 크기: 가로 136pixel, 세로 70pixel features inductive at low frequencies, which introduces a phase-lead to the output impedance and compensates the phase-lag induced by VFFC. As a result, the unstable area is narrowed.


그림입니다.
원본 그림의 이름: CLP000024040014.bmp
원본 그림의 크기: 가로 998pixel, 세로 813pixel

Fig. 9. Bode plot of the equivalent virtual impedance그림입니다.
원본 그림의 이름: CLP000024040015.bmp
원본 그림의 크기: 가로 115pixel, 세로 75pixel.


At higher frequencies, the feedback function cannot be approximated by a proportional component as Eq. (11). Therefore, the frequency response of the equivalent virtual impedance might be very different from that of a pure inductor. As can be seen in Fig. 9, the phase of the equivalent virtual impedance 그림입니다.
원본 그림의 이름: CLP00002404001a.bmp
원본 그림의 크기: 가로 131pixel, 세로 65pixel falls below zero at high frequencies, which introduces a phase-lag and deteriorates the stability of the system. However, referring to Fig. 5, the phase margin (i.e. PM1) has already approached to 180° when the output impedance and grid impedance intersect in the high- frequency range. This means that the phase margin is large enough, which can be sacrificed a bit without influencing the system stability.

The synthetic process of the original inverter output impedance Zo_eq(s) and the virtual impedance 그림입니다.
원본 그림의 이름: CLP00002404001e.bmp
원본 그림의 크기: 가로 131pixel, 세로 74pixel is illustrated in Fig. 10. As shown in Fig. 10(a), a leading angle is introduced by 그림입니다.
원본 그림의 이름: CLP00002404001f.bmp
원본 그림의 크기: 가로 131pixel, 세로 74pixel in the low-frequency range and a higher magnitude of 그림입니다.
원본 그림의 이름: CLP000024040020.bmp
원본 그림의 크기: 가로 131pixel, 세로 74pixel leads to a larger leading angle, i.e., θ2>θ1. However, it can be seen from Fig. 10(b) that a higher magnitude of 그림입니다.
원본 그림의 이름: CLP000024040021.bmp
원본 그림의 크기: 가로 131pixel, 세로 74pixel also results in a larger lagging angle in the high-frequency range. Hence, the parameter design of 그림입니다.
원본 그림의 이름: CLP000024040022.bmp
원본 그림의 크기: 가로 131pixel, 세로 74pixel should be a trade-off to make sure that a suitable leading angle is introduced in the low-frequency range and that enough of a phase margin is guaranteed in the high-frequency range.


Fig. 10. Synthetic process of Zo_eq(s) and 그림입니다.
원본 그림의 이름: CLP00002404001d.bmp
원본 그림의 크기: 가로 117pixel, 세로 64pixel: (a) In the low- frequency range; (b) In the high-frequency range.

그림입니다.
원본 그림의 이름: CLP00002404001b.bmp
원본 그림의 크기: 가로 749pixel, 세로 429pixel

(a)

그림입니다.
원본 그림의 이름: CLP00002404001c.bmp
원본 그림의 크기: 가로 725pixel, 세로 406pixel

(b)


Step 2. Adding a low-pass filter for Zv(s)

According to the control diagram in Fig. 8, when the simplified transfer function 그림입니다.
원본 그림의 이름: CLP000024040023.bmp
원본 그림의 크기: 가로 136pixel, 세로 72pixel is employed, the feedback link of the injected grid current contains a first-order derivative component, which comes from the transfer function of the virtual impedance (i.e., Zv(s) = sLv). Thus, a first-order low-pass filter (LPF) Glp(s) is adopted to attenuate the influence of the inevitable noise. Then the implementation function of the feedback link, defined as 그림입니다.
원본 그림의 이름: CLP00002404002b.bmp
원본 그림의 크기: 가로 144pixel, 세로 75pixel, can be derived:

그림입니다.
원본 그림의 이름: CLP00002404002c.bmp
원본 그림의 크기: 가로 1214pixel, 세로 230pixel       (13)

where wlp is the corner frequency of the low-pass filter.

As can be observed from Eq. (13), with the proposed virtual impedance control, the equivalent transfer function 그림입니다.
원본 그림의 이름: CLP00002404002d.bmp
원본 그림의 크기: 가로 139pixel, 세로 70pixel, which features the characteristics of a high-pass filter, is implemented to replace the high-order-derivative component Gfb(s). Based on the analysis above, a control block diagram of the proposed grid-tied inverter can be derived, as drawn in Fig. 11.


그림입니다.
원본 그림의 이름: CLP000024040024.bmp
원본 그림의 크기: 가로 1797pixel, 세로 544pixel

Fig. 11. Control block diagram of the proposed grid-tied inverter.


C. Comparison Between Conventional Solutions and the Proposed Control

A bode plot of the proposed feedback gain 그림입니다.
원본 그림의 이름: CLP00002404002e.bmp
원본 그림의 크기: 가로 149pixel, 세로 76pixel and the conventional feedback gain Gfb(s) [14] are compared in Fig. 12, where Lv=1mH and wlp=3000π rad/s. It can be clearly seen that with the conventional solution, the amplification of noises at the switching frequency fsw are considerably larger (13.3dB). On the other hand, the magnitude of the proposed feedback gain at fsw is negligibly small (-32.7dB). In the conventional solution, this means that the noise of the sampled signal is amplified and introduced into the modulation signal through the feedback link. Meanwhile, the noise is attenuated in the proposed control. A comprehensive comparison between conventional solutions [14], [22] and the proposed control is presented in Table I. It can be seen that the inverter-side inductor current control is used in [22]. This control scheme is an indirect control, where it is inconvenient to set the power factor on the grid side. Meanwhile, the stability margin is limited since the virtual impedance is introduced in the inverter-side. Grid current control is used in this paper and in [14]. When compared to the virtual impedance control in [14], the stability margin of the proposed control is slightly lower since the phase-lead is induced only in the low-frequency range. However, system stability can also be guaranteed over a wide range of grid impedances. Meanwhile, the proposed control features better noise immunity and easier implementation.


TABLE I COMPARISON BETWEEN CONVENTIONAL SOLUTIONS AND THE PROPOSED CONTROL

Aspects

Conventional solution [14]

Conventional solution [22]

Proposed Control

Control scheme

Grid current control

Inverter-side inductor current control (inconvenient to set the power factor on the grid side)

Grid current control

Mechanism to ensure stability

Compensate the phase-lag at the whole frequencies

Compensate the phase-lag at the whole frequencies

Compensate the phase-lag only at low frequencies

Implementation method

Introduce an additional high-order-derivative feedback Gfb(s), where 그림입니다.
원본 그림의 이름: CLP000024040025.bmp
원본 그림의 크기: 가로 811pixel, 세로 157pixel

Introduce an additional first-order-derivative feedback 그림입니다.
원본 그림의 이름: CLP000024040026.bmp
원본 그림의 크기: 가로 145pixel, 세로 72pixel, where 그림입니다.
원본 그림의 이름: CLP000024040028.bmp
원본 그림의 크기: 가로 733pixel, 세로 165pixel

Introduce an additional high-pass-filter feedback 그림입니다.
원본 그림의 이름: CLP000024040029.bmp
원본 그림의 크기: 가로 124pixel, 세로 66pixel, where 그림입니다.
원본 그림의 이름: CLP00002404002a.bmp
원본 그림의 크기: 가로 484pixel, 세로 147pixel

Stability margin

Stability margin might be higher due to phase-lead induced at the whole frequencies

Stability margin is limited due to the virtual impedance is introduced in the inverter-side

Sufficient stability margin can also be achieved

Noise immunity

Poor

Medium

Good

Complexity and computational burden

High

Low

Low


그림입니다.
원본 그림의 이름: CLP00002404002f.bmp
원본 그림의 크기: 가로 1077pixel, 세로 863pixel

Fig. 12. Bode plot of the conventional feedback gain (blue) and the proposed feedback gain (red).


D. Design Procedures

A 5kW single-phase LCL-type grid-tied inverter is presented here as an example to illustrate the design procedures. The main parameters are listed in Table II.


TABLE II PARAMETERS OF THE INVERTER

Parameter

Value

Parameter

Value

Input voltage Vin

400V

Grid voltage (RMS) Vg

220V

Output power Po

5kW

Inverter-side inductor L1

750uH

Grid-side inductor L2

350uH

Filter capacitor Cf

10uF

Fundamental frequency fo

50Hz

Sampling frequency fs

20kHz

Gain of inverter bridge KPWM

400

Feedback gain of capacitor current Hic

0.027


Step 1. Design of current controller

The parameters of the current controller are properly designed under an ideal grid. A PI regulator, expressed as Gi(s)=kp+ki/s, is used for the current controller. With kp=0.015 and ki=30, the cut-off frequency of the current loop is about 1kHz and the phase margin is 54°, which ensures both good dynamic response and stability.

Step 2. Choice of the maximum grid impedance

Typically, a grid-tied inverter is required to work stably when the grid impedance varies up to a maximum of 10% per-unit (PU), which corresponds to a short circuit ratio of 10 [4], [24]. Then the maximum grid impedance can be derived as:

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As for the specifications of the grid-tied inverter in this paper, the maximum grid impedance varies by up to 3.2mH.

Step 3. Selection of the corner frequency wlp

A low-pass filter (LPF) is adopted to attenuate the influence of the inevitable noise. To achieve good noise immunity without influencing the system stability, the corner frequency wlp of the LPF is set below the resonant frequency of the LCL filter (3.3kHz) and is chosen as 1.5kHz.

Step 4. Design of the virtual impedance value Lv

The value of the virtual impedance Lv changes the stability margins of the grid-tied inverter. Under the constraint of a PM that is larger than 30° within the given range of the grid impedance (i.e., 0~3.2mH), the virtual impedance Lv can be calculated with the following function:

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where 그림입니다.
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Fig. 13. Bode plot of the grid impedance (pink) and inverter output impedance with VFFC: before adding virtual impedance (red), after adding the proposed virtual impedance (blue).



Ⅳ. SIMULATION AND EXPERIMENTAL RESULTS


A. Simulation Results

In order to verify the accuracy of the mathematical impedance modeling, the output impedance before and after adding VFFC (i.e., Zo and Zo_eq) are both tested with PSIM simulations. The PSIM simulation results and theoretical curves of the output impedance are both given in Fig. 14. It is seen that the simulation results agree with the theoretical curves pretty well, which verifies the correctness of the output impedance modeling.


Fig. 14. Comparisons of PSIM simulation results and theoretical curves: (a) Without VFFC; (b) With VFFC

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(b)


The noise immunity performances of both the conventional and proposed solutions are tested and compared, using the controller parameters listed in Table III. According to [25], the measurement noise can be modeled as a white noise with a Gaussian density function, which can be realized with the Gaussian Noise Generator module in MATLAB/Simulink. The amplitude of the noise is determined by the key parameter Variance in the Gaussian Noise Generator module. For comparison, white noise with different amplitudes, i.e., variance=0.01 and 0.05, are added to the sampled grid current (the rated amplitude is 20A) of both the conventional and proposed control. The simulation results are shown in Fig. 15 and Fig. 16, where inoise is the noise added to the sampled grid current, vmod is the modulation signal, vpcc is the PCC voltage and ig is the injected grid current. It can be seen from Fig. 15 that, with the conventional solution, the noise induced by the sampled signal is amplified, and that it significantly influences the modulation signal. With an increase of the noise amplitude, over-modulation occurs, which deteriorates the THD performance of the grid current. On the other hand, with the proposed control, the THD performance of the grid current is free of noise, as shown in Fig. 16. The simulation results fully verify that the proposed control features good noise immunity.


TABLE III CONTROLLER PARAMETERS OF THE CONVENTIONAL AND PROPOSED CONTROL

Aspects

Conventional solution

Proposed control

Parameters of PI regulator

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Parameters of the feedback link

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Fig. 15. Simulation results of the conventional solution with different noise amplitudes: (a) Variance=0.01; (b) Variance= 0.05.

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(a)

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(b)


Fig. 16. Simulation results of the proposed control with different noise amplitudes: (a) Variance=0.01; (b) Variance=0.05.

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(b)


B. Experimental Results

Experimental waveforms of the inverter under different grid conditions are shown in Fig. 17, Fig. 18 and Fig. 19. As can be seen from Fig. 17(a), when the inverter is connected to a stiff grid, the measured total harmonic distortion (THD) of the injected grid current is 2.96%. However, the increasing grid impedance results in aggravated distortions of vpcc and ig, or even instability, as shown in Fig. 18(a) and Fig. 19(a). This is because the phase margin of the grid-tied inverter is not sufficient under a weak grid. After employing the proposed control strategy, the THD of the injected grid current under a stiff grid is decreased to 2.76%, as shown in Fig. 17(b). Moreover, since enough of a phase margin is retrieved by employing the virtual impedance, the harmonics of the grid current are restrained and the current THD is less than 5%, even when the grid impedance varies up to 3.2mH, as shown in Fig. 18(b) and Fig. 19(b), which verifies the effectiveness of the proposed control.


Fig. 17. Experimental waveforms under a stiff grid: (a) Before adding control; (b) After adding the proposed control.

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Fig. 18. Experimental waveforms under a weak grid with Lg=2.4mH: (a) Before adding control; (b) After adding the proposed control

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Fig. 19. Experimental waveforms under the weakest grid with Lg=3.2mH: (a) Before adding control; (b) After adding the proposed control.

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Ⅴ. CONCLUSIONS

It is revealed that the instability induced by VFFC is mainly due to the fact that a large phase-lag is introduced and the phase margin is significantly reduced in the low- frequency range, rather than over the full band, with the stability analysis of the inverter using the impedance-based analysis method. Based on this, a high-pass-filter-based virtual impedance control, which compensates the phase-lag in the low-frequency area induced by VFFC to improve system robustness against grid impedance variations, is proposed. When compared to existing solutions with multiple high-order-derivative components, the proposed control achieves better noise immunity and easier implementation.



ACKNOWLEDGMENT

This work was supported in part by the National Natural Science Foundation of China under Grant 51677054, in part by the 13th Six Talent Peaks Project in Jiangsu Province under Grant XNY-008.



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[25] J. Yang, J. Liu, J. Zhang, N. Zhao, Y. Wang, and Q. Zheng, “Multirate digital signal processing and noise suppression for dual active bridge DC/DC converters in a power electronic traction transformer,” IEEE Trans. Power Electron., to be published.



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Jiangfeng Wang was born in Zhejiang Province, China, in 1990. He received his B.S. degree in Electrical Engineering and Automation from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 2012, where he is presently working towards his Ph.D. degree in Electrical Engineering. His current research interests include grid-tied inverter control, renewable energy generation systems and power quality.


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Yan Xing was born in Shandong Province, China, in 1964. She received her B.S. and M.S. degrees in Automation and Electrical Engineering from Tsinghua University, Beijing, China, in 1985 and 1988, respectively. She received her Ph.D. degree in Electrical Engineering from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 2000. Since 1988, she has been with the Faculty of Electrical Engineering, NUAA, and is presently working as a Professor in the College of Automation Engineering. She has published three books and authored more than 100 technical papers published in journals and conference proceedings. Her current research interests include topologies and control for dc-dc and dc-ac converters. Dr. Xing is an Associate Editor of the IEEE Transactions on Power Electronics and Journal of Power Electronics. She is a Member of the Committee on Renewable Energy Systems within the IEEE Industrial Electronics Society.


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Li Zhang received his B.S. and Ph.D. degrees in Electrical Engineering from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 2007 and 2012, respectively. He joined the Faculty of Electrical Engineering, Hohai University, Nanjing, China, in 2014, where he is presently working as a Professor. From October 2012 to September 2014, he was a Post-Doctoral Research Fellow in the Department of Electrical Engineering, Tsinghua University, Beijing, China. From July to August 2012, he was a Visiting Scholar of Electrical Engineering in the Department of Energy Technology, Aalborg University, Aalborg, Denmark. From October 2016 to October 2017, he was a Visiting Scholar of Electrical Engineering in the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Canada. His current research interests include topologies and control of dc-ac converters and distributed generation technology. Dr. Zhang was a recipient of the IEEE Transactions on Power Electronics Outstanding Reviewer Award in 2014.


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Haibing Hu received his B.S. degree in Industrial Automation from the Hunan University of Technology, Zhuzhou, China, in 1995; and his M.S. and Ph.D. degrees in Electrical Engineering from Zhejiang University, Hangzhou, China, in 2003 and 2007, respectively. From 2007 to 2009, he was an Assistant Professor in the Department of Control Engineering, Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China. From 2009 to 2014, he was an Associate Professor in same department, where he is presently working as a Professor. From 2009 to 2012 and from 2016 to 2017, he was a Senior Research Fellow in the Department of Electrical Engineering, University of Central Florida, Orlando, FL, USA. His current research interests include digital control in power electronics, multilevel inverters, digital control system integration for power electronics, the application of power electronics in distributed energy systems and power quality. Dr. Hu has authored or coauthored more than 100 technical papers published in journals and conference proceedings.


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Tianyu Yang was born in Jiangsu Province, China, in 1994. He received his B.S. degree in Electrical Engineering from the Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China, in 2016, where he is presently working toward his M.S. degree in Electrical Engineering and Power Drives. His current research interests include the modulation and control of AC-DC converters and power quality.


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Daorong Lu was born in Jiangsu Province, China, in 1991. He received his B.S. degree in Electrical Engineering from Nanjing Normal University, Nanjing, China, in 2013. He is presently working towards his Ph.D. degree in Electrical Engineering in the College of Automation Engineering, Nanjing University of Aeronautics and Astronautics (NUAA), Nanjing, China. His current research interests include topologies and control of multilevel converters.