사각형입니다.

https://doi.org/10.6113/JPE.2018.18.6.1855

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Multi-Function Distributed Generation with Active Power Filter and Reactive Power Compensator


Shengli Huang* and Jianguo Luo


†,*School of Mechanical and Electrical Eng., North China Institute of Science and Technology, Beijing, China



Abstract

This paper presents a control strategy for voltage-controlled multi-function distributed generation (DG) combined with an active power filter (APF) and a reactive power compensator. The control strategy is based on droop control. As a result of local nonlinear loads, the voltages of the point of common coupling (PCC) and the currents injecting into the grid by the DG are distorted. The power quality of the PCC voltage can be enhanced by using PCC harmonic compensation. In addition, with the PCC harmonic compensation, the DG offers a low-impedance path for harmonic currents. Therefore, the DG absorbs most of the harmonic currents generated by local loads, and the total harmonic distortion (THD) of the grid connected current is dramatically reduced. Furthermore, by regulating the reactive power of the DG, the magnitude of the PCC voltage can be maintained at its nominal value. The performance of the DG with the proposed control strategy is analyzed by bode diagrams. Finally, simulation and experimental results verify the proposed control strategy.


Key words: Active power filter, Reactive power compensation voltage-source inverter


Manuscript received Jan. 30, 2018; accepted Jul. 17, 2018

Recommended for publication by Associate Editor Jongbok Baek.

Corresponding Author: luojg_1598@126.com Tel: +86-10-6159-4927,Fax: +86-10-6159-1483, North China Institute of Science and Technology

*School of Mechanical and Electrical Engineering, North China Institute of Science and Technology, China



Ⅰ. INTRODUCTION

Distributed generation (DG) is becoming a competitive option when compared to conventional centralized power systems due to its flexibility, low emission cost, and high reliability [1]. The power produced by DG should meet requirements in terms of power quality. DGs sourced by energy storage system can be used to improve the power quality [2]-[4]. However, the harmonic currents may result in additional losses in the power cables and transformers. In recent years, the DG working as voltage source is widely used due to its flexible operation and seamless transfer [5], [6]. It is based on P-ω and Q-E droop control, which does not require any external references to synchronize. However, the closed-loop power droop control cannot shape voltage or current waveforms especially under nonlinear loads. Therefore, nonlinear local loads have a negative impact on the power quality of DG output voltage with conventional power droop control.

DG is an important concept for future smart grids. It should provide reliable power supply with better power quality to local loads. The widely used diode rectifier loads result in poor voltage quality. By regulating the output impedance of a DG, the DG can share the harmonic load currents with the grid [7]. Parallel-connected DGs have the ability to achieve auxiliary functions such as voltage unbalance correction and harmonic current compensation [8]. Furthermore, the unified power flow controller (UPFC) [9], [10] and the unified power quality conditioner (UPQC) [11], [12] are utilized to compensate for harmonic voltages, voltage sags, and reactive power. The power quality for DGs is becoming a focus for concern. The widely used method for dealing with this issue is to install auxiliary power quality converters. However, this method is not cost effective. Actually, most of the time, DGs do not work with their full capacity. The remaining capacity can be used to improve power quality instead of installation of extra converters [13].

APF and reactive power compensation have been studied for many years [14]-[16]. The shunt active filter, which is classified as voltage detection and current detection, is an important scheme to suppress harmonic currents. Most shunt active filters are based on current detection control, and they are intrinsically AC current sources for counteracting the harmonic components generated by loads. However, they have to detect currents through loads to obtain current references.

H. Akagi has compared the voltage detection and current detection in [17]. He concludes that voltage detection is more flexible for achieving harmonic compensation and harmonic damping. Harmonic voltages can be mitigated at the point of APF installation. However, the harmonics may be amplified at the bus where no APF is installed. The installation sites have an impact on the performance of the active filter for multi-bus power systems [18]-[21]. The installation of an APF at the terminal of the bus or in the vicinity of loads generating harmonics is effective for mitigating harmonic voltages and currents [17], [22]. The Static synchronous compensator (STATCOM) is one of the most effective solutions to regulate line voltage. The main circuit of a STATCOM can be voltage source inverters (VSIs), which can also work as a shunt active filter. Therefore, an APF performing both harmonic damping and voltage regulation was proposed in [23].

A DG and active filter can be combined into a unit to achieve all of the control objectives. However, shunt active filters with the above mentioned voltage detection still work as current sources. This paper proposes a multi-function control strategy for DGs working as a voltage source to transfer power into the grid and to achieve active power filter and reactive power compensation. The control strategy is based on droop control. The DG is installed in the vicinity of local loads. By measuring the PCC voltage, the DG provides a path for the harmonic currents generated by local loads rather than injecting them into the grid. Furthermore, the PCC voltage magnitude is regulated by adjusting the reactive power of the DG. This paper is organized as follows. The configuration of the DG system and its control strategy are illustrated in Section II. Section III analyzes the performance of the DG and explains the principle of the control strategy. Simulation and experimental results are provided in Section IV and Section V, respectively. Finally, some conclusions are given in Section VI.



Ⅱ. CONTROL SCHEME OF THE DISTRIBUTED GENERATION SYSTEM

Fig. 1 shows a distributed generation system. The DG is connected to a grid with a three-phase power electronics inverter. ZGrid represents the line impedance of the grid side, and ZDG represents the DG impedance connected at the point of common coupling (PCC). In addition, L, r and C represent the per-phase inductance, resistance and capacitance of the LC filter.


그림입니다.
원본 그림의 이름: CLP000003040391.bmp
원본 그림의 크기: 가로 1531pixel, 세로 395pixel

Fig. 1. Distributed generation system.


The control scheme of a DG is shown in Fig. 2. This scheme consists of multi-loop control. The references of the inner current control loops in the synchronous d-q frame are given by the outputs of the voltage control loops, whose references are obtained by the power control loop outputs and PCC voltage control loop in view of the virtual impedance. The virtual impedance is to achieve P-Q decoupling [24]. vd and vq are the DG voltages transformed in the d-q frame, iLd and iLq are the filter inductor currents in the d-q frame, and id and iq are the DG output currents in the d-q frame. The power control loop is implemented by the P-ω and Q-E droop control, where P* and Q* are the active power and reactive power references of the DG. P* is determined by the available capacity of the primary resource. Q* is determined by the output of the PCC voltage magnitude controller, where VmPCC is the magnitude of the PCC voltage and V* is the nominal voltage magnitude. The magnitude of the PCC voltage can be kept at its nominal value by regulating the reactive power of the DG, so the DG can work as a reactive power compensator. Considering the voltage droop across the transmission line impedance of the grid, the DG has to release reactive power to raise the PCC voltage when local loads consume active power from the grid. On the other hand, the DG draws reactive power to reduce the PCC voltage when the DG injects active power into the grid.


그림입니다.
원본 그림의 이름: CLP000003040002.bmp
원본 그림의 크기: 가로 1649pixel, 세로 1013pixel

Fig. 2. Control diagram of a distributed generation system.


As can be seen from Fig. 2, the closed-loop power droop control cannot shape both the voltage and current waveforms. As a result, the quality of the current injected into the grid is sensitive to the PCC voltage and the local load. Nonlinear local loads distort the PCC voltage, which results in distortion of the grid current. In order to mitigate this distortion, a PCC harmonic voltage compensation is shown in Fig. 2, where the APF function is realized by means of voltage detection. vPCCd and vPCCq are the PCC voltages in the d-q frame. The resonant controller is expressed as:

그림입니다.
원본 그림의 이름: CLP000003040001.bmp
원본 그림의 크기: 가로 877pixel, 세로 172pixel   (1)

where ω* is the fundamental frequency, and Kh is the gain for the h-order harmonics. The -5th and +7th harmonic components are transferred to the 6th harmonic component, and the -11th and +13th harmonic components are transferred to the 12th harmonic component based on PARK transformations [25]. Therefore, in order to suppress the -5, +7, -11 and +13 order harmonic voltages, the resonant control only needs to suppress the 6-order and 12-order harmonics in the d-q frame. As can be seen in Fig. 2, vPCCd and vPCCq are compared with zero and the errors are compensated by the resonant controller. The outputs of the resonant controller together with the output of the power droop controller generate the DG voltage references. The rectifier loads are typical loads in the power system. When it is sourced by a balanced three-phase voltage source, the harmonic voltage is mainly distributed in the 5, 7, 11 and 13 harmonics. Therefore, by using the proposed control loop, the main harmonics voltage can be compensated.

Theoretically, employing a PI controller can achieve zero error tracking in the d-q frame. However, with PCC harmonic compensation, the DG references 그림입니다.
원본 그림의 이름: CLP000003040004.bmp
원본 그림의 크기: 가로 116pixel, 세로 99pixel and 그림입니다.
원본 그림의 이름: CLP000003040005.bmp
원본 그림의 크기: 가로 118pixel, 세로 103pixel contain both DC component and the 6-order and 12-order harmonics. In order to achieve zero-error voltage tracking, a proportional-integral plus resonant (PIR) controller is implemented as:

그림입니다.
원본 그림의 이름: CLP000003040006.bmp
원본 그림의 크기: 가로 1129pixel, 세로 167pixel           (2)

When the PCC harmonic voltages are mitigated, the DG can be viewed as low-impedances resistors at harmonic frequencies. Therefore, the DG can absorb most of the harmonic currents. It works like an R-APF (Resistance Active Power Filter) [26]. Therefore, the distortion of the grid current is mitigated. A detailed analysis is given in the following section.



Ⅲ. ANALYSIS OF THE PROPOSED CONTROL STRATEGY


A. PCC Harmonic Compensation

Fig. 2 illustrates the implementation of the control strategy for a DG in the d-q frame. In both the d-axis and q-axis, the control strategies are viewed as DC components, and the harmonic components are 6h-order (h=1,2,3…). Ignoring the coupling factors, the control strategies of the d-axis and q-axis have the same structures. An equivalent control diagram of the DG in the d-axis and q-axis is depicted in Fig. 3. Moreover, the analysis of the control strategies in both the d-axis and q-axis can be illustrated as shown in Fig. 3. An equivalent circuit of the system is depicted in Fig. 4. The following analysis is in terms of Fig. 3 and Fig. 4. In both the d-axis and q-axis, with the closed loop control, the DG voltage can be written by:


그림입니다.
원본 그림의 이름: CLP000003040003.bmp
원본 그림의 크기: 가로 1884pixel, 세로 447pixel

Fig. 3. Equivalent control strategy of DG in both the d-axis and q-axis.


그림입니다.
원본 그림의 이름: image8.emf
원본 그림의 크기: 가로 171pixel, 세로 79pixel

Fig. 4. Equivalent circuit of the system.


그림입니다.
원본 그림의 이름: CLP000003040007.bmp
원본 그림의 크기: 가로 775pixel, 세로 83pixel          (3)

where GDG(s) is the closed-loop transfer function, and Zo(s) is the DG output impedance. According to Fig. 3, GDG(s) and Zo(s) are denoted as:

그림입니다.
원본 그림의 이름: CLP000003040008.bmp
원본 그림의 크기: 가로 1360pixel, 세로 191pixel       (4)

그림입니다.
원본 그림의 이름: CLP000003040009.bmp
원본 그림의 크기: 가로 1321pixel, 세로 172pixel         (5)

where Gic(s)= 그림입니다.
원본 그림의 이름: CLP00000304000a.bmp
원본 그림의 크기: 가로 198pixel, 세로 134pixel is the controller of the inner current control loop, Gp(s)= 그림입니다.
원본 그림의 이름: CLP00000304000b.bmp
원본 그림의 크기: 가로 159pixel, 세로 133pixel, and Gc(s)= 그림입니다.
원본 그림의 이름: CLP00000304000c.bmp
원본 그림의 크기: 가로 89pixel, 세로 128pixel. Without the proposed control strategy, Vref =Vref*. However, with the proposed control strategy, the voltage reference is expressed as:

그림입니다.
원본 그림의 이름: CLP00000304000d.bmp
원본 그림의 크기: 가로 756pixel, 세로 105pixel       (6)

According to Fig. 4, the PCC voltage is written by:

그림입니다.
원본 그림의 이름: CLP00000304000e.bmp
원본 그림의 크기: 가로 1113pixel, 세로 368pixel       (7)

where ZDG = 그림입니다.
원본 그림의 이름: CLP00000304000f.bmp
원본 그림의 크기: 가로 300pixel, 세로 87pixel and ZGrid = 그림입니다.
원본 그림의 이름: CLP000003040010.bmp
원본 그림의 크기: 가로 223pixel, 세로 87pixel. When compared with line impedances ZGrid and ZDG, the load impedance ZLOAD is much larger. Therefore, (7) can be simplified as:

그림입니다.
원본 그림의 이름: CLP000003040011.bmp
원본 그림의 크기: 가로 737pixel, 세로 84pixel        (8)

where 그림입니다.
원본 그림의 이름: CLP000003040012.bmp
원본 그림의 크기: 가로 473pixel, 세로 169pixel, 그림입니다.
원본 그림의 이름: CLP000003040013.bmp
원본 그림의 크기: 가로 454pixel, 세로 161pixel.

With the proposed control strategy, substituting (3) and (6) into (8) leads to:

그림입니다.
원본 그림의 이름: CLP000003040014.bmp
원본 그림의 크기: 가로 1474pixel, 세로 374pixel   (9)

Moreover, without PCC harmonic compensation, the PCC voltage is expressed as:

그림입니다.
원본 그림의 이름: CLP000003040015.bmp
원본 그림의 크기: 가로 1325pixel, 세로 84pixel        (10)

With PCC harmonic compensation, the transfer function of the PCC voltage to the DG voltage reference is written as GvH (s) =그림입니다.
원본 그림의 이름: CLP000003040016.bmp
원본 그림의 크기: 가로 528pixel, 세로 149pixel, the transfer function of the PCC voltage to the grid voltage is written as GgH(s)= 그림입니다.
원본 그림의 이름: CLP000003040017.bmp
원본 그림의 크기: 가로 558pixel, 세로 143pixel, and the equivalent impedance of the DG at the PCC is expressed as ZH(s) =그림입니다.
원본 그림의 이름: CLP000003040018.bmp
원본 그림의 크기: 가로 534pixel, 세로 146pixel. Without PCC harmonic compensation, the transfer function of the PCC voltage to the DG voltage reference is written as GvN(s) = 그림입니다.
원본 그림의 이름: CLP00000304001a.bmp
원본 그림의 크기: 가로 335pixel, 세로 72pixel, the transfer function of the PCC voltage to the grid voltage is written as GgN(s) = 그림입니다.
원본 그림의 이름: CLP00000304001b.bmp
원본 그림의 크기: 가로 131pixel, 세로 72pixel, and the equivalent impedance of the DG at the PCC is expressed as ZN(s) = 그림입니다.
원본 그림의 이름: CLP00000304001c.bmp
원본 그림의 크기: 가로 268pixel, 세로 59pixel.

According to the system specifications in Table I, bode diagrams of GvH(s) and GvN(s) are depicted in Fig. 5, bode diagrams of GgH(s) and GgN(s) are illustrated in Fig. 6, and bode diagrams of ZH(s) and ZN(s) are depicted in Fig. 7. As can be seen in Fig. 5 and Fig. 6, without the proposed PCC harmonic compensation, the transfer functions have lower magnitudes at harmonic frequencies than those with the proposed strategy, which indicates that the PCC harmonic voltages is attenuated. The disturbances caused by the DG, the grid, and the local loads are rejected. Therefore, the PCC voltage quality is improved.


TABLE I SYSTEM SPECIFICATIONS

Items

Value

Items

Value

L

2mH

r

0.5Ω

C

60uF

ω*

314.16 rad/sx(50Hz)

ZDG

0.2+j 0.628 (0.2Ω+2mH)

ZGrid

1+j1.256 (1Ω+4mH)

kcp

13

kci

100

kp

0.2

ki

50

Kv6

4

Kv12

2

ωv6

50 rad/s

ωv12

100 rad/s

K6

50

K12

10

ω6

10 rad/s

ω12

20 rad/s


그림입니다.
원본 그림의 이름: image24.emf
원본 그림의 크기: 가로 673pixel, 세로 346pixel

Fig. 5. Bode diagram of the PCC voltage to the DG reference.


그림입니다.
원본 그림의 이름: image25.emf
원본 그림의 크기: 가로 667pixel, 세로 342pixel

Fig. 6. Bode diagram of the PCC voltage to the grid voltage.


그림입니다.
원본 그림의 이름: image26.emf
원본 그림의 크기: 가로 671pixel, 세로 505pixel

Fig. 7. Impedance of the PCC at the DG side.


As can be seen in Fig. 7, with PCC harmonic compensation, the equivalent impedance of the DG at the PCC has lower magnitudes at harmonic frequencies, and the phase is close to zero degree at those frequencies. This means that the equivalent impedance of the DG at harmonic frequencies is very small. Therefore, the DG can absorb most of the harmonic currents. This has the same function as the R-APF. With an increase of the resonant controller gain, the magnitude of the impedance at the harmonic frequencies decreases. The grid harmonic currents are further attenuated.


B. Reactive Power Compensation

When the DG injects active power into the grid, the voltage vectors without and with reactive power compensation are depicted in Fig. 8 and Fig. 9, respectively, where igd and igq represent grid currents transformed into the d-q frame. Without reactive power compensation, the PCC voltage vector is equal to the grid voltage vector plus the voltage drop vector across the grid impedance. Therefore, the magnitude of the PCC voltage increases. With reactive power compensation, the DG can emulate the characteristic of the inductor to absorb reactive power. As can be seen in Fig. 9, the magnitude of the PCC voltage is reduced by reactive power compensation. Therefore, the DG should have sufficient capacity to fix the magnitude of the PCC voltage. The PCC voltage vector can be expressed as:


그림입니다.
원본 그림의 이름: CLP000017802d23.bmp
원본 그림의 크기: 가로 821pixel, 세로 600pixel

Fig. 8. Voltage vector without reactive power compensation.


그림입니다.
원본 그림의 이름: CLP000017800001.bmp
원본 그림의 크기: 가로 798pixel, 세로 580pixel

Fig. 9. Voltage vector with reactive power compensation.


그림입니다.
원본 그림의 이름: CLP000017800002.bmp
원본 그림의 크기: 가로 743pixel, 세로 94pixel        (11)

where 그림입니다.
원본 그림의 이름: CLP000017800003.bmp
원본 그림의 크기: 가로 475pixel, 세로 84pixel, 그림입니다.
원본 그림의 이름: CLP000017800004.bmp
원본 그림의 크기: 가로 158pixel, 세로 81pixel, and 그림입니다.
원본 그림의 이름: CLP000003040022.bmp
원본 그림의 크기: 가로 364pixel, 세로 79pixel. |Vg| is the magnitude of the grid voltage. Therefore, the following expressions can be achieved:

그림입니다.
원본 그림의 이름: CLP000003040023.bmp
원본 그림의 크기: 가로 650pixel, 세로 83pixel   (12)

그림입니다.
원본 그림의 이름: CLP000003040024.bmp
원본 그림의 크기: 가로 524pixel, 세로 75pixel       (13)

With reactive power compensation, the magnitude of the PCC voltage is equal to the nominal value:

그림입니다.
원본 그림의 이름: CLP000003040025.bmp
원본 그림의 크기: 가로 516pixel, 세로 120pixel        (14)

Substituting (12) and (13) into (14), igq is expressed as:

그림입니다.
원본 그림의 이름: CLP000003040026.bmp
원본 그림의 크기: 가로 1418pixel, 세로 175pixel        (15)

For simplicity, igd can be approximately expressed as:

그림입니다.
원본 그림의 이름: CLP000003040027.bmp
원본 그림의 크기: 가로 355pixel, 세로 157pixel     (16)

where PL is the active power of the local load. Substituting (16) into (15), the value of igq can be obtained. The reactive power supplied by the DG is derived as:

그림입니다.
원본 그림의 이름: CLP000003040028.bmp
원본 그림의 크기: 가로 691pixel, 세로 87pixel          (17)

where QL is the reactive power of the local load. In order to regulate the magnitude of the PCC voltage, the DG capacity should be satisfied as follows: 그림입니다.
원본 그림의 이름: CLP000003040029.bmp
원본 그림의 크기: 가로 411pixel, 세로 104pixel, where SDG represents the capacity of the DG.



Ⅳ. SIMULATION VERIFICATION

Simulations are done by MATLAB/Simulink to verify the proposed control strategy. The main circuit of the system is shown in Fig. 1. The specification of the system is shown in Table I. The line-to-line grid voltage is 380V/50Hz. The active power of the DG is 3.5kW.

Simulation results are shown in Fig. 10 through Fig. 13, when the local load is a three-phase diode rectifier load with a 1000μF capacitor parallel-connected with a 290Ω resistor. As can be seen in Fig. 10(a), Fig. 11(a) and Fig. 12(a), the load currents are not sinusoid waveforms. Fig. 10 shows simulation results without PCC harmonic compensation or reactive power compensation. Before 0.05s, the grid supplies power for the local load. At 0.05s, the DG is connected with the PCC. After that, the DG supplies power for the load and injects power into the grid. The currents injected into the grid are preferred to be a pure sinusoidal waveform. However, due to nonlinear loads, the grid connected currents and the PCC voltages are distorted. The THD of the grid connected current is 20.58%. In order to clearly show the harmonic component, the tops of Figs. 10(c), Fig. 11(c) and Fig. 12(c) are cut out. Both the DG and the grid supply paths for distorted current are generated from the nonlinear load.


Fig. 10. Simulation results without PCC harmonic compensation or reactive power compensation: (a) DG currents and grid currents in the transient and steady states; (b) Line-to-line voltages of the DG and PCC; (c) THD of the grid current.

묶음 개체입니다.

(a)

그림입니다.
원본 그림의 이름: image48.emf
원본 그림의 크기: 가로 715pixel, 세로 310pixel

(b)

그림입니다.
원본 그림의 이름: image49.emf
원본 그림의 크기: 가로 718pixel, 세로 320pixel

(c)


Fig. 11. Simulation results with PCC harmonic compensation but without voltage magnitude control: (a) DG currents and grid currents in the transient and steady states; (b) Line-to-line voltages of the DG and PCC in the steady state; (c) THD of the grid current; (d) Output power of the DG and the magnitude of the PCC voltage.

묶음 개체입니다.

(a)

그림입니다.
원본 그림의 이름: image52.emf
원본 그림의 크기: 가로 705pixel, 세로 301pixel

(b)

그림입니다.
원본 그림의 이름: image53.emf
원본 그림의 크기: 가로 709pixel, 세로 320pixel

(c)

그림입니다.
원본 그림의 이름: image54.emf
원본 그림의 크기: 가로 1221pixel, 세로 576pixel

(d)


Fig. 12. Simulation results with PCC harmonic compensation and voltage magnitude control: (a) DG currents and grid currents in transient and steady states; (b) Line-to-line voltages of the DG and PCC; (c) THD of the grid current; (d) Output power of the DG and the magnitude of the PCC voltage.

묶음 개체입니다.

(a)

그림입니다.
원본 그림의 이름: image57.emf
원본 그림의 크기: 가로 711pixel, 세로 306pixel

(b)

그림입니다.
원본 그림의 이름: image58.emf
원본 그림의 크기: 가로 709pixel, 세로 322pixel

(c)

그림입니다.
원본 그림의 이름: image59.emf
원본 그림의 크기: 가로 1235pixel, 세로 548pixel

(d)


그림입니다.
원본 그림의 이름: image60.emf
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Fig. 13. Dynamic response during a grid fluctuation.


Fig. 11 shows simulation results with PCC harmonic compensation but without reactive power compensation. As can be seen in Fig. 11(a), the DG provides all of the harmonic currents for the load instead of the grid. Therefore, the distortion of the grid connected current is suppressed. As shown in Fig. 11(c), the THD of the grid current is 3.30%. In Fig. 11(b), the DG output voltages are distorted with the PCC harmonic compensation. However, the harmonic voltages of the PCC are eliminated. In Fig. 11(d), the PCC voltage magnitude is larger than its nominal value when the DG injects only active power into the grid.

Fig. 12 shows simulation results with both PCC harmonic and reactive power compensation. With reactive power compensation, the DG fixes the PCC voltage magnitude by regulating the reactive power of the DG. As can be seen in Fig. 12(a) and Fig. 12(b), there is a phase error between the output current and the PCC voltage, which indicates that the DG generates both active power and reactive power. In addition, the DG is also capable of improving the power quality of the grid currents and the PCC voltages (THD). As shown in Fig. 12(d), before 0.05s, the DG is not connected with the system. The grid supplies all of the power for the loads. Due to the voltage drop across the grid transmission line, the magnitude of the PCC voltage is less than the nominal value. After 0.05s, the DG is inserted into the system and the DG begins to supply reactive power to fix the magnitude of the PCC voltage. Thus, the PCC voltage magnitude is regulated to its nominal value.

Fig. 13 shows the dynamic response during a grid fluctuation, when the local load is a 1000W resistive load. Before 0.6s, the magnitude of the grid voltage is equal to its nominal value. At 0.6s, the magnitude drops down to 375V. Due to the reactive power compensation, the magnitude of the PCC voltage can be regulated to be 380V regardless of the fluctuation of the grid. Moreover, the active power of the DG tracks its set point. According to (17), when the grid voltage magnitude is 380V, the DG must supply a reactive power of -1941var in order to fix the magnitude of the PCC voltage. When the grid voltage magnitude is 375V, the DG must supply a reactive power of -443var. As can be seen in the steady state shown in Fig. 13, the DG injects a reactive power of -1920var before 0.6s, and a reactive power of -440var after 0.6s. These simulation results agree well with the calculations. The error between the simulated and calculated results is caused by the approximate calculation in (16).

Fig. 14 shows simulation results for a nonlinear load step change. At 0.4s, the nonlinear load is increased from 1kW to 1.5kW. The active power of the inverter is still 3.5kW. With an increase of the nonlinear load, the grid current is decreased. The active power tracks the active power reference. Therefore, the control strategy can achieve a good transient response.


Fig. 14. Simulation results for a nonlinear load step change.

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Ⅴ. EXPERIMENTAL VERIFICATION

A laboratory prototype is built to verify the effectiveness of the proposed control strategy. The experimental setup is shown in Fig. 15. The input DC voltage of the inverter is provided by a PWM rectifier sourced by the grid. The line impedance is emulated by a series inductor. The specifications of the system and the local load are the same as those of the simulation in Section IV. The controller of the DG is implemented by a DSP TMS320F2812.


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Fig. 15. Experimental setup.


Fig. 16 shows experimental results without PCC harmonic compensation or reactive power compensation. As can be seen, a local nonlinear load has a negative impact on the current injected into the grid and the voltage quality of the PCC. The currents of the grid and the DG are distorted. As can be seen in Fig. 17, with harmonic compensation, the voltage quality of the PCC is improved. The DG provides almost all of the harmonic current for the local loads. Therefore, the gird harmonic current is mitigated. The power quality of the current into the grid is improved. Fig. 18 shows the THD of the grid current. The THD is improved to 2.2%.


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Fig. 16. Experimental results without PCC harmonic compensation or reactive power compensation.


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Fig. 17. Experimental results with PCC harmonic compensation but without reactive power compensation.


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Fig. 18. THD of the grid current.


Fig. 19 shows experimental results with PCC harmonic compensation and reactive power compensation. When the DG injects active power into the grid, the DG must absorb reactive power to maintain the magnitude of the PCC voltage. The experimental results shown in Fig. 19 coincide with the simulation results in Fig. 12.


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Fig. 19. Experimental results with PCC harmonic compensation and reactive power compensation.


Fig. 20 shows the dynamic response of the system with PCC harmonic compensation but without reactive power compensation in the presence of a capacitive load step change. At the time of t1, a -800var capacitive load is injected into the PCC bus. The capacitive load generates reactive power into the grid. This raises the magnitude of the PCC voltage due to the increase of the voltage drop across the grid line impedance. Fig. 21 shows response of the system with PCC harmonic compensation and reactive power compensation. At the time of t2, a -800var capacitive load is injected into the PCC bus. Due to the voltage magnitude control, the magnitude of the PCC voltage is regulated at its nominal value. The reactive power generated by the capacitive load is drawn by the DG.


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Fig. 20. Response of the system with PCC harmonic compensation but without reactive power compensation in the presence of a capacitive load step change.


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Fig. 21. Response of the system with PCC harmonic compensation and reactive power compensation in the presence of a capacitive load step change.



Ⅵ. CONCLUSION

This paper proposes a multi-function control strategy for a voltage-controlled DG to improve the power quality of the PCC voltages and grid-connected currents. The APF control strategy based on a voltage-controlled DG is implemented based solely on the PCC voltage measurement. This control is very simple and easy to be combined with conventional power droop control. The DG supplies a lower impedance path for harmonics than the grid. Thus, the THD of the grid connected current can be dramatically mitigated. Meanwhile, reactive power compensation is also integrated into the control strategy in order to fix the magnitude of the PCC voltage. With the reactive power compensation, the magnitude of the PCC is robust, and the fluctuation or flicker of the PCC voltage is eliminated. In addition, the performance of the DG has been demonstrated in a bode diagram. The capacity of the DG should be evaluated for the whole system design. The effectiveness of the proposed multi-function strategy for DG is verified by both the simulation and experimental results.



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Shengli Huang was born in Henan, China, in 1979. He received his Ph.D. degree from the Institute of Electrical Engineering, Chinese Academy of Sciences, Beijing, China, in 2009. He is presently working as an Associate Professor at the North China Institute of Science and Technology, Beijing, China. His current research interests include power electronic converters and motor control.


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Jianguo Luo was born in Hunan, China, in 1977. He received his Ph.D. degree from Beihang University, Beijing, China, in 2008. He is presently working as an Associate Professor at the North China Institute of Science and Technology, Beijing, China. His current research interests include mechanical, electrical and robotic technologies.