https://doi.org/10.6113/JPE.2018.18.6.1901

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Improved Circuit Model for Simulating IGBT Switching Transients in VSCs

Naushath Mohamed Haleem^†, Athula D. Rajapakse^*, and Aniruddha M. Gole^*

^†,*Department of Electrical and Computer Engineering, University of Manitoba, Winnipeg, Canada

Abstract

This study presents a circuit model for simulating the switching transients of insulated-gate bipolar transistors (IGBTs) with inductive load switching. The modeling approach used in this study considers the behavior of IGBTs and freewheeling diodes during the transient process and ignores the complex semiconductor physics-based relationships and parameters. The proposed circuit model can accurately simulate the switching behavior due to the detailed consideration of device–circuit interactions and the nonlinear nature of model parameters, such as internal capacitances. The developed model is incorporated in an IGBT loss calculation module of an electromagnetic transient simulation program to enable the estimation of switching losses in voltage source converters embedded in large power systems.

Key words: Electromagnetic Transient Program, Insulated-gate bipolar transistor, Insulated-gate bipolar transistor modeling, Switching loss, Voltage source converter

Manuscript received Aug. 12, 2017; accepted Jul. 17, 2018

Recommended for publication by Associate Editor Sang-Won Yoon.

^†Corresponding Author: umnausha@myumanitoba.ca Tel: +1-2044801403, University of Manitoba

*Dept. of Electr. & Computer Eng., University of Manitoba, Canada

Ⅰ. INTRODUCTION

Voltage source converters (VSCs) are widely applied in power systems due to their several advantages, including the absence of commutation failures, independent control of active and reactive power, and fast dynamic response [1]. An insulated-gate bipolar transistor (IGBT) is a power electronic switch that is used in VSC applications in the range of a few kilowatts to hundreds of megawatts [2]. Switching losses constitute a remarkable portion of power losses in two-level VSCs that operate at high switching frequencies. They represent a serious concern even in multi-level modular converters (MMCs) that operate at low switching frequencies because of the large number of switches operating in a cycle. The instantaneous power dissipated during a switching transient could increase to several megawatts in large capacity IGBTs used in power systems [3], and the losses are dependent on the characteristics of the IGBT and on the gate drive and stray inductances in the circuit. The thermal management systems of converters are designed and manufactured with relatively low safety margins due to economic reasons [4]. Therefore, the switching loss component should be accurately estimated in designing the cooling systems for IGBTs in VSCs.

Power systems with embedded power electronic converters are typically simulated through electromagnetic transient (EMT) simulation programs [5]. In these programs, IGBT devices are represented as simple switches, and switching losses are impossible to determine [4]. The losses in large power electronic systems operating under realistic conditions can be assessed when a switch model could be modified in such a way that its losses can be estimated [5]. The accurate estimation of switching losses and corresponding thermal stresses of IGBT switches in converters can aid in the identification of failure risks at the design stage and can appropriately refine thermal management systems. During the operational stage, loss estimation facilities can perform simulations to help identify the regions that are safe for converter operation.

The three key requirements of an estimation model for IGBT switching losses in a circuit simulation program are as follows: (i) manageable level of model complexity, (ii) accessibility to model parameters, and (iii) accurate estimation of switching losses. The techniques used in different research papers that developed models of IGBT switching losses can be broadly classified as (i) empirical models that fit appropriate curves to actual loss measurements [6]-[9], (ii) circuit models that simulate the waveforms of switching transients [10]-[14], and (iii) semiconductor physics-based dynamic models that employ partial differential equations for modeling internal fields and charge distributions [15], [16].

In empirical modeling, the total device power losses or switching energy losses estimated from experimental measurements conducted under certain test conditions are fitted as load current functions because the supply voltage is fixed for two-level converters [12], [13]. Empirical models only require a few model parameters and minimal computational effort. However, the reliance on switching loss variations versus load current characteristics specified in data sheets [13], [15] or on measurements obtained from particular test circuits hinders the use of these models as generic design tools because under such condition, the impact of the gate drives and stray inductances of actual converters is ignored.

Semiconductor physics-based models, which use partial differential equations of time and space to model the dynamic behavior of switching devices, should be simulated at small time steps. In addition, they are generally more complex than circuit models are. A major drawback of physics-based models is the need for a large number of inaccessible and unfamiliar parameters [15], [16].

Circuit models use basic circuit elements to mimic the transient behavior of switching devices and their interactions with gate drives and external circuits. These models estimate the transient trajectories of terminal voltages and currents and use them to estimate energy losses. These models are suitable as design tools because external factors such as stray inductances and gate drive characteristics can be incorporated. Circuit models that rely on Simulation Program with Integrated Circuit Emphasis (SPICE)-like library components of bipolar junction transistors (BJT) and metal-oxide-semiconductor field-effect-transistors (MOSFET) [10] cannot be directly implemented in EMT programs. Any circuit model that calculates switching transient waveforms should be solved in small time steps (several nanoseconds). Therefore, the circuit models of IGBTs cannot be incorporated in large power system simulations conducted in EMT simulation programs without severely increasing the computational time. Nevertheless, a combination of lookup tables and circuit models can be used with pre- and post-switching IGBT voltages and currents obtained through EMT simulations running with an ideal switch model [5].

This study presents a circuit model that simulates the switching behavior of IGBTs during different phases. An approximated circuit model that mimics the important process of each phase is utilized. The proposed model considers the gate drive performance and stray inductances of PCBs. An accurate prediction of collector-to-emitter voltage changes is conducted by mimicking the nonlinear nature of switching capacitances. Furthermore, a systematic model parameter extraction process is implemented. The electro-thermal behavior of an IGBT in a VSC can be simulated by using a thermal model of the IGBT and by considering the temperature dependency of model parameters, as proposed in [5].

Ⅱ. OUTLINE OF THE MODELING APPROACH

A. Transient Behavior of Turn-on Switching Event

Although six pairs of switches (IGBT and antiparallel diode) are required in a three-phase VSC, the switches connected to each phase operate independently. One of the antiparallel diodes provides a conductive path for continuous inductive load currents when an IGBT is off. During a turn-on transition, the load current is transferred from a freewheeling diode to the IGBT in the opposite arm of the same phase. An opposite condition occurs during the turn-off transition. Given the independent nature of each arm, the circuit shown in Fig. 1 can be used to characterize the switching behavior of a VSC. The circuit in Fig. 1 is referred to as the unit switching cell (unit cell). Stray inductance L_s is the total series inductance of a high current path, excluding the stray inductance L_e in the gate-to-emitter loop.

Fig. 1. Unit cell of a VSC.

The load current remains nearly constant during a switching event. Therefore, the inductive load can be conveniently replaced with a constant and independent current source to simplify the circuit.

B. Circuit Model of Switching Device

The regular behavior of an IGBT is generally characterized by a BJT driven by a MOSFET [11]. However, in the circuit modeling of switching behavior, an IGBT is represented by using a controlled source, inter-electrode switching capacitances, and terminal inductances, as shown in Fig. 2.

Fig. 2. IGBT circuit model.

Inter-electrode capacitances C_ge, C_gc, and C_ce are referred to as the gate-to-emitter capacitance, Miller capacitance, and collector-to-emitter capacitance, respectively.

Inductances L_c and L_e are the stray inductances of the metallic connections to the collector and emitter terminals, respectively. The resistance of the metallic connections to the gate terminals is represented by R_{G_int}. The circuit model of an IGBT is a lumped parameter model that imitates the variations of terminal voltages and currents during a switching event. A set of ordinary differential equations can be derived to describe the circuit that involves the IGBT model, its gate drive, and the converter power circuit. Consequently, the computational effort required to solve a circuit model is lower than that required to solve a semiconductor physics-based model. Inter-electrode capacitances are nonlinear because the amount of their stored charge per unit voltage varies with the collector voltage. Fig. 3 depicts the typical variations of the inter-electrode capacitances of an IGBT with the collector voltage.

Fig. 3. Variation of switching capacitances with collector voltage [17].

The capacitances remain constant at their lowest values at high collector voltages. However, the capacitance values are large at low collector voltages. The typical capacitances versus collector voltage curves provided in device data sheets are measured at a zero gate-to-emitter voltage.

The coupling between the gate-to-emitter voltage and collector current is described by [13] as

   (1)

where V_ge is the gate-to-emitter voltage, V_T is the threshold gate-to-emitter voltage of the IGBT, and g_mo is the transconductance, which is constant. Equation (1) is valid at a high collector voltage [13].

The behavior of an IGBT is determined on the basis of its internal dynamics and its interactions with the rest of the components in the circuit. Therefore, the stray inductances of circuits, freewheeling diode behavior, and gate drive characteristics are important to accurately model switching transients. The switching process of an IGBT within a unit cell shown in Fig. 1 follows several distinct phases [15]. The influence of a particular circuit component in several phases can be insignificant and can lead to simplifications that can be valuable in analyzing the circuit and determining model parameters. The variable nature of inter-electrode capacitances is essential to accurately calculate the trajectories of currents and voltages during switching transients. The response of an IGBT is slower than that of a diode. Hence, an IGBT greatly influences loss calculations. Instead of applying complex semiconductor physics-based diode models, an approximate model can be used to model diodes. A description of the modeling approach for turn-on and turn-off switching transients is presented in the next two sections.

Ⅲ. MODELING OF THE TURN-ON SWITCHING TRANSIENT

A. Transient Behavior of Turn-on Switching Event

As previously described, the load current is transferred from the freewheeling diode to the IGBT during a turn-on switching event. The typical voltage and current waveforms observed during a turn-on transient are shown in Fig. 4.

Fig. 4. Turn-on transient of an IGBT in a unit cell.

The turn-on transient passes through six distinct phases [4], as indicated in Fig. 4. On the basis of the above discussion, the circuit model in Fig. 5 is proposed for the unit cell in this study. This model approximates the behavior of the IGBT at each phase with consideration of the dominant processes that occur within the IGBT and between the IGBT and other unit cell elements.

Fig. 5. Circuit model of the unit cell.

The model in Fig. 5 accounts for the different behavior of the model in Fig. 2 during the above phases.

The model in Fig. 5 uses time-invariant values for the passive components themselves. Any time variance is accounted for by the additional controlled voltage source V_CCVS2, which accounts for C_gc’s dependence on V_cg during phases 4 and 5. Current controlled voltage source V_CCVS1 is used to imitate the behavior of V_ge during phases 4 and 5. The voltage source that represents gate drive V_GD can have two values. The positive voltage applied to turn on the IGBT is represented as V_GDP, and the negative (or zero) voltage applied to turn off the IGBT is represented as V_GDN.

Current source I_RR(t) shown in Fig. 5 mimics the reverse recovery behavior of the freewheeling diode. Capacitor C_J represents the dynamic behavior of the diode. Inductance L_s shown in Fig. 5 is the sum of the IGBT collector stray inductance L_c and the total series path inductance of the converter up to the reservoir capacitor, except for L_e. The induced EMF across stray inductance L_e causes gate voltage V_g to differ from gate-to-emitter voltage V_ge with the rapid variation of collector current I_c. However, the externally measurable quantity V_g is equal to V_ge when I_c does not vary rapidly. Furthermore, collector-to-emitter voltage V_ce is approximately equal to externally measurable collector voltage V_c because the induced EMF across L_e is remarkably smaller than that of V_ce. In this study, the measured voltages are constantly expressed in terms of the circuit ground, except for the diode voltage.

B. Modeling the Switching Phases

The modeling of the six switching phases is achieved by suitably controlling the switches and current sources in the equivalent circuit in Fig. 5. The switch states and current source equations for modeling all the six phases are given in Table I.

TABLE I CONDITIONS AT EACH PHASE IN TURN-ON TRANSIENT

Phase	S1	S2	S3	IVCCS	IRR
1	open	open	closed	0A	0A
2	open	open	closed	Eqn. (1)	0A
3	open	open	closed	Eqn. (1)	Ic(t)-IL
4	closed	closed	closed	IL+ ID (t)	ID (t)
5	closed	closed	closed	IL	0A
6	open	closed	closed	IL	0A

1) Pre-Switching Condition

Prior to the start of the turn-on switching event, the collector of the IGBT model is located at supply voltage V_cc, and the gate terminal is located at the saturation voltage of the gate driver output. The load current is transported by the diode that is in the conduction state, and source currents I_VCCS and I_RR are zero.

2) Phase 1: Turn-on Delay Period

This turn-on transient starts with the change of gate driver output voltage V_GD due to the application of a gate pulse. The finite rise time of the gate drive is modeled by using a linear ramp to approximate the initial rise of V_GD. V_GD remains at its high value (V_GDP) after the linear increase. Positive gate drive voltage V_GDP charges input capacitance C_ies (C_ge +C_gc) through gate resistance R_G that causes gate voltage V_g to gradually rise, as shown in Fig. 4 [15]. No substantial change is observed in the main IGBT voltage and current (V_ce or I_c ) because gate-to-emitter voltage V_ge is still below threshold voltage V_T. The load current largely remains in the diode, and the controlled source currents I_VCCS and I_RR are zero. Hence, switch S₁ in the circuit shown in Fig. 5 is kept open in this phase. Fixed capacitances are used for C_ge and C_gc because no variation of inter-terminal capacitances is observed when V_ce is fixed. Phase 1 of the turn-on transient terminates when V_ge reaches threshold voltage V_T. The final values of the voltages and currents at the end of a given phase are assigned as the initial values of the next phase.

3) Phase 2: Period of Rising Collector Current

Phase 2 begins with the conduction of IGBT, and collector current I_c rises with the increase of gate voltage V_ge according to (1). This transfer characteristic is modeled via voltage controlled current source I_VCCS shown in Fig. 5. Rising I_c induces voltages across stray inductances L_s, thereby causing V_ce to drop below V_cc. This variation of V_ce requires the depletion of some stored charges within C_ce. In addition, Miller capacitor C_gc returns the variation of V_c to the gate side. Furthermore, the induced EMF across emitter stray inductance L_e reduces the net voltage applied to the capacitive charging circuit at the gate side. Therefore, L_e provides a negative feedback that delays the turn-on switching transient. Capacitors C_ge, C_gc, and C_ce are considered constant in Phase 2 because V_ce still remains high and the variations of these capacitor values are insignificant (Fig. 3).

4) Phase 3: Initial Reverse Recovery Period

Phase 3 starts when I_c rises to load current I_L. At this point, the freewheeling diode begins to turn off, and device current I_c overshoots beyond I_L due to the reverse recovery current of the diode. The reverse recovery current of a power diode is the current caused by the depletion of stored charges in the lightly doped base region [18]. The increase of I_c is still governed by rising V_g (V_ge) on the basis of the relationship in (1). Given the negligible voltage across the diode (forward bias) [19], the rate of change of IGBT collector current I_c is still governed by V_ge and remains relatively unchanged from the previous phase 2 [5]. Current I_c minus I_L is the reverse recovery current of the diode and is injected to the circuit via current source I_RR in Fig. 5. This initial phase of reverse recovery continues until I_RR reaches its maximum value I_RM. Maximum reverse recovery current I_RM is approximately determined by (2) [14].

          (2)

where τ is the carrier lifetime of the diode. The slope of I_c is determined during Phase 2 to enhance the estimation accuracy of I_RM.

5) Phase 4: Collector Voltage Falling Period

In the start of Phase 4, the diode starts to gain a reverse voltage, and its reverse recovery current begins to decrease. Switch S₃ is closed, and diode current I_D is entirely modeled by current source I_RR as a linearly decreasing function of time. The IGBT remains in the active region, and I_c (=I_RR+I_L) and V_ge are related through (1). Thus, a small drop in V_g is observed with the decrease of I_c, as shown in Fig. 4. The value of V_ge in Phase 4 is determined by using (3), which is derived from (1). In the circuit, V_ge is assigned with the value in (3) via current controlled voltage source V_CCVS1.

 &sp;     (3)

The variation of the magnitude of V_ge is considerably smaller than that of V_cg; hence, the decrease in V_ce is approximately equal to the decrease in the voltage across Miller capacitor C_gc. Therefore, V_ce is mainly determined by the amount of stored charge within C_gc. Current I_Miller, which discharges C_gc, can be calculated by (4) [14].

   (4)

The nonlinearity of C_gc cannot be ignored during this phase due to the remarkable drop of V_ce (Fig. 3). As capacitor C_gc is used as a function of V_cg, the capacitor discharging equation can be expressed as (5)

     (5)

Equation (5) can be written in the form of (6).

        (6)

Therefore, the variation of V_cg can be simplified to (7), with the quantities in the square brackets replaced by C_gc', which can be pre-calculated and stored as a function of V_cg in a lookup table.

       (7)

where 

     (8)

During the simulation of Phase 4, (7) is numerically integrated by using backward Euler algorithm to determine V_cg. During Phases 4 and 5 of the turn-on switching event (Fig. 4), the change of V_ce is large relative to the change in V_ge. Therefore, the variation of V_cg is approximated by the variation of V_cg to simplify the model. Nonlinear parameter C_gc' is expressed as a function of V_ce (because the variation of V_cg closely follows that of V_ce) and is obtained from a lookup table during numerical integration. An unequally spaced lookup table is used because the rate of change of C_gc′ is small at large Vce values. Therefore, few samples are sufficient at large V_ce values. The estimation of C_gc′ is explained in Section V. In the circuit, the computed value of V_cg should be injected via a controlled voltage source connected between the gate and the collector. However, the same effect can be achieved by injecting (V_cg + V_ge) through a controlled source connected between the collector and emitter. This approach results in a stable circuit and is represented by using V_CCVS2, which is inserted to the IGBT circuit model shown in Fig. 5 by closing S₂. Phase 4 ends when I_c reaches I_L and diode current I_D becomes zero at the end of this phase.

6) Phase 5: Gate Voltage Plateau Period

I_c remains constant at I_L in Phase 5. The value of V_ge (V_g) remains constant, as determined by (3), because the IGBT remains in the active region. Collector-to-emitter voltage V_ce slowly decreases, and the decreasing rate of V_ce gradually drops. Therefore, V_ge is calculated using (3) and is enforced in the circuit with the aid of V_CCVS1. On the basis of (4), I_Miller is fixed during this phase because V_ge is constant. Therefore, the variation of V_ce is determined in the same way as that in Phase 4 from (7), but a constant I_Miller is used and enforced using V_CCVS2. Phase 5 ends when V_ce drops to the saturation voltage. All switches remain at the same position, similar to the case in Phase 4.

7) Phase 6: Final Gate Voltage Rising Period

In Phase 6, the IGBT enters a region where relationship (1) no longer holds. Gate voltage V_g starts to increase from the gate voltage plateau and moves toward V_GDP at a rate determined by the charging of C_ge+C_gc through R_G [15]. Therefore, S₁ is opened. V_ce is maintained at saturation voltage V_ce(sat) by using V_CCVS2.

Ⅳ. MODELING OF TURN-OFF SWITCHING TRANSIENT

A. Transient Behavior Of Turn-off Switching Event

During the turn-off event, the load current is transferred from the IGBT to the freewheeling diode. The transient can be divided into four phases [4] (Fig. 6). Similar to the case in the turn-on transient, the four phases in the turn-off transient are simulated by using the equivalent circuit in Fig. 5 with different switch states and current sources (Table II).

Fig. 6. Turn-off transient of the IGBT in the unit cell.

TABLE II CONDITIONS AT EACH PHASE IN TURN-OFF TRANSIENT

Phase	S1	S2	S3	IVCCS	IRR
1	open	open	closed	IL	0A
2	closed	closed	closed	IL	0A
3	open	open	closed	Eqn. (1)	0A
4	open	open	closed	Eqn. (9)	0A

B. Modeling the Switching Phases

1) Pre-Switching Condition

The gate terminal of the IGBT is located at positive gate drive voltage V_GDP, and the collector terminal is located at saturation voltage V_ce(sat). I_c remains equal to I_L, and the voltage across C_J is equal to V_cc.

2) Phase 1: Turn-off Delay Period

Phase 1 begins when the gate drive voltage starts to change from V_GDP to V_GDN. This change may be modeled as a ramp-down when gate driver dynamics is to be considered. Negative gate voltage source V_GDN causes C_ge and C_gc to discharge and causes V_g to gradually drop (Fig. 6). In this phase, switches S₁ and S₂ are kept open. The finite output resistance of the gate drive can be added to R_G. This phase is completed when V_ge plateaus at the value given by (3).

3) Phase 2: Gate Voltage Plateau Period during Turn-off

In Phase 2, V_ce starts to increase, and V_g remains constant at its plateau value at the end of Phase 1. I_c remains constant. However, I_c slightly decreases during the latter part of the phase when the variation of V_ce is rapid (Fig. 6). The variation of V_ce is governed by the charging of Miller capacitance. Therefore, the variation of V_ce is calculated in a way similar to that done in Phase 5 of the turn-on switching transient and is enforced in the circuit using VCCS2. The instantaneous voltage across the diode is V_cc−V_ce, where V_cc is the supply voltage. The drop in I_c at the end of the phase is due to the release of stored charges in diode junction capacitance C_J [5]. For simplicity and ease of parameter extraction, C_J is modeled as a fixed capacitor. The next phase starts when V_ce reaches V_cc.

4) Phase 3: Collector Current Falling Period

The load current transfer from the IGBT to the diode starts in this phase, and a rapid fall in IGBT current I_c is observed. A simultaneous decrease in V_ge occurs with the decrease in I_c. An overshoot in V_ce is observed with the decrease in I_c due to the voltages induced across stray inductances L_s and L_e. The decrease in I_c is modeled by using (1) and is injected via controlled current source I_VCCS. The induced EMF across L_e resists the change in I_c, similar to the case in phases 2 and 3 of the turn-on switching transient. Fixed capacitance values are used in the simulation of this phase because V_ce is sufficiently high. The voltage and current variations in the diode are the responses to V_ce and I_c variations determined by the IGBT.

5) Phase 4: Collector Current Tail Period

In this phase, the rate of decrease in I_c declines, and I_c follows a near-exponential decay [20]. Collector-to-emitter voltage V_ce undergoes several oscillations, and V_g decreases toward V_GDN. The gradually decaying I_c is modeled by using (9) and is injected via controlled current source I_VCCS [21].

         (9)

Time constant t_Tail and amplitude I_Tail for a given IGBT can be determined by using test waveforms. The gate voltage change is determined by the discharging of C_ies through R_G. This phase ends when the gate voltage reaches V_GDN.

Ⅴ. MODEL PARAMETERS

The parameters of the model in Fig. 5 are available in the manufacturer’s datasheets and test waveforms. The capacitors are challenging because their values are voltage dependent [8]. [11] used four different values of C_ge for the different phases of the turn-on and turn-off transients. The model proposed in the current work follows the recommendation in [11] to simplify the modeling. These values are obtained by sampling the full characteristics (derived below) at suitable intervals.

Typically, datasheets present the variations of switching capacitances with V_ce measured at zero V_ge. However, switching capacitances remarkably change when a gate voltage is applied [22]. Therefore, an accurate estimation of capacitances can be achieved by extracting them from the measured switching transient waveforms. A systematic procedure to obtain all the required parameters from two test waveforms (turn-on and turn-off) is described below. Consider the turn-on switching transient shown in Fig. 7 with various quantities used in the equations. C_ge is estimated by considering two points on the measured V_g trajectory during Phase 1 with the decay of the initial oscillation of V_g. The ramp up of the gate drive voltage is expressed as where V_gi and V_gf are the gate voltages measured at time instants t_i and t_f (Fig. 7).

      (10)

Fig. 7. IGBT turn-on transient measurement at V_cc = 185 V, I_L = 6.5 A, and R_G = 150 Ω.

Although (10) ignores the effect of C_gc, accuracy does not suffer considerably because C_ge is greater than C_gc during Phase 1 and V_ce is fixed. Stray inductance L_s is estimated by applying (11) to an instant in which the trajectory of I_c is stable, such as ½ I_L.

           (11)

Alternatively, stray inductances L_s and L_e can be estimated by simulating the printed circuit board with the aid of finite element modeling-based simulation tools. Gain constant g_mo required for (1) and (3) is estimated by applying (12) to average V_g during the gate voltage plateau phase.

           (12)

Once g_mo is known, the emitter stray inductance L_e can be determined by considering the gate circuit during I_c rising period in Phase 2. Given the instant when I_c = ½ I_L (i.e., at t = t_m in Fig. 7), L_e is obtained as

          (13)

Forward carrier lifetime τ of the diode is estimated by using (2) with dI_c/dt at t = t_m and then applying (14).

         (14)

Later reverse recovery period t_b at different I_L and dI_c/dt values is given in the manufacturer’s datasheets. A lookup table can be created to determine t_b at a given I_L and dI_c/dt. The datasheet value of C_ce is adequate because the impact of C_ce on the transient is small. The measurements in Phase 1 and the known parameters are related to Miller capacitance C_gc as

        (15)

However, (15) cannot be applied to determine C_gc because the sloped estimation of V_g in this period is challenging due to noises. Alternatively, the value of C_gc during high V_ce can be determined by using a trial and error approach, in which the model response at a trial C_gc value is compared with the measured V_g trajectory. The value of C_gc substantially increases during Phase 4 with the decrease of V_ce. A set of values for C_gc' in (7) is required to synthesize the variations of V_ce during Phases 4 and 5. C_gc' at a given V_ce is estimated from (16) by approximating the derivative of V_ce in (7) from nearby points (t_H V_{ce_H} ), (t_L, V_{ce_L}) with V_{ce_mid} = ½( V_{ce_H} + V_{ce_L}), as marked in Fig. 7.

   (16)

Estimating the time rate of V_ge from measurements is difficult. The estimation of the current value of variable capacitance C_ge increases the effort required for parameter extraction. Therefore, the complexity of parameter extraction can be reduced when is assigned to the current injection from the gate drive and by compensating for the error through the fitting variation of V_ce to the current value of I_Miller. The set of values obtained for C_gc' from a test waveform can be used at any other operating points, as described in the Results and Discussion section. Consider that the conditions at the gate side slightly differ during the turn-off transient and that the variations of C_ge and C_ce are ignored. In such a case, another set of values for C_gc' should be determined to accurately simulate the turn-off switching transient. Doing so requires the same application of (16) to Phase 2 of the turn-off measurements. Two other capacitance values are estimated for C_ge (at high and low V_ce) to simulate the turn-off transient, as presented in [11]. The first capacitance value is utilized in Phase 1, and the second capacitance value is used in the remaining periods. The two capacitance values can be estimated by applying a capacitive charging equation (10) with initial voltages.

Ⅵ. RESULTS AND DISCUSSION

Various test measurements were conducted by using the test circuit in Fig. 1 with IGBTs from different manufacturers. The test circuit consisted of an inductive load with 0.5 ms time constant.

Although the IGBT/diode temperatures were uncontrolled, visible temperature changes were avoided by leaving the test devices turned off for a long period after a few consecutive short on–off pulses. One set of measurements from each IGBT/diode combination was used to extract the model parameters. The remaining measurements were used for model verification. Only the results of the IGBT model IRG6I320UPBF and freewheeling diode ISL9R1560P2 are presented due to space limitations. The estimated parameters of the IGBT, diode, and circuit layout parameters are shown in Appendix 1.

The estimated and measured turn-on transient waveforms at two different voltage–current combinations (different from the waveforms used for parameter extraction) are compared in Figs. 8 and 9. The model was simulated through PSCAD/EMTDC with a time step of 0.05 ns. The plots showed a good match between the measured and simulated turn-on transient trajectories of V_c and I_c, except for the high-frequency oscillations in the gate voltage during the gate voltage plateau. These oscillations begin when the sign of dI_c/dt suddenly changes at the peak of reverse recovery current and involve the voltage induced on L_e. Several differences were observed between the estimated gate voltage and the observed gate voltage at the conducting phases of turn-on transient, and they were due to the underestimation of L_e. The estimated diode reverse recovery voltage was inaccurate because a simplified diode model was used. Nevertheless, these oscillations on V_g exerted a minimal effect on the switching loss estimation, and the model predicted the average switching behavior with a reasonable accuracy level.

The estimated and measured turn-off transient waveforms at two dissimilar operating points are compared in Figs. 10 and 11. They showed good agreement with each other. A good agreement between the measured and the simulated waveforms can be obtained when the nonlinearity of the Miller capacitor is considered.

The effects of nonlinear C_gc during Phases 4 and 5 of the turn-on transient and Phase 2 of the turn-off transient are represented in the model by using source V_CCVS2, with its voltage computed from (7). However, capacitance C_gc during these phases was observed in the circuit. This condition helped preserve the initial condition across C_gc for the next phase and did not cause a remarkable error. The overshoot of V_c at turn-off transient was inaccurate because the nonlinear diffusion capacitance of the forward biased diode was ignored.

The accuracy of the models was evaluated by comparing the estimated and measured switching losses at different operating points shown in Tables III and IV.

The maximum error was less than 10%, and the error was less than 5% in most cases.

Fig. 8. Turn-on switching trajectories at V_cc = 135 V, I_L = 4.25 A, and R_G = 150 Ω.

Fig. 9. Turn-on switching trajectories at V_cc = 185 V, I_L = 5.25 A, and R_G = 70 Ω.

Fig. 10. Turn-off switching trajectories at V_cc=180V, I_L=9.75A, and R_G=70Ω.

Fig. 11. Turn-off switching trajectories at V_cc = 145 V, I_L = 6.3 A, and R_G = 35 Ω.

A. Implementation in EMT Simulation Programs

The proposed circuit model completely considers the impact of gate drive and circuit layout; this capability is a major advancement relative to the models proposed in [4], [5], [24]. Simulating the proposed circuit model is not practical as it requires considerably small simulation time steps every time a switching event occurs in the power circuit. As depicted in Fig. 12, a lookup table of switching losses is presented for each IGBT (and diode) as a function of I_c, and V_ce, (and temperature when a thermal model is integrated). In the main power circuit simulation, IGBTs and diodes are represented by using simplified (or ideal) switch models that enable the calculation of the pre- and post-switching values of I_c and V_ce. These values were used to retrieve the appropriate loss values from the corresponding lookup table. With this approach, any number of switches can be represented in the power circuit simulation. At the same time, IGBT parasitic and stray inductances are applicable to each IGBT, and the estimated losses are realistic because the lookup tables for the losses were computed in terms of the drive circuit.

TABLE III TURN-ON SWITCHING LOSSES

VCC (V)	IL (A)	RG (Ω)	Turn-on Energy Loss		Error (%)
			Esti. (μJ)	Meas. (μJ)
180	6.50	150	49.9	48.6	2.7
185	4.15	150	31.2	28.6	9.1
135	4.25	150	22.5	23.4	-3.8
185	5.50	70	38.0	40.8	-6.9
153	3.20	70	27.4	26.6	3.0

TABLE IV TURN-OFF SWITCHING LOSSES

VCC (V)	IL (A)	RG (Ω)	Turn-on Energy Loss		Error (%)
			Esti. (μJ)	Meas. (μJ)
175	9.75	70	174.1	168.8	3.1
180	3.25	70	48.6	48.3	0.6
140	6.00	70	74.4	80.5	7.6
180	8.75	35	109.5	104.2	5.1
145	6.30	35	53.4	54	1.1

Fig. 12. Application of the model in evaluating IGBT switching losses at VSCs embedded in large power systems.

Ⅶ. CONCLUSIONS

Simulation results and experimental measurements demonstrate that the proposed circuit model of IGBTs is capable of accurately predicting terminal currents and voltage waveforms during switching events. The proposed model improves the results of previously published research by considering the interactions between IGBT devices and circuits in a precise and transparent manner, as well as the variable nature of the parameters at different phases of transients. The circuit model of the IGBT/diode combination can be easily incorporated in circuit or power system simulation programs because the model does not rely on complex semiconductor physics-based characterization. A practical procedure for parameter extraction from transient measurements is presented. As the parameters are estimated by using a test circuit, the model can be applied to calculate the losses of a target converter circuit with the estimated stray inductances and actual gate drive characteristics.

The limitation of the proposed model includes the need to take transient measurements with a gate drive of known characteristics for parameter extraction. This limitation mainly stems from changes in a device’s internal capacitances, especially C_gc, with V_ge (in addition to V_ce ). Moreover, datasheet measurements are generally made at V_ge = 0. Another limitation of the model is the small time step it requires in simulating circuits. The electro-thermal behavior of VSCs can be simulated by adding two additional features to the proposed model. Model parameters g_mo and V_T are dependent on the junction temperature of the device. The dependency can be related by simple equations, as presented in [23]. Therefore, the proposed model can be used as a tool for designing thermal management systems by using the estimated losses to calculate the temperature change with the aid of an IGBT thermal model [5].

APPENDIX

TABLE V C_GC' FOR TURN-ON TRANSIENT

Vce (V)	0	10	15	20	35	45	300
Cgc' (pF)	800	600	225	70	58	22	15

TABLE VI C_GC' FOR TURN-OFF TRANSIENT

Vce (V)	0	8	15	20	35	45	300
Cgc' (pF)	1200	600	200	120	90	75	50

TABLE VII CONSTANT PARAMETERS FOR IGBT AND CONVERTER

Parameter	Estimated Value	Units	Description
gm0	4	A/V2	-
VT	4	V	-
Cgc	12	pF	-
Cce	20	pF	-
Cge_ON	1.6	nF	-
Cge_OFFPh1	2.75	nF	Turn-off Phase-1
Cge_OFFPh2-4	1.65	nF	Turn-off Phase-2 to 4
Ls	160	nH	-
Le	12	nH	-

REFERENCES

[1] N. Flourentzou, V. G. Agelidis, and G. D. Demetriades, “VSC-based HVDC power transmission systems: an overview,” IEEE Trans. Power Electron., Vol. 24, No. 3, pp. 592-602, Mar. 2009.

[2] F. Schettler, H. Huang, and N. Christl, “HVDC transmission systems using volt-age sourced converters design and applications,” Proceedings of the IEEE Power Engineering Society Summer Meeting, Seattle, Washington, Vol. 2, pp. 715-720, Jul. 2000.

[3] H. Pang, G. Tang, and Z. He, “Evaluation of losses in VSC-HVDC transmission system,” Proceedings of the IEEE Power and Energy Society General Meeting, Pittsburgh, Pennsylvania, pp. 1-6, Jul. 2008.

[4] A. D. Rajapakse, A. M. Gole, and P. L. Wilson, “Electromagnetic transients simulation models for accurate representation of switching losses and thermal performance in power electronic systems,” IEEE Trans. Power Del., Vol. 20, No. 1, pp. 319-327, Jan. 2005.

[5] A. D. Rajapakse, A. M. Gole, and R. P. Jayasinghe, “An improved representation of facts controller semiconductor losses in EMTP-type programs using accurate loss-power injection into network solution,” IEEE Trans. Power Del., Vol. 24, No. 1, pp. 381-389, Jan. 2009.

[6] C. Wong, “EMTP modeling of IGBT dynamic performance for power dissipation estimation,” IEEE Trans. Ind. Appl., Vol. 33, No. 1, pp. 64-71, Feb. 1997.

[7] S. Munk-Nielsen, L. N. Tutelea, and U. Jaeger, “Simulation with ideal switch models combined with measured loss data provides a good estimate of power loss,” 2000 IEEE Industry Applications Conference, Vol. 5, pp. 2915-2922, 2000.

[8] M. H. Naushath and A. D. Rajapakse, “A novel method for estimation of IGBT switching losses in voltage source convertors through EMT simulations,” IEEE 2nd Annual Southern Power Electronics Conference (SPEC), pp. 1-6, 2016.

[9] J. Qian, A. Khan, and I. Batarseh, “Turn-off switching loss model and analysis of IGBT under different switching operation modes,” in Proceedings of the 1995 IEEE IECON 21st International Conference on Industrial Electronics, Control, and Instrumentation, Vol. 1, pp. 240-245, 1995.

[10] Y.-Y. Tzou and L.-J. Hsu, “A practical SPICE macro model for the IGBT,” in International Conference on Industrial Electronics, Control, and Instrumentation, Proceedings of the IECON ’93, pp. 762-766, 1993.

[11] Mihalic, K. Jezernik, K. Krischan, and M. Rentmeister, “IGBT SPICE model,” IEEE Trans. Ind. Electron., Vol. 42, No. 1, pp. 98-105, Feb. 1995.

[12] J.-T. Hsu and K. D. T. Ngo, “Behavioural modeling of the IGBT using the Hammerstein configuration,” IEEE Trans. Power Electron., Vol. 11, No. 6, pp. 746-754, Nov. 1996.

[13] H. S. Oh and M. El. Nokali, “A new IGBT behavioural model,” Solid State Electronics, Vol. 45, No. 12, pp 2069-2075, 2001.

[14] M. Jin and M. Weiming, “Power converter EMI analysis including IGBT nonlinear switching transient model,” IEEE Trans. Ind. Electron., Vol. 53, No. 5, pp. 1577-1583, Oct. 2006.

[15] A. T. Bryant, L. Lu, E. Santi, J. L. Hudgins, and P. R. Palmer, “Modeling of IGBT resistive and inductive turn-on behavior,” IEEE Trans. Ind. Appl., Vol. 44, No. 3, pp. 904-914, Jun. 2008.

[16] A. R. Hefner, “Analytical modeling of device-circuit interactions for the power insulated gate bipolar transistor (IGBT),” IEEE Trans. Ind. Appl., Vol. 26, No. 6, pp. 995-1005, Dec. 1990.

[17] IXYS Cooperation, data sheet of IXGT6N170, Available: http://ixapps.ixys.com/DataSheet/DS98990C(IXGH-T6N170A).pdf

[18] P. Leturcq, “Power semiconductor device modelling dedicated to circuit simulation,” in Power Semiconductor Devices and ICs, 1999. ISPSD ’99. Proceedings., The 11th International Symposium on, pp. 19-26, 1999.

[19] Y.-C. Liang and V. J. Gosbell, “Diode forward and reverse recovery model for power electronic SPICE simulations,” IEEE Trans. Power Electron., Vol. 5, No. 3, pp. 346-356, Jul. 1990.

[20] D.-S. Kuo, J.-Y. Choi, D. Giandomenico, C. Hu, S. P. Sapp, K. A. Sassaman, and R. Bregar, “Modeling the turn-off characteristics of the bipolar-MOS transistor,” IEEE Electron Device Lett., Vol. 6, No. 5, pp. 211-214, May 1985.

[21] M. Trivedi and K. Shenai, “Modeling the turn-off of IGBT’s in hard- and soft-switching applications,” IEEE Trans. Electron. Devices, Vol. 44, No. 5, pp. 887-893, May 1997.

[22] J. C. Joyce, “Current sharingand redistribution in high power IGBT modules,” PhD Thesis, University of Cambridge, May 2001.

[23] P. Palmer, E. Santi, J. Hudgins, X. Kang, J. Joyce, and P. Eng, “Circuit simulator models for the diode and IGBT with full temperature dependent features,” IEEE Trans. Power Electron., Vol. 18, No. 5, pp. 1220-1229, Sep. 2003

[24] U. N. Gnanarathna, A. M. Gole, A. D. Rajapakse, S. K. Chaudhary, “Loss estimation of modular multi-level converters using electro-magnetic transients simulation,” Proceedings of Int. Conf. Power Systems Transients -2011, pp. 1-6, 2011.

Naushath Mohamed Haleem received his B.Tech. (Eng.) degree in electronics and communications from the Open University of Sri Lanka, Sri Lanka, in 2005, and his M.Sc degree in electrical engineering from the University of Manitoba, Winnipeg, MB, Canada, in 2013. He is currently pursuing his PhD degree in electrical engineering at the University of Manitoba, Winnipeg, MB, Canada. His research interests include modeling of HVdc converters, protection of VSC-based future multi-terminal HVdc grids, and protection and control of hybrid LCC-VSC multi-terminal HVdc Systems.

Athula D. Rajapakse received his B.Sc (Eng.) degree in electrical engineering from the University of Moratuwa, Katubedda, Sri Lanka, in 1990; his M. Eng. degree in Energy (Energy Technology) from the Asian Institute of Technology, Bangkok, Thailand, in 1993; and his Ph.D. degree in quantum engineering and systems science from the University of Tokyo, Japan, in 1998. He is a professor at the University of Manitoba, Winnipeg, MB, Canada. His research interests include power system protection, grid integration of distributed and renewable energy systems, and protection of future DC grids. Dr. Rajapakse is a registered professional engineer in the province of Manitoba, Canada.

Aniruddha M. Gole received his B.Tech. degree in electrical engineering from the Indian Institute of Technology, Bombay, India, in 1978; and his Ph.D. degree from the University of Manitoba, Winnipeg, MB, Canada, in 1982. He is a distinguished professor and NSERC Industrial Research Chair in Power System Simulation at the University of Manitoba. Prof. Gole is a registered professional engineer in the province of Manitoba. He is the 2007 recipient of the IEEE Power Engineering Society Nari Hingorani FACTS Award.