사각형입니다.

https://doi.org/10.6113/JPE.2018.18.3.853

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Mechanism Analysis and Stabilization of Three-Phase Grid-Inverter Systems Considering Frequency Coupling


Guoning Wang*, Xiong Du, Ying Shi**, Heng-Ming Tai***, and Yongliang Ji****


†,*State Key Laboratory of Power Transmission Equipment and System Security and New Technology, Chongqing University, Chongqing, China

**School of Automation Engineering, Chongqing University, Chongqing, China

***Department of Electrical and Computer Engineering, University of Tulsa, Tulsa, OK, USA

****Electric Power Research Institute of State Grid Chongqing Electric Power Company, Chongqing, China



Abstract

Frequency coupling in the phase domain is a recently reported phenomenon for phase locked loop (PLL) based three-phase grid-inverter systems. This paper investigates the mechanism and stabilization method for the frequency coupling to the stability of grid-inverter systems. Self and accompanying admittance models are employed to represent the frequency coupling characteristics of the inverter, and a small signal equivalent circuit of a grid-inverter system is set up to reveal the mechanism of the frequency coupling to the system stability. The analysis reveals that the equivalent inverter admittance is changed due to the frequency coupling of the inverter, and the system stability is affected. In the end, retuning the bandwidth of the phase locked loop is presented to stabilize the three-phase grid-inverter system. Experimental results are given to verify the analysis and the stabilization scheme.


Key words: Admittance, Frequency coupling, Grid-connected inverter, Impedance, Stability


Manuscript received Aug. 18, 2017; accepted Dec. 20, 2017

Recommended for publication by Associate Editor Jongbok Baek.

Corresponding Author: duxiong@cqu.edu.cn Tel: +86-23-65102438, Fax: +86-23-65111900, Chongqing University

*State Key Laboratory of Power Transmission Equipment and System Security and New Technology, Chongqing University, China

**School of Automation Engineering, Chongqing University, China

***Dept. of Electrical and Computer Eng., University of Tulsa, U.S.A.

****Electric Power Research Institute of State Grid Chongqing Electric Power Company, China



Ⅰ. INTRODUCTION

For grid-connected inverter distributed generation systems, the interaction between the inverter and the grid can produce stability problems, especially under weak grid conditions. The stability issue between grid-connected inverters and the grid has been an important research topic [1]-[5]. The impedance-based approach has been widely used for inverter stability analysis in either the synchronous reference dq frame or the stationary reference frame [6]-[8]. The Nyquist criterion and the generalized Nyquist criterion (GNC) have been commonly employed to analyze stability based on small signal inverter impedance models [8], [9].

Impedance analysis has been widely used in dc/dc systems [10]. Since no dc operating point is available in three-phase ac systems, it is common to transform them from the stationary reference frame to the dq frame via a Park transformation. This is done to obtain a dc operating point like that in a dc/dc system. When compared with a dc/dc system, the impedance of a three-phase grid-connected inverter is expressed in matrix form in the dq frame [6], [11], [12]. Due to the matrix representation of inverter admittance, the generalized Nyquist criterion is required for a stability analysis of the interaction between an inverter and the grid [13], [14]. On the other hand, the harmonic linearization method is employed to model the impedance of a three-phase inverter in the stationary frame [8]. The impedance model is constructed separately for the positive sequence component and the negative sequence component. The stability through each sequence model can be analyzed using the Nyquist criterion so that the gain margin and phase margin can be used for stability evaluation and design [8], [14].

Recent studies have shown that frequency coupling exists between the positive and negative sequences in the phase domain [15]-[17]. Thus, in certain situations, it is possible for an actual inverter system to be unstable while the stability analysis shows the opposite when the frequency coupling is ignored [15]-[17]. The GNC must be used for grid-inverter stability analysis since frequency coupling is represented by the impedance-admittance matrix [15], [16].

In order to accurately analyze the interaction between an inverter and the grid, the frequency coupling should be carefully considered. A recent study has shown that the frequency coupling phenomenon happens between the positive and negative sequence. However, the way in which frequency coupling affects system stability is still not so clear. In addition, a method to stabilize such a system considering the frequency coupling is rarely studied due to the new indication of frequency coupling. Fully understanding the mechanism of the frequency coupling to the system stability will be useful for designing the stabilization method.

This paper will fill this gap by investigating the mechanism of the frequency coupling to the stability. Then, it will present a stabilization method. This paper is organized as follows. Section II illustrates the frequency coupling phenomenon in three-phase grid-tied inverters. The application of the self and accompanying inverter admittance models to the interaction between an inverter and the grid is investigated in Section III. A system stability analysis and a stabilization scheme are presented in Section IV. Experimental results based on the stability analysis and stabilization scheme are shown in Section V. Finaly some conclusions are presnted in Section VI.



Ⅱ. FREQUENCY COUPLING IN A THREE-PHASE VSC

In this section, simulation and experimental results are presented to illustrate the frequency coupling and its effect on stability using a PLL based three-phase converter. The result will show that coupling takes place in two situations. First, coupling occurs between the positive and positive sequences when the positive sequence perturbation frequency is below two times the grid frequency. Second, coupling occurs between the positive and negative sequences when the perturbation frequency is beyond this range.

A three-phase grid-inverter is shown in Fig. 1. The grid is represented by the three-phase voltage sources vga, vgb and vgc with the grid impedance Zg. The sensing filters of the grid voltage and current are denoted as Gfv and Gfi, respectively. The control is performed by a synchronous reference PI current controller with a SRF-PLL as depicted in Fig. 2.


그림입니다.
원본 그림의 이름: CLP000013bc0065.bmp
원본 그림의 크기: 가로 973pixel, 세로 713pixel

Fig. 1. Three-phase grid-inverter system.


묶음 개체입니다.

Fig. 2. SRF-PLL structure.


The main parameters of the power stage and the control are listed in Table I. kp and ki are PI parameters in the current controller, while kpp and kpi are PI parameters in the PLL. The switching cycle is Ts, and the time constant of the grid voltage and the current low pass filter is 그림입니다.
원본 그림의 이름: CLP000022640017.bmp
원본 그림의 크기: 가로 43pixel, 세로 52pixel. In the analysis, the converter is supplied by a stiff dc bus which can be equivalent to an ideal dc voltage source.


TABLE I SYSTEM SYMBOLS AND VALUES

Symbol

Value

Symbol

Value

Symbol

Value

vg (rms)

110V

kp

3.54

kpp

8.58

i

6A

ki

1411

kpi

5706

L

1.5mH

RL

0.15W

f0

50Hz

Vdc

400V

Ts

10-4s

그림입니다.
원본 그림의 이름: CLP000022640017.bmp
원본 그림의 크기: 가로 43pixel, 세로 52pixel

0.136ms


To investigate the frequency coupling phenomenon, a small signal three-phase symmetrical perturbation voltage is injected into the grid voltage with Zg = 0. Three different voltage perturbations are considered. Case I considers a 130Hz 11V positive sequence perturbation, Case II considers a 30 Hz, 11V negative sequence, and Case III considers a 30Hz 11V positive sequence.

Simulation results of the voltage perturbations and current responses are summarized in Table II. In Table II, fp and Vp denote the perturbation frequency and the phase voltage in RMS, respectively. Ip1 denotes the amplitude of the grid current at the same frequency as the perturbation frequency, and Ip2 is the amplitude of the grid current at a frequency other than the perturbation frequency. P is for positive sequence and N for negative sequence.


TABLE II SIMULATION RESULTS OF THE FREQUENCY COUPLING OF INVERTERS

Variable

Case I

Case II

Case III

fp

130Hz (P)

30Hz (N)

30Hz (P)

Vp

11V

11V

11V

fp1

130Hz (P)

30Hz (N)

30Hz (P)

Ip1

1.23A

1.14A

0.45A

fp2

30Hz (N)

130Hz (P)

70Hz (P)

Ip2

1.82A

1.91A

0.58A


It can be seen from Table II that a voltage perturbation with a frequency of fp produces two response currents at two different frequencies, fp1 = fp and fp2fp. The current component at a frequency that is different from the perturbation frequency can be in the opposite sequence, as in Case I and Case II. It can also be observed from Table II that a 30Hz positive sequence voltage generates a 30Hz current response and a 70Hz current response. It can also be seen that they are both in the positive sequence. In summary, if the frequency in the negative sequence can be expressed as a negative value, the following relationship can be obtained:

그림입니다.
원본 그림의 이름: CLP000013bc0062.bmp
원본 그림의 크기: 가로 379pixel, 세로 83pixel   (1)

그림입니다.
원본 그림의 이름: CLP000013bc0063.bmp
원본 그림의 크기: 가로 382pixel, 세로 80pixel     (2)

Simulation results of Case III are shown in Fig. 3. Results of a FFT analysis of the grid currents 그림입니다.
원본 그림의 이름: CLP000022640018.bmp
원본 그림의 크기: 가로 101pixel, 세로 57pixel are illustrated in Fig. 4. It can be seen from Fig. 4 that the grid current contains 30Hz and 70Hz harmonic components, and that both are in the positive sequence.


그림입니다.
원본 그림의 이름: CLP000013bc0061.bmp
원본 그림의 크기: 가로 1453pixel, 세로 880pixel

Fig. 3. Three-phase grid voltage and current in Case III.


그림입니다.
원본 그림의 이름: CLP000013bc0067.bmp
원본 그림의 크기: 가로 658pixel, 세로 739pixel

Fig. 4. FFT analysis of grid currents ia,b,c in Case III. Top panel: Amplitude. Bottom panel: Phase angle.


This phenomenon can be viewed as the frequency coupling characteristic of a PLL based inverter [15], [16], [18]. Ignoring the fp2 component can result in an inaccurate stability assessment.

Consider the grid-inverter system with the one-phase equivalent grid depicted in Fig. 5. An RC filter is added to filter out the switching frequency voltage ripples at the PCC. Then the grid impedance can be expressed as:

그림입니다.
원본 그림의 이름: CLP000013bc0069.bmp
원본 그림의 크기: 가로 774pixel, 세로 153pixel          (3)


그림입니다.
원본 그림의 이름: CLP000013bc0068.bmp
원본 그림의 크기: 가로 873pixel, 세로 569pixel

Fig. 5. One-phase equivalent grid.


It will be demonstrated that when the fp2 component, called the accompanying component, is ignored, the Nyquist stability analysis and the actual response may have conflicting stability results. In this experiment test, the grid impedance is Lg = 3.5mH.

Fig. 6 shows a Nyquist plot of 그림입니다.
원본 그림의 이름: CLP000005d80001.bmp
원본 그림의 크기: 가로 330pixel, 세로 62pixel, where 그림입니다.
원본 그림의 이름: CLP000005d80002.bmp
원본 그림의 크기: 가로 179pixel, 세로 67pixel is the self-admittance of the inverter, which will be introduced in the next section. Since the point (-1, 0) is not encircled, the Nyquist stability criterion implies that the system is stable. However, the experimental results shown in Fig. 7 indicate that the system is unstable since the PCC voltages and grid currents exhibit a high degree of low frequency distortion.


그림입니다.
원본 그림의 이름: image2.png
원본 그림의 크기: 가로 491pixel, 세로 648pixel

Fig. 6. Nyquist plots of YSA(ωp)Zg(ωp) when ignoring the frequency coupling.


묶음 개체입니다.

Fig. 7. Waveforms of the PCC voltage and three phase grid currents.



Ⅲ. MECHANISM OF FREQUENCY COUPLING TO SYSTEM STABILITY


A. System Modeling

Let vq in a PLL be expressed by a pair of conjugate complex variables:

그림입니다.
원본 그림의 이름: CLP000013bc006a.bmp
원본 그림의 크기: 가로 631pixel, 세로 147pixel   (4)

When the small signal voltage 그림입니다.
원본 그림의 이름: CLP000013bc0064.bmp
원본 그림의 크기: 가로 139pixel, 세로 87pixel at the angle frequency 그림입니다.
원본 그림의 이름: CLP000005d80003.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel is injected into the PCC, the small signal model of the PLL can be expressed by:

그림입니다.
원본 그림의 이름: CLP000013bc006c.bmp
원본 그림의 크기: 가로 1249pixel, 세로 223pixel      (5)

where 그림입니다.
원본 그림의 이름: CLP000013bc006d.bmp
원본 그림의 크기: 가로 596pixel, 세로 121pixel is the transfer function of the PLL, and 그림입니다.
원본 그림의 이름: CLP000013bc006e.bmp
원본 그림의 크기: 가로 678pixel, 세로 135pixel is the PLL controller transfer function. 그림입니다.
원본 그림의 이름: CLP000013bc006f.bmp
원본 그림의 크기: 가로 397pixel, 세로 97pixel is the phasor of the grid voltage with the amplitude 그림입니다.
원본 그림의 이름: CLP00001ce00002.bmp
원본 그림의 크기: 가로 55pixel, 세로 66pixel and phase 그림입니다.
원본 그림의 이름: CLP00001ce0bf07.bmp
원본 그림의 크기: 가로 59pixel, 세로 51pixel at the perturbation frequency 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel, denoting the small signal perturbation in either the positive or the negative sequence. In addition, 그림입니다.
원본 그림의 이름: CLP000013bc0070.bmp
원본 그림의 크기: 가로 424pixel, 세로 91pixel is its conjugate.

According to (5), a Park transformation with this phase information generates one response at the frequency 그림입니다.
원본 그림의 이름: CLP00001ce00003.bmp
원본 그림의 크기: 가로 200pixel, 세로 54pixel and another response at 그림입니다.
원본 그림의 이름: CLP00001ce00004.bmp
원본 그림의 크기: 가로 212pixel, 세로 53pixel in the dq frame. After the inverse Park transformation, these two responses are moved to the frequencies 그림입니다.
원본 그림의 이름: CLP00001ce00005.bmp
원본 그림의 크기: 가로 61pixel, 세로 54pixel and 그림입니다.
원본 그림의 이름: CLP00001ce00006.bmp
원본 그림의 크기: 가로 258pixel, 세로 66pixel. That is, one voltage perturbation 그림입니다.
원본 그림의 이름: CLP000013bc0072.bmp
원본 그림의 크기: 가로 136pixel, 세로 88pixel in the grid voltage excites two current responses, 그림입니다.
원본 그림의 이름: CLP000013bc0073.bmp
원본 그림의 크기: 가로 127pixel, 세로 89pixel at 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel and 그림입니다.
원본 그림의 이름: CLP000013bc0074.bmp
원본 그림의 크기: 가로 233pixel, 세로 87pixel at 그림입니다.
원본 그림의 이름: CLP00001ce00007.bmp
원본 그림의 크기: 가로 224pixel, 세로 67pixel.

If 0 < 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel < 그림입니다.
원본 그림의 이름: CLP000005d80004.bmp
원본 그림의 크기: 가로 100pixel, 세로 56pixel, then 그림입니다.
원본 그림의 이름: CLP000005d80005.bmp
원본 그림의 크기: 가로 254pixel, 세로 66pixel > 0, and the frequency coupling exhibits as a coupling between the positive sequence and positive sequence. If 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel > 그림입니다.
원본 그림의 이름: CLP000005d80004.bmp
원본 그림의 크기: 가로 100pixel, 세로 56pixel, then 그림입니다.
원본 그림의 이름: CLP000005d80005.bmp
원본 그림의 크기: 가로 254pixel, 세로 66pixel < 0, and the frequency coupling exhibits as a coupling between the positive sequence and negative sequence. If 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel < 0, then 그림입니다.
원본 그림의 이름: CLP000005d80005.bmp
원본 그림의 크기: 가로 254pixel, 세로 66pixel > 0, and the frequency coupling exhibits as a coupling between the negative sequence and positive sequence.

Let the self-admittance YSA denote the admittance of the inverter from the input voltage with a frequency of 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel to the output current at a frequency of 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel. In addition, the accompanying admittance YAA denoted the admittance from the input voltage with a frequency of 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel to the output current at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80005.bmp
원본 그림의 크기: 가로 254pixel, 세로 66pixel. In other words, the self-admittance generates current at a frequency of 그림입니다.
원본 그림의 이름: CLP00001ce00001.bmp
원본 그림의 크기: 가로 65pixel, 세로 53pixel and the accompanying admittance generates current at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80005.bmp
원본 그림의 크기: 가로 254pixel, 세로 66pixel in the stationary reference frame. The frequency coupling characteristics of the inverter can be modelled by the self and accompanying admittance [18], and YSA and YAA can be expressed as:

그림입니다.
원본 그림의 이름: CLP000013bc0075.bmp
원본 그림의 크기: 가로 1339pixel, 세로 268pixel          (6)

and:

그림입니다.
원본 그림의 이름: CLP000013bc0076.bmp
원본 그림의 크기: 가로 1324pixel, 세로 283pixel   (7)

In Equs. (6) and (7), Vdc denotes the constant dc bus voltage, Vcr is the amplitude of the modulator, Gc is the current PI controller, Idqr is the current reference, Ddq is the steady state duty ratio, and Gd is the delay effect.

In the following, work will be continued on the inverter self and accompanying admittance [18] to demonstrate how to use the self and accompanying admittance models to reveal the mechanism of the frequency coupling to the system stability.

A small signal representation of a grid-inverter system is depicted in Fig. 8, where the equivalent inverter current source is ignored.


그림입니다.
원본 그림의 이름: CLP000013bc0071.bmp
원본 그림의 크기: 가로 1185pixel, 세로 609pixel

Fig. 8. Small signal representation of an inverter-grid system.


B. Mechanism of Frequency Coupling to System Stability

A perturbation of the grid voltage 그림입니다.
원본 그림의 이름: CLP000013bc0079.bmp
원본 그림의 크기: 가로 130pixel, 세로 77pixel at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80006.bmp
원본 그림의 크기: 가로 64pixel, 세로 51pixel generates a grid current 그림입니다.
원본 그림의 이름: CLP000005d80007.bmp
원본 그림의 크기: 가로 42pixel, 세로 63pixel containing two components, one at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80006.bmp
원본 그림의 크기: 가로 64pixel, 세로 51pixel and another at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80008.bmp
원본 그림의 크기: 가로 229pixel, 세로 64pixel,

그림입니다.
원본 그림의 이름: CLP000013bc0077.bmp
원본 그림의 크기: 가로 801pixel, 세로 91pixel     (8)

Thus, the voltage vPCC at the PCC also contains components at frequencies of 그림입니다.
원본 그림의 이름: CLP000005d80006.bmp
원본 그림의 크기: 가로 64pixel, 세로 51pixel and 그림입니다.
원본 그림의 이름: CLP000005d80008.bmp
원본 그림의 크기: 가로 229pixel, 세로 64pixel:

그림입니다.
원본 그림의 이름: CLP000013bc0078.bmp
원본 그림의 크기: 가로 1012pixel, 세로 98pixel      (9)

Due to the admittance of the inverter, all of the components of vPCC generate their own corresponding two-frequency currents.

When a perturbation of the grid voltage 그림입니다.
원본 그림의 이름: CLP000013bc0079.bmp
원본 그림의 크기: 가로 130pixel, 세로 77pixel is injected into a grid-inverter system, the system responses can be described by the following phasor equations:

그림입니다.
원본 그림의 이름: CLP000013bc007a.bmp
원본 그림의 크기: 가로 1391pixel, 세로 103pixel         (10)

그림입니다.
원본 그림의 이름: CLP000013bc007b.bmp
원본 그림의 크기: 가로 1368pixel, 세로 90pixel          (11)

그림입니다.
원본 그림의 이름: CLP000013bc007c.bmp
원본 그림의 크기: 가로 803pixel, 세로 97pixel     (12)

그림입니다.
원본 그림의 이름: CLP000013bc007d.bmp
원본 그림의 크기: 가로 1045pixel, 세로 91pixel     (13)

The current generation and grid voltage relationships described by (10)-(13) can be summarized by the phasor block diagram of Fig. 9. As can be seen from Fig. 9, (11) and (13) are represented by their conjugate pairs:

그림입니다.
원본 그림의 이름: CLP0000153c020d.bmp
원본 그림의 크기: 가로 1362pixel, 세로 92pixel          (14)

그림입니다.
원본 그림의 이름: CLP0000153c0001.bmp
원본 그림의 크기: 가로 1045pixel, 세로 89pixel     (15)


그림입니다.
원본 그림의 이름: CLP0000153c0006.bmp
원본 그림의 크기: 가로 1000pixel, 세로 776pixel

Fig. 9. Phasor block diagram of the current generation and grid voltage.


It follows from Equs. (10)-(15) that the phasors of the grid currents can be expressed as:

그림입니다.
원본 그림의 이름: CLP0000153c0002.bmp
원본 그림의 크기: 가로 1264pixel, 세로 187pixel   (16)

그림입니다.
원본 그림의 이름: CLP0000153c0003.bmp
원본 그림의 크기: 가로 1044pixel, 세로 192pixel   (17)

It can be seen from (16) and (17) that a grid-inverter system can be viewed as a closed loop system with the common loop gain:

그림입니다.
원본 그림의 이름: CLP0000153c0004.bmp
원본 그림의 크기: 가로 1372pixel, 세로 130pixel          (18)

Then, the system stability can be analyzed through the common loop gain 그림입니다.
원본 그림의 이름: CLP000005d80009.bmp
원본 그림의 크기: 가로 171pixel, 세로 64pixel with the Nyquist stability criterion. It can be seen that if frequency coupling does not exist, that is the accompanying admittance 그림입니다.
원본 그림의 이름: CLP000005d8000a.bmp
원본 그림의 크기: 가로 185pixel, 세로 64pixel = 0, then the loop gain is reduced to:

그림입니다.
원본 그림의 이름: CLP0000153c0005.bmp
원본 그림의 크기: 가로 725pixel, 세로 75pixel   (19)

According to the common loop gain (18) and (19), it is shown that when considering frequency coupling, the equivalent inverter admittance 그림입니다.
원본 그림의 이름: CLP000005d8000b.bmp
원본 그림의 크기: 가로 188pixel, 세로 68pixel is changed from 그림입니다.
원본 그림의 이름: CLP000005d8000c.bmp
원본 그림의 크기: 가로 186pixel, 세로 64pixel to:

그림입니다.
원본 그림의 이름: CLP0000153c0007.bmp
원본 그림의 크기: 가로 1336pixel, 세로 141pixel          (20)

A close investigation of (20) indicates that the incremental inverter admittance 그림입니다.
원본 그림의 이름: CLP0000153c0008.bmp
원본 그림의 크기: 가로 268pixel, 세로 89pixel contributed by the frequency coupling is:

그림입니다.
원본 그림의 이름: CLP0000153c0009.bmp
원본 그림의 크기: 가로 1097pixel, 세로 134pixel   (21)

The incremental inverter admittance is the reason why frequency coupling affects system stability. The mechanism for the generation of this incremental inverter admittance is that when a perturbation voltage at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80006.bmp
원본 그림의 크기: 가로 64pixel, 세로 51pixel is injected into the grid voltage, grid current at frequencies of 그림입니다.
원본 그림의 이름: CLP000005d80006.bmp
원본 그림의 크기: 가로 64pixel, 세로 51pixel and 그림입니다.
원본 그림의 이름: CLP000005d80008.bmp
원본 그림의 크기: 가로 229pixel, 세로 64pixel are generated. Then, the PCC voltage contains voltage at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80008.bmp
원본 그림의 크기: 가로 229pixel, 세로 64pixel due to the grid impedance. Then, the PCC voltage at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80008.bmp
원본 그림의 크기: 가로 229pixel, 세로 64pixel further generates its current component at a frequency of 그림입니다.
원본 그림의 이름: CLP000005d80006.bmp
원본 그림의 크기: 가로 64pixel, 세로 51pixel. Therefore, the inverter admittance is changed due to the grid impedance and frequency coupling of the inverter.



Ⅳ. SYSTEM ANALYSIS AND STABILIZATION


A. System Analysis

The experimental case shown in Fig. 7 in section II is reanalyzed here while considering the frequency coupling. The Bode plots of inverter admittance are illustrated in Fig. 10. They do not consider the frequency coupling YSA(ωp), incremental inverter admittance ΔYinv(ωp) or equivalent admittance Yinv(ωp).


그림입니다.
원본 그림의 이름: image4.png
원본 그림의 크기: 가로 496pixel, 세로 617pixel

Fig. 10. Inverter admittance effects due to frequency coupling, YSA(ωp), ΔYinv(ωp) and Yinv(ωp).


As shown in Fig. 10, the incremental inverter admittance ΔYinv(ωp) mainly affects the inverter equivalent admittance Yinv(ωp) at frequencies around 200Hz both in amplitude and phase. In particular, the phase of Yinv(ωp) is over 90° at around 200Hz. If the grid impedance ZS(ωp) and inverter equivalent impedance Zinv(ωp)=1/Yinv(ωp) intersect in this frequency range, the grid-inverter system is unstable.

Bode plots of 1/YSA(ωp), 1/Yinv(ωp) and ZS(ωp) are shown in Fig. 11. This figure shows that if the frequency coupling is ignored, 1/YSA(ωp) and ZS(ωp) intersect at a frequency of 193Hz and the phase margin is 180° -90° -62° =28°. This implies that the system is stable. However, when frequency coupling is considered, 1/Yinv(ωp) and ZS(ωp) intersect at a frequency of 205Hz and the phase margin of the grid-inverter system is 180° -90°- 92° = -2°. This indicates that the system is unstable. This analysis result meets with the experimental measurements shown in Fig. 7.


그림입니다.
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원본 그림의 크기: 가로 499pixel, 세로 608pixel

Fig. 11. Bode plots of 1/YSA(ωp), 1/Yinv(ωp) and ZS(ωp) when Lg = 3.5 mH.


The case where Lg = 3mH is also analyzed in Fig. 12. As shown in this figure, when the grid impedance changes to 3mH, the frequency coupling still mainly affects the inverter equivalent impedance 1/Yinv(ωp) at frequencies around 200Hz both in the amplitude and phase. With such affection, even the phase margin is decreased from 33° to 6°, and the system is still stable.


그림입니다.
원본 그림의 이름: image7.png
원본 그림의 크기: 가로 498pixel, 세로 626pixel

Fig. 12. Bode plots when Lg = 3mH.


B. Stabilization Design

The analysis in the previous subsection verifies the mechanism analysis of how frequency coupling affects grid-inverter system stability. In the design of a control method to stabilize grid-inverter systems, the frequency coupling should be considered. This section presents a stabilization method based on the equivalent inverter admittance through retuning the bandwidth of the PLL.

It can be found from (21) and (7) that the inverter incremental admittance ΔYinv(ωp) is proportional to the transfer function of the PLL TPLL(ω), that is:

그림입니다.
원본 그림의 이름: CLP0000153c000a.bmp
원본 그림의 크기: 가로 566pixel, 세로 105pixel        (22)

Since TPLL(ω) has the low pass filter property, if the bandwidth fBWPLL of the PLL is reduced, the effect of the frequency coupling on ΔYinv(ωp) moves to the low frequency range. This is helpful for stability improvement. At the same time, the phase at the intersection point of 1/Yinv(ωp) and ZS(ωp) increases, which enhances the phase margin of the grid-inverter system.

With the PLL parameters shown in Table II, the corresponded bandwidth is fBWPLL = 234Hz. If fBWPLL is reduced to 156Hz and 78Hz, the corresponding Bode plots of 1/Yinv(ωp) and ZS(ωp) are shown in Fig. 13.


그림입니다.
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원본 그림의 크기: 가로 493pixel, 세로 618pixel

Fig. 13. Bode plots under different PLL bandwidths.


As shown in Fig. 13, with the decreasing of the PLL bandwidth from 234Hz to 156Hz and 78 Hz, the intersection point of 1/Yinv(ωp) and ZS(ωp) moves from 205Hz to 180Hz and 158Hz, respectively. In addition, the phase margin increases from -2° to 16° and 36°, respectively. This shows that the system stability can be stabilized through decreasing the PLL bandwidth. The lower the PLL bandwidth is, the higher the phase margin becomes.

It is useful to determine the affordable highest PLL bandwidth to stabilize the system under specific grid impedance conditions. The PLL loop gain is 그림입니다.
원본 그림의 이름: CLP0000153c000b.bmp
원본 그림의 크기: 가로 936pixel, 세로 119pixel, and the bandwidth can be solved by 그림입니다.
원본 그림의 이름: CLP0000153c000c.bmp
원본 그림의 크기: 가로 574pixel, 세로 78pixel. The bandwidth fBWPLL of the PLL is determined as:

그림입니다.
원본 그림의 이름: CLP0000153c000d.bmp
원본 그림의 크기: 가로 805pixel, 세로 222pixel     (23)

According to (23), the bandwidth of the PLL can be tuned to k times its original value through the following relationship:

그림입니다.
원본 그림의 이름: CLP0000153c000e.bmp
원본 그림의 크기: 가로 308pixel, 세로 94pixel        (24)

그림입니다.
원본 그림의 이름: CLP0000153c000f.bmp
원본 그림의 크기: 가로 335pixel, 세로 92pixel       (25)

When k < 1, the PLL bandwidth decreases. If k is reduced to the value kmax which lets the loop gain Tlg(ωp) pass through the (-1, 0) point in the Nyquist plane, then kmax is the maximum value of k, which can be determined with:

그림입니다.
원본 그림의 이름: CLP0000153c0010.bmp
원본 그림의 크기: 가로 388pixel, 세로 94pixel     (26)

Where, 그림입니다.
원본 그림의 이름: CLP0000153c0011.bmp
원본 그림의 크기: 가로 969pixel, 세로 145pixel. Solving (26), it is possible to obtain kmax. Through the numerical solution of (26) with the inverter parameters and grid impedance information shown in Tab. I, the following can be solved:

그림입니다.
원본 그림의 이름: CLP0000153c0012.bmp
원본 그림의 크기: 가로 342pixel, 세로 74pixel       (27)

If the PLL bandwidth is set to be lower than kmax×234=215HZ, the system is stabilized. This result justifies the Bode plots in Fig. 13, which show that the grid-inverter system is stable when the PLL bandwidth is 156Hz and 78Hz. In these two cases, the corresponded k is 2/3 and 1/3, respectively.

As another example, when the grid inductor Lg = 4mH, through the numerical solution of (26) with the inverter parameters and grid impedance information, the following can be solved:

그림입니다.
원본 그림의 이름: CLP0000153c0013.bmp
원본 그림의 크기: 가로 345pixel, 세로 78pixel       (28)

The corresponding maximum PLL bandwidth is 그림입니다.
원본 그림의 이름: CLP000015381404.bmp
원본 그림의 크기: 가로 572pixel, 세로 63pixel, then the system is stabilized. k is selected as 2/3 here to coincide with the above case. In addition, Bode plots with different PLL bandwidths are shown in Fig. 14 under Lg = 4mH. The intersection point of 1/Yinv(ωp) and ZS(ωp) moves from 197Hz to 180Hz respectively. In addition, the phase margin increases from -12° to 9.6°. This shows that the system stability can be stabilized through the stabilization method. Retuning the PLL parameters to stabilize a single-phase grid-tied inverter is presented in [19]. From the above investigation, this is also effective for three-phase inverters considering frequency coupling.


그림입니다.
원본 그림의 이름: image9.png
원본 그림의 크기: 가로 496pixel, 세로 623pixel

Fig. 14. Bode plots with different PLL bandwidths under Lg = 4mH.



Ⅴ. EXPERIMENTAL RESULTS

A 5kW prototype three-phase grid-inverter system was built to verify the stability analysis results and the stabilization scheme. The inverter and grid impedance parameters are the same as those in Table I.


A. Stability Analysis Verification

In the analysis in Fig. 12 in Section IV, it is shown that when the grid impedance Lg = 3mH, the grid-inverter system is stable. Experimental results of the PCC voltage and grid currents are shown in Fig. 15. It is observed from this figure that the PCC phase voltage and grid currents exhibit no noticeable distortion. As such, the system is stable. On the other hand, it has been shown in the previous section that when Lg = 3.5mH, the stability analysis considering the frequency coupling implies an unstable grid-inverter system.


그림입니다.
원본 그림의 이름: CLP0000153c0014.bmp
원본 그림의 크기: 가로 1216pixel, 세로 829pixel

Fig. 15. Waveforms of the PCC voltage and three phase grid currents, when Lg = 3mH.


Experimental results have been shown in Fig. 7. When Lg = 4mH, both the stability analysis in Fig. 14 and the experimental results in Fig. 16 express that the system is unstable. The test results demonstrate the correctness of the stability analysis.


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원본 그림의 이름: CLP0000153c0015.bmp
원본 그림의 크기: 가로 1227pixel, 세로 840pixel

Fig. 16. Waveforms of the PCC voltage and three phase grid currents, when Lg = 4mH.


B. Stabilization Scheme Verification

When the grid impedance Lg = 3.5mH and 4mH, the system is unstable, and the stabilization method discussed in the previous section shows that when the PLL bandwidth is reduced to be lower than 215Hz under Lg = 3.5mH and 192Hz under Lg = 4mH, the system becomes stable. In the experiment, the PLL bandwidth is returned to 156Hz, that is k = 2/3, and the corresponded PLL PI parameters are kpp = 5.72 and kpi = 2,536. Fig. 17 and Fig.18 shows the PCC voltage and three phase grid current waveforms using the stabilization scheme under different grid impedances. It can be see that the system response becomes stable since the PCC voltage and current do not exhibit noticeable distortions. Therefore, a proper k can improve the system stability.


그림입니다.
원본 그림의 이름: CLP0000153c0016.bmp
원본 그림의 크기: 가로 1225pixel, 세로 842pixel

Fig. 17. Waveforms of the PCC voltage and three phase grid currents, when Lg = 3.5mH and k = 2/3.


그림입니다.
원본 그림의 이름: CLP0000153c0017.bmp
원본 그림의 크기: 가로 1247pixel, 세로 871pixel

Fig. 18. Waveforms of the PCC voltage and three phase grid currents, when Lg = 4mH and k = 2/3.



Ⅵ. CONCLUSIONS

This paper analysed the mechanism of the frequency coupling to the grid-inverter system stability and presented a stabilization method considering the frequency coupling.

1) It demonstrated that the frequency coupling in a grid-inverter system occurs between the positive and negative sequences, and between the positive and positive sequences.

2) The mechanism of the frequency coupling to the grid-inverter system stability is that an incremental inverter admittance is generated due to the frequency coupling. Then, the equivalent inverter admittance is changed, which may affect the stability evaluation result if the frequency coupling is ignored. In addition, the analysis method presented in this paper shows that system stability can be analysed through Bode plots and the Nyquist criteria, and that it does not necessary to need GNC. This is very helpful for control design since traditional margin information cannot be obtained with GNC [18].

3) Based on equivalent inverter admittance considering frequency coupling, a stabilization scheme through retuning the PLL bandwidth is presented.

4) Experimental results verified the stability analysis and the stabilization scheme.



ACKNOWLEDGMENT

This is supported by the State Grid Project grand no. SGCQDK00PJJS1500069.



REFERENCES

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[2] L. Harnefors, A. Antonopoulos, K. Ilves, and H. P. Nee, “Global asymptotic stability of current-controlled modular multilevel converters,” IEEE Trans. Power Electron., Vol. 30, No. 1, pp. 249-258, Feb. 2015.

[3] P. Shamsi and B. Fahimi, “Dynamic behavior of multiport power electronic interface under source/load disturbances,” IEEE Trans. Ind. Electron., Vol. 60, No. 10, pp. 4500-4511, Oct. 2013.

[4] N. Bottrell, M. Prodanovic, and T. C. Green, “Dynamic stability of a microgrid with an active load,” IEEE Trans. Power Electron., Vol. 28, No. 11, pp. 5107-5119, Nov. 2013.

[5] A. Emadi, “Modeling and analysis of multiconverter DC power electronic systems using the generalized state-space averaging method,” IEEE Trans. Ind. Electron., Vol. 51, No. 3, pp. 661-668, Jun. 2004.

[6] B. Wen, D. Dong, D. Boroyevich, R. Burgos, P. Mattavelli, and Z. Shen, “Impedance-based analysis of grid-synchronization stability for three-phase paralleled converters,” IEEE Trans. Power Electron., Vol. 31, No. 1, pp. 26-38, Jan. 2016.

[7] T. Messo, A. Aapro, and T. Suntio, “Generalized multivariable small-signal model of three-phase grid- connected inverter in DQ-domain,” in Proc. IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL), pp. 1-8, 2015.

[8] M. Cespedes and J. Sun, “Impedance modeling and analysis of grid connected voltage-source converters,” IEEE Trans. Power Electron., Vol. 29, No. 3, pp. 1254-1261, Mar. 2014.

[9] B. Wen, D. Boroyevich, R. Burgos, P. Mattavelli, and Z. Shen, “Inverse Nyquist stability criterion for grid-tied inverters,” IEEE Trans. Power Electron., Vol. 32, No. 2, pp. 1548-1556, Feb. 2017.

[10] S. Vesti, T. Suntio, J. A. Oliver, R. Prieto, and J. A. Cobos, “Impedance-based stability and transient-performance assessment applying maximum peak criteria,” IEEE Trans. Power Electron., Vol. 28, No. 5, pp. 2099-2104, May 2013.

[11] B. Wen, D. Boroyevich, R. Burgos, P. Mattavelli, and Z. Y. Shen, “Analysis of D-Q small-signal impedance of grid- tied inverters,” IEEE Trans. Power Electron., Vol. 31, No. 1, pp. 675-687, Jan. 2016.

[12] Z. Liu, J. Liu, X. Hou, Q. Dou, D. Xue, and T. Liu, “Output impedance modeling and stability prediction of three-phase paralleled inverters with master-slave sharing scheme based on terminal characteristics of individual inverters,” IEEE Trans. Power Electron., Vol. 31, No. 7, pp. 5306-5320, Jul. 2016.

[13] D. Dong, B. Wen, D. Boroyevich, P. Mattavelli, and Y. S. Xue, “Analysis of phase-locked loop low-frequency stability in three-phase grid-connected power converters considering impedance interactions, IEEE Trans. Ind. Electron., Vol. 62, No. 1, pp. 310-321, Jan. 2015.

[14] M. Cespedes and J. Sun, “Three-phase impedance measurement for system stability analysis,” in Proc. IEEE 14th Workshop Control and Modeling for Power Electronics (COMPEL), pp. 1-6, 2013.

[15] M. K. Bakhshizadeh, X. Wang, F. Blaabjerg, J. Hjerrild, L. Kocewiak, C. L. Bak, and B. Hesselbæk, “Couplings in phase domain impedance modeling of grid-connected converters,” IEEE Trans. Power Electron., Vol. 31, No. 10, pp. 6792-6796, Oct. 2016.

[16] A. Rygg, M. Molinas, C. Zhang, and X. Cai, “A modified sequence-domain impedance definition and its equivalence to the dq-domain impedance definition for the stability analysis of ac power electronic systems,” IEEE J. Emerg. Sel. Topic Power Electron., Vol. 4, No. 4, pp. 1383-1396, Dec. 2016.

[17] I. Vieto, X. Du, H. Nian, and J. Sun, “Frequency-domain coupling in two-level VSC small-signal dynamics,” in Proc. 17th Workshop on Control and Modeling for Power Electronics (COMPEL), pp. 1-8, 2017.

[18] X. Du, G. Wang, Y. Shi, Y. Yang, X. Zou, H.-M. Tai, and Y. Ji, “Using asymmetric current controller to improve the stability of grid-inverter system due to PLL effect,” in Proc. 17th Workshop on Control and Modeling for Power Electronics (COMPEL), pp. 1-8, 2017.

[19] H. Wu, X. Ruan, and D. Yang, “Research on the stability caused by phase-locked loop for LCL-type grid-connected inverter in weak grid condition,” in Proc. the Chinese Society for Electrical Engineering, Vol. 34, No. 30, pp. 5259-5268, Oct. 2014 (in Chinese).



그림입니다.
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원본 그림의 크기: 가로 180pixel, 세로 225pixel

Guoning Wang was born in Shandong Province, China, in 1990. He received his B.S. degree in Electrical Engineering from Chongqing University, Chongqing, China, in 2012, where he is presently working towards his Ph.D. degree in Electrical Engineering. His current research interests include renewable energy power conversion and renewable energy system resonance.


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원본 그림의 이름: image15.jpeg
원본 그림의 크기: 가로 163pixel, 세로 225pixel

Xiong Du was born in Hubei Province, China, in 1979. He received his B.S., M.S. and Ph.D. degrees in Electrical Engineering from Chongqing University, Chongqing, China, in 2000, 2002 and 2005, respectively. Since 2002, he has been with Chongqing University, where he is presently working as a Full Professor in the College of Electrical Engineering. From July 2007 to July 2008, he was a Visiting Scholar at the Rensselaer Polytechnic Institute, Troy, NY, USA. His current research interests include switching power converters, power quality control, renewable energy power conversion and renewable energy system resonance.


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원본 그림의 이름: image18.jpeg
원본 그림의 크기: 가로 165pixel, 세로 225pixel

Ying Shi was born in Sichuan Province, China, in 1977. She received her B.S. and M.S. degrees in Electrical Engineering from Chongqing University, Chongqing, China, in 2000 and 2006, respectively. Since 2006, she has been with Chongqing University, where she is presently working as a Lecturer in the School of Automation. Her current research interest include the control of power converters.


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원본 그림의 이름: image16.gif
원본 그림의 크기: 가로 440pixel, 세로 550pixel

Heng-Ming Tai received his B.S. degree in Electrical Engineering from National Tsing Hua University, Hsinchu, Taiwan; and his M.S. and Ph.D. degrees in Electrical Engineering from Texas Tech University, Lubbock, TX, USA, in 1987. He is presently working as a Professor in the Department of Electrical Engineering at the University of Tulsa, Tulsa, OK, USA. His current research interests include signal and image processing and industrial electronics.


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원본 그림의 이름: image17.jpeg
원본 그림의 크기: 가로 169pixel, 세로 225pixel

Yongliang Ji was born in Shanxi, China, in 1979. He received his Ph.D. degree in Electrical Engineering from Chongqing University, Chongqing, China, in 2013. In 2013, he joined the Chongqing Electric Power Company, Chongqing, China. His current research interests include grounding technology in power systems, power transformer fault diagnosis, the inverse problem algorithm and new technology in electrical engineering.