https://doi.org/10.6113/JPE.2019.19.5.1153

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Average Current Control for Parallel Connected Converters

Bassim M. H. Jassim^*, Bashar Zahawi^†, and David J. Atkinson^**

^†Department of Electrical Engineering and Computer Science, Khalifa University, Abu Dhabi, UAE

^*Department of Electrical Engineering, University of Baghdad, Baghdad, Iraq

^**School of Engineering, Newcastle University, Newcastle upon Tyne, ENG, UK

Abstract

A current sharing controller is proposed in this paper for parallel-connected converters. The proposed controller is based on the calculation of the magnitudes of system current space vectors. Good current distribution between parallel converters is achieved with only one Proportional-Integral (PI) compensator. The proposed controller is analyzed and the circulating current impedance is derived for paralleled systems. The performance of the new control strategy is experimentally verified using two parallel connected converters employing Space Vector Pulse Width Modulation (SVPWM) feeding a passive RL load and a 2.2 kW three-phase induction motor load. The obtained test results show a reduction in the current imbalance ratio between the converters in the experimental setup from 53.9% to only 0.2% with the induction motor load.

Key words: Converters, Current control, DC-AC power conversion, PWM converters

Manuscript received Dec. 26, 2018; accepted May 18, 2019

Recommended for publication by Associate Editor Kyo-Beum Lee.

^†Corresponding Author: bashar.zahawi@ku.ac.ae Tel: +971-2-401-8219, Fax: +971-2-447-442, Khalifa University

^*Dept. of Electrical Eng., University of Baghdad, Iraq

^**Sch. of Engineering, Newcastle University, UK

I. INTRODUCTION

Voltage-fed converters are often connected in parallel in high power applications to achieve the required current ratings of the system. Parallel connected converters offer other significant advantages in terms of reliability and system efficiency [1]-[4]. However, these circuits introduce significant issues of their own. One of the most important drawbacks of connecting converters in parallel is the flow of circulating current between the converters. This refers to the unequal distribution of load current between the paralleled converter units. This results in increases in the losses and current distortion, along with a degradation in system reliability, which could potentially damage the converters [5].

Circulating currents exist due to differences in converter parameters, modulation and carrier waveforms, which are impossible to eliminate in practice. To reduce circulating currents, separate (and isolated) sources [6] or isolating transformers [7] can be employed. However, this comes at a considerable price in terms of cost, size and system efficiency. Inter-module reactors employed to limit high frequency ripple currents [8]-[10] are ineffectual in limiting the flow of low frequency circulating current components.

It is possible to eliminate inter-module reactors by sharing converter switching times to remove the circulating current pathway [11]. However, this approach leads to undesirably high dv/dt values. A more cost-effective approach is to use advanced active control techniques to improve the current sharing between parallel connected converters without any galvanic isolation and with much smaller passive components. One such technique is “average current control” [12]-[14] where the instantaneous average value of the converters’ ac phase current is calculated, and the error signal between each of the converter currents and the calculated average value are utilized to modify the reference modulating signal and improve current sharing between converters. However, this requires a critical communications link between the parallel connected units, which produces time delays that have a detrimental effect on system performance and stability [15]. Good current distribution between parallel connected converters can be achieved with minimal communications between converters [16]. However, the current sharing control loop in [16] adopts a low pass filter and a PI controller. As a result, this approach has a trade-off between good current distribution and good voltage regulation. In addition, the presence of the low pass filter can have negative consequences on the dynamic response of the controller. To overcome these limitation, repetitive control can be adopted to control zero- sequence circulating current (ZSCC) without data sharing [17]. All of the active control methods mentioned above offer good current sharing performance at the cost of a heavy computational burden.

A new “average current” sharing control scheme is proposed in this paper for n parallel-connected, three-phase converters. Unlike conventional average current controllers, which are normally based on rotating or stationary reference frame approaches, the proposed control strategy is based on the calculation of the system current space vector magnitudes. The error in the current space vector magnitude signal is used to modify the output voltage amplitude to achieve excellent load current sharing performance without adversely affecting the converter output voltage regulation. Accordingly, only one PI compensator is needed for each of the inner control loops, which significantly reduces the computational requirements of the controller.

Fig. 1 shows a schematic diagram of the proposed system. The n parallel converters use separate but not isolated dc links and small current sharing reactors L_an-L_cn. In this study, the new control scheme is implemented on two parallel voltage-fed SVPWM converters, and its performance is experimentally verified using two 1.25 kVA converters feeding a three-phase passive RL load and a 2.2 kW induction motor load. Excellent current sharing results are achieved with a reduction in the current imbalance ratio between the two converters from 53.9% (with no current sharing control) to only 0.2% (with the proposed average current control strategy).

Fig. 1. Parallel connected converters.

The remainder of this paper is organized as follows. Section II presents an outline of the proposed current sharing control scheme. A mathematical analysis of n-parallel converters with and without the activation of the proposed controller is presented in Section III. It also includes a derivation of the effective circulating current impedance and an examination of the system voltage regulation. The stability of the system and the tuning of the controller parameters are discussed in Section IV. An experimental verification of the performance of the proposed controller is presented in Section V. Some conclusions are given in Section VI.

II. OUTLINE OF THE PROPOSED CONTROLLER

Considering the system shown in Fig. 1, a common mode h^th harmonic current flows in the n parallel converters superimposed on the balanKced three-phase currents because of the closed current paths that exist between the converters. The jth converter ac currents can be written as:

             (1)

where .

The magnitude of the current space vector for the j^th converter |I_j| is then given by:

      (2)

Equation (2) shows that |I_j| contains common mode current Δi_j within its formulation, meaning that it can be used for current sharing control [16]. In this way, each of the converters needs to employ only one PI compensator to achieve equal current sharing and only the number of units in operation needs to be shared instead of three compensators and three pieces of shared information, i.e. the three average values of the converter phase currents [12].

A block diagram of the proposed control scheme is shown in Fig. 2. Two control loops are employed; an external dq load current control loop and an inner current sharing control loop. Fig. 3 shows a block diagram of the load current controller used to provide separate control of the direct and quadrature axis currents. The difference between the jth converter current space vector magnitude and the average of the current space vector magnitudes is fed to a PI compensator which then produces a suitable deviation in the base modulation index. Thus, the current magnitude |I_j| is forced to track the average of the current magnitudes |I_av| and an equal current distribution is obtained.

Fig. 2. Block diagram of the proposed controller.

Fig. 3. Block diagram of the dq current regulator.

III. MATHEMATICAL DESCRIPTION

Parallel-connected converters can be represented by the average equivalent circuit model shown in Fig. 4, where V_j is a dependent voltage source representing the voltage space vector of the j^th converter, and I_j is the corresponding current space vector. In this simple equivalent circuit representation, the inter-module reactors are modelled as an impedance Z_j while the load is represented by a constant current source. This is a reasonable approach since the inductance of the inter-module reactors is normally much lower than the load inductance. V_c is the voltage space vector at the common coupling point, and I_L is the load current space vector. Each PWM converter is represented by a dependent dc voltage source whose value is a function of the modulation index (V_j = M_j V_dc/), where V_dc is the dc link voltage.

Fig. 4. Simple equivalent circuit for n three-phase converters connected in parallel.

A. Uncontrolled System

For an uncontrolled system with no current sharing control, each converter can be represented in block diagram form as shown in Fig. 5. The bias voltage source V_ej is used to model the reduction in the converter output voltage due to switch voltage drops and converter deadtime effects. Using the principle of superposition, the current space vector I_j can be expressed as:

              (3)

The circulating current in the j^th converter, given by the equation I_cirj = I_j - I_av, can then be derived as:

      (4)

where M_av is the average modulation index, and V_eav is the average bias voltage for the n converters. Equation (4) shows that the circulating current has two components; one due to the differences in the values of the modulation indexes and one due to the differences in the dead-time effects and the device voltage drops producing different bias voltage values.

Fig. 5. Converter model in block diagram form without current sharing control.

B. Controlled System

Following the activation of the current sharing control inner loop, each of the converters can be represented by the block diagram model shown in Fig. 6, where G_c(s) is the transfer function of the PI compensator, which is expressed as:

                                 (5)

where K_p and K_i are the proportional and integral gains, and T_i is the integral time constant.

Fig. 6. Inverter block diagram with the proposed average current sharing control.

Assuming a proportional compensator for the sake of simplicity (G_c = k_p), the current space vector of each converter can be defined as:

     (6)

Given the following equation for the circulating current (I_cirj = I_j - I_av):

           (7)

Comparing (7) with (4), the effective circulating current impedance is increased from Z_j to Z_j+K_p(V_dc) by the activation of the proposed current controller. Thus, the circulating current can be significantly reduced with a suitable selection of compensator parameters. Furthermore, the current sharing performance of the parallel connected converters can be made nearly independent of any mismatch in Z_j if the value of K_p(V_dc/) is significantly higher than the impedance of the current sharing reactors.

C. Load Current and Voltage Regulation Analysis

In conventional virtual impedance approaches [16]-[19], the load current I_L, and hence the common coupling point voltage space vector V_c, are significantly affected by the actions of the current sharing controller. This is not the case with the proposed average current controller, which increases the effective impedance seen by the circulating current with no adverse effects on the load current and voltage regulation. This can be verified by comparing the load current space vector equation for the uncontrolled system with the corresponding equations for the system described in [16] and the system employing the proposed average current sharing control strategy.

Fig. 5 shows that the total load current space vector can be obtained from a summation of the current space vectors of the parallel connected modules. Assuming Z₁=Z₂=Z_n=Z, the equation for the uncontrolled system is:

           (8)

In [16], the activation the control strategy produced a load current vector expressed as:

     (9)

Equation (9) shows that the load current in [16] is reduced when compared with the uncontrolled system (equation (8)), since the magnitude of the LPF transfer function is always ＜ 1 at frequencies greater than the filter cut off frequency. This influences the system voltage regulation (i.e. the common coupling point voltage space vector V_c is altered by the current sharing controller).

In contrast, load current vector produced by activation of the average current control strategy proposed in this paper can be calculated from (6) as follows:

                      (10)

which may be simplified to:

     (11)

Equations (8) and (11) are identical, which demonstrates that the load current is not affected by the proposed current sharing controller. The system voltage regulation is not influenced (i.e. the common coupling point voltage space vector V_c is not altered) by the virtual impedance emulation introduced by the proposed current sharing controller.

IV. STABILITY ANALYSIS

An equivalent continuous time model of the current sharing controller that accounts for the sampling time delay and the computation time of the algorithm is needed to tune the PI-compensator within the current sharing controller [20]. Fig. 7 shows a block diagram representation a converter model with the proposed current sharing control scheme, where the sampling and computation delays (T_d) are modelled by an time delay block in the forward path.

Fig. 7. Converter block diagram with average current sharing control considering time delay effects.

The PWM duty cycle is updated twice every carrier period, which produces a computation delay of half a period of the carrier waveform. An additional quarter-carrier period sampling delay is introduced into the control loop since asymmetrical regular sampled PWM is adopted. Thus, the open loop transfer function G is given by:

                            (12)

where , and T_a is the time constant of the current sharing reactors. The proportional gain maximum value can be selected so the open loop gain is unity with a suitable phase margin [21]. Then the open loop phase angle at the crossover frequency is given by:

     (13)

For small values of r, , , and

                              (14)

The maximum value of can be obtained from (14) as:

                                   (15)

Setting the magnitude of to unity at , the maximum possible value of is:

                       (16)

As and [20], equation (16) is simplified to:

                             (17)

K_p is a function of the dc link voltage, the inductance of the current sharing reactors, and the crossover frequency, which in turns depends on the sampling and computation delay ().

The integral time constant is selected so that the assumption is valid. Using a value of gives:

                                     (18)

For a phase margin of 60°, and using the parameters of the experimental system used in this investigation (L=1 mH, r=0.05 Ω, V_dc=202.5 V and T_d=0.125 ms), the system crossover frequency is about 4190 rad/sec (666 Hz), approximately one tenth of the switching frequency (6 kHz) and more than ten times the ac line frequency, which ensures both switching noise immunity and a fast dynamic response [22]. The PI controller gains are and (T_i=0,027 s) and corresponding bode plots of the open loop transfer function are shown in Fig. 8.

Fig. 8. Bode plots of the open loop forward path with the delay effect; K_p=0.036 and K_i=1.33.

V. EXPERIMENTAL VERIFICATION

A test rig based on two parallel, diode front-end, 1.25kVA converters and a 340uF dc link capacitor, was constructed (Fig. 9) to verify the proposed average current control strategy. Both of the converters were supplied from one 50Hz, 5kVA three-phase transformer. Each of the converters was constructed using six discrete IGBTs (IRG7PH35UD1PbF). Six 1mH current sharing reactors with an internal resistance of 0.05Ω were employed. A 12 kHz sampling frequency was chosen to reduce the PWM sampling delay, which results in an increased control bandwidth [21]. The converter switching frequency was 6 kHz. Exaggerated differences in the inter-module reactors and converter PWM dead time were deliberately introduced into the test rig. Three additional 0.1mH inductors were connected in series with the 1mH inter-module reactors (one in each phase) of converter 2. A 20% dead time increment, relative to the first converter, was introduced into the second converter.

Fig. 9. Experimental setup with a passive R-L load. (a) Circuit diagram. (b) Photograph.

(a)

(b)

For the sake of convenience, one TMS320F28335DSP microcontroller using two independent interrupt service routines was used in the experimental test rig to implement the control algorithms. However, in a practical implementation, each of the converters would have independent control hardware. Experimental results were obtained for two different types of load; a passive RL load and an induction motor load.

A. Passive R-L Load

Three single-phase resistors (10Ω ± 10%) and inductors (10mH ± 10%) were used to construct the three-phase passive load of the test rig. A photograph of the test rig with the passive R-L load is shown in Fig. 9(b). Fig. 10(a) shows converter and load current waveforms without any form of current sharing control. It can be seen that there is significant imbalance and distortion. The “current imbalance ratio” between the converters, defined as the difference in the converter currents relative to the total load current, was measured at 37.68%, which leads to uneven thermal stress and likely switch failure. Fig. 10(b) shows current waveforms when the proposed controller is activated. Good current distribution is achieved with a lower distortion and a current imbalance ratio of around 3.3%, despite the presence of a significant imbalance in the load impedances. Fig. 11 demonstrates the transient performance of the proposed controller during an abrupt change in the desired quadrature axis load current from 4A to 6A.

Fig. 10. Experimental current waveforms, passive R-L load (2A/div, 10ms/div). (a) With the current sharing controller de-activated. (b) With the current sharing controller.

(a)

(b)

Fig. 11. Experimental current waveforms, transient response with the current sharing control, passive R-L load (2A/div, 20ms/div).

B. Three-Phase Induction Motor Load

In these tests, the passive R-L load was replaced by a three- phase, 2.2 kW induction motor (with the same previously mentioned deliberate imbalances in the inter-module reactors and switching dead times). Open loop constant Volt/Hertz control with a ramp function was implemented to generate the required SVPWM modulation index. The internal current sharing control loop was not affected by the type of load and it remains intact. Fig. 12(a) shows the stator and converter currents without any form of current sharing control. The current distribution is clearly unequal with a substantial current imbalance ratio of 53.9%. Activation of the proposed average current sharing controller [Fig. 12(b)] results in excellent current sharing between the two converters with a current imbalance ratio of only 0.2%.

Fig. 12. Experimental current waveforms at 50 Hz, induction motor load (2A/div, 10ms/div). (a) With the current sharing controller de-activated. (b) With the current sharing controller.

(a)

(b)

Figs. 13-14 show corresponding current waveforms at lower stator frequencies, which provides further validation of the effectiveness of the proposed control strategy. At 30 Hz, the current unbalance ratio is 58% without current distribution control [Fig. 13(a)] and is reduced to 1.6% when the proposed control is activated [Fig. 13(b)]. Similarly, at 20 Hz, the current unbalance ratio was reduced from 61% without current control [Fig. 14(a)] to 1.8% when the proposed controller was activated [Fig. 14(b)]. Better current sharing performance was obtained at higher frequencies due to the increase in the circulating current impedance.

Fig. 13. Experimental current waveforms at 30 Hz, induction motor load (2A/div, 10ms/div). (a) With the current sharing controller de-activated. (b) With the current sharing controller.

(a)

(b)

Fig. 14. Experimental current waveforms at 20 Hz, induction motor load (2A/div, 10ms/div). (a) With the current sharing controller de-activated. (b) With the current sharing controller.

(a)

(b)

VI. CONCLUSION

A new average current control method, based on the calculation of the current space vector magnitude, is proposed in this paper for current sharing control in parallel connected three-phase converters. The proposed current sharing control method requires each converter to use only one PI compensator in the current sharing control loop. The proposed method achieves an excellent current distribution with no adverse effects on the converter common coupling point voltage. This strategy is demonstrated with two parallel connected converters employing conventional Space Vector PWM (SVPWM). However, it can be used with any PWM control scheme and can be straightforwardly extended to more than two converter units.

The proposed controller is experimentally verified using a test circuit comprised of two parallel connected, 1.25kVA three-phase voltage fed converters. The obtained results show that the new average current control strategy achieves good current distribution between the converters. In addtion, it reduces the value of the imbalance current ratio in the laboratory test circuit from 53.9% to only 0.2% when driving a three-phase induction motor load.

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Bassim M. H. Jassim received his B.S. and M.S. degrees in Electrical Engineering from Baghdad University, Baghdad, Iraq, in 1989 and 1996, respectively. He received his Ph.D. degree in Electrical Engineering from Newcastle University, Newcastle upon Tyne, ENG, UK, in 2014. From 1989 to 1991, he was a Research Engineer with the Commission of Research and Development at the Ministry of Industry, Baghdad, Iraq. From 1996 to 2001, he was a Researcher with the State Company for Electronic Systems, Baghdad, Iraq. In 2001, he joined the faculty of the Department of Electrical Engineering, University of Baghdad, Baghdad, Iraq, where he is presently working as a Lecturer. His current research interests include power electronics, three-phase converter design and control, parallel converter operation and power factor regulation.

Bashar Zahawi received his B.S. and Ph.D. degrees in Electrical and Electronic Engineering from Newcastle University, Newcastle upon Tyne, ENG. UK, in 1983 and 1988, respectively. From 1988 to 1993, he was a Design Engineer with a UK manufacturer of large variable speed drives and other power conversion equipment. He was appointed as a Lecturer of Electrical Engineering at the University of Manchester, Manchester, ENG, UK, in 1994. He was a Senior Lecturer in the School of Electrical and Electronic Engineering, Newcastle University, from 2003 to 2014. In 2014, he joined the Department of Electrical Engineering and Computer Science, Khalifa University, Abu Dhabi, UAE, where he is presently working as a Professor of Electrical Power Engineering. His current research interests include, power conversion and renewable energy generation. Dr Zahawi was a recipient of the Crompton Premium awarded by the Institution of Electrical Engineers, UK; and a Denny Medal awarded by the Institute of Marine Engineering, Science and Technology (IMarEST), UK. 

David J. Atkinson received his B.S. degree from Sunderland Polytechnic, Sunderland, ENG, UK, in 1978; and his Ph.D. degree from Newcastle University, Newcastle upon Tyne, ENG, UK, in 1991. He is presently working as a Senior Lecturer in the Electrical Power Group within the School of Engineering, Newcastle University. His current research interests include electrical drive systems and power electronics control for new and renewable energy systems.  Prior to his university appointment in 1987, Dr Atkinson had spent 17 years in the electronics industry in the U.K., including periods with NEI Electronics, Gateshead, ENG, UK, and the British Gas Corporation, Cramlington, ENG, UK. He was a recipient of a Power Premium Prize from the Institution of Electrical Engineers, UK.