사각형입니다.

https://doi.org/10.6113/JPE.2019.19.5.1182

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718



Soft-Switching T-Type Multilevel Inverter


Tianyu Chen and Mehdi Narimani*


Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA

*Department of Electrical and Computer Engineering, McMaster University, Hamilton, ON, Canada



Abstract

In order to improve the conversion efficiency and mitigate the EMI problem of conventional hard-switching inverters, a new soft-switching DC-AC inverter with a compact structure and a low modulation complexity is proposed in this paper. In the proposed structure, resonant inductors are connected in series for the arm branches, and resonant capacitors are connected in parallel for the neutral point branches. With the help of resonant components, the proposed structure achieves zero-current switching on the arm branches and zero-voltage switching on the neutral point branches. When compared with state-of-art soft-switching topologies, the proposed topology does not need auxiliary switches. Moreover, the commutation algorithm to realize soft-switching can be easily implemented. In this paper, the principle of the resonant operation of the proposed soft-switching converter is presented and its performance is verified through simulation studies. The feasibility of the proposed inverter is evaluated experimentally with a 2.4-kW prototype.


Key words: Multilevel inverter, Soft switching, T-type topology, ZVZCS


Manuscript received Dec. 22, 2018; accepted May 29, 2019

Recommended for publication by Associate Editor Younghoon Cho.

Corresponding Author: tianyuchen0925@hotmail.com Tel: +1-979-324-3980, University of Texas at Dallas

*Dept. of Electr. and Comput. Eng., McMaster University, Canada



Ⅰ. INTRODUCTION

Multilevel inverters have been widely utilized in high power conversion systems due to their ability to reduce the harmonic distortion of the AC-side waveforms and the voltage stress of power semiconductors [1]. The topologies of conventional multilevel inverters include diode-clamped multilevel inverters, capacitor-clamped multilevel inverters, T-type multilevel inverters, nested multilevel inverters, cascaded H-bridge multilevel inverters, and modular multilevel inverters [1]-[7]. All of these topologies operate at the hard-switching mode, which results om extra switching losses and high dv/dt problems.

One of the aforementioned topologies, which is very attractive for industrial applications, is the hard-switching T-type inverter [7]. However, due to the severe commutation condition of the hard-switching mode for this topology, a high voltage drop and a high current appeared at the same time on the switches during very short turn-on and turn-off transients, which introduces considerable switching losses. The reverse recovery current of the freewheeling diode and the tailing current of the IGBT make the switching losses and EMI problem even worse. These switching losses limit the switching frequency of the converters for medium-power and high-power applications [1].

The severe commutation condition also results in a high voltage overshoot due to the stray inductance of the commutation loop and a high current overshoot due to the reverse recovery effect of the freewheeling diodes. Fast changes of the voltage during switching transients also leads to a high dv/dt problem, which is the source of conducted emissions and radiated emissions [8]. The high dv/dt at the output voltage also causes a transmission line effect for long cables which is unfriendly for loads [9], [10]. Soft-switching techniques are possible solutions to mitigate these problems for multilevel DC-AC inverters.

Soft-switching techniques for DC-AC inverters have been developing for the past several decades [11]-[27]. These techniques can be categorized as: resonant DC-link based inverters [12]-[14], resonant pole based inverters [15]-[17], AC-link based inverters [18]-[20], and soft-switching multilevel inverters [21]-[27]. With the help of auxiliary switches and different resonant principles, the zero-voltage switching or zero-current switching can be obtained for these topologies. The soft-switching techniques helps reduce switching losses and decrease dv/dt significantly. Therefore, the volume of the heat sink and the EMI filter can be easily reduced. The soft-switching topology can also help to improve the switching frequency of the inverter, and the volume of the output filter can be reduced. At the same time, the soft- switching topology provides a good commutation condition. As a result, the dynamic voltage average problem is solved and the power semiconductors can be easily connected in series to construct high voltage inverters.

However, all of the aforementioned topologies have disadvantages that limit their application. The auxiliary resonant commutated pole converter is constructed by paralleling the main switches with a resonant capacitor and importing an auxiliary commutation branch. In this structure, the extra active switches and passive components increase the complexity of the inverter. AC-link based inverters need very few passive components and do not need auxiliary switches. However, their commutation and modulation algorithms are too complicated to implement.

T-type based soft-switching multilevel inverters with passive snubber circuits were proposed in [21]-[23]. Although these topologies can achieve zero-voltage zero-current switching, additional diodes, capacitors and inductors are required as passive snubber circuits. This requirement increases the volume and total cost of the converter. Soft-switching topologies with active snubber circuits for T-type three-level converters were proposed in [24]-[26]. The additional power semiconductors and passive components significantly increase the control complexity and reduce the robustness of the converters. All of the state-of-art soft-switching techniques for T-type converters need additional semiconductors, capacitors, and inductors of the auxiliary commutation circuits. This increases the number of components, size, overall cost, and control complexity.

The quasi-resonant technique has been fully researched in DC-DC conversion applications [28]-[31]. With the help of quasi-resonant operation, the switching losses can be significantly decreased. However, all of these studies focused on DC-DC converters. The converter output voltage magnitude can be regulated with quasi-resonant technique, but the voltage polarity cannot be changed.

A new T-type zero-voltage zero-current switching (ZVZCS) three-level converter [27] is introduced in this paper. The proposed topology combines the T-type structure and the quasi-resonant technique. In this structure, the resonant inductors are connected in series with the arm branches, and the resonant capacitors are connected in parallel with the neutral point branches. When compared with conventional soft-switching DC-AC topologies [11]-[26], this topology has a compact structure and does not require auxiliary power semiconductors. The number of passive components is also reduced. In this paper, the operation of the soft-switching T-type DC-AC converter is explained in greater detail and more analysis are added for soft-switching operation. The parameter analysis and the selection of circuit components are also illustrated. Moreover, a loss calculation and a FFT analysis are added and compared to conventional hard- switching converters. Experimental results are also added to this paper to validate the feasibility of the proposed soft- switching converter.

This paper is organizing as follows. The operation principle of the proposed soft-switching T-type multilevel converter is presented in Section II. In Section III, the parameter analysis and design considerations are illustrated. The results of simulations, loss calculations, and FFT analyses are shown in section IV. Section V demonstrates the results of an experimental implementation. Finally, some conclusions are given in section VI.



Ⅱ. OPERATION PRINCIPLE OF THE PROPOSED INVERTER


A. Conventional T-Type Inverter

The topology of a conventional single-phase T-type three- level inverter is shown in Fig. 1. In the T-type inverter, each phase is constructed by one bidirectional switch and two unidirectional switches [2]. The bidirectional switches provide a controllable path between the load terminal and the neutral point of the inverter. A three-level output voltage can be generated by selecting different switches to be turned on [27].


그림입니다.
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Fig. 1. Conventional single-phase T-type three-level inverter.


The voltage from the load terminal to the neutral point is ½ Vdc when T1 is ON, it is -½ Vdc when T2 is ON, and it is zero when the bidirectional switch T0 is ON. Through a proper modulation algorithm, such as three-level SPWM or SVPWM, a sinusoidal output can be obtained. It should be noted that, for hard-switching operation, the dead band must be preserved between two different switching states.


B. Proposed Soft-Switching T-Type Inverter

Fig. 2 shows the proposed single-phase soft-switching T-type three-level inverter. Two resonant inductors Lr1 and Lr2 are connected in series with the switches T1 and T2, respectively. In addition, a resonant capacitor Cr is connected in parallel with the bidirectional switch T0. This circuit structure determines the zero-voltage turn-off for T0 and the zero-current turn-on for both T1 and T2. By designing an accurate turn-on time for T0 and accurate turn-off times for T1 and T2, the zero-voltage turn-on for T0 and the zero-current turn-off for T1 and T2 can be obtained.


그림입니다.
원본 그림의 이름: image2.png
원본 그림의 크기: 가로 750pixel, 세로 561pixel

Fig. 2. Proposed single-phase soft-switching T-type three-level inverter.


As shown in Fig. 2, the proposed soft-switching T-type inverter has a symmetrical structure, which means that during a positive half-cycle, T0 and T1 turn on and off alternatively to generate output voltage, while during a negative half-cycle, T0 and T2 switch alternatively to generate output voltage.

The switching states and corresponding circuit states of the proposed soft-switching T-type inverter are shown in Table I and in Fig. 3. Since the proposed topology has a symmetrical structure, operation during the positive half-cycle of a sinusoidal period is similar to operation during the negative half-cycle. For the sake of simplicity, only the resonant modes during the positive half-cycle are analyzed.


TABLE I SWITCHING STATE AND CIRCUIT STATE

 

Switching State

Circuit State

Positive

half-cycle

T0 ON, T1 OFF

T0 Freewheeling

T0 OFF, T1 ON

Quasi-Resonant

T0 OFF, T1 OFF

D1 Freewheeling

Negative

half-cycle

T0 ON, T2 OFF

T0 Freewheeling

T0 OFF, T2 ON

Quasi-Resonant

T0 OFF, T2 OFF

D2 Freewheeling


그림입니다.
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원본 그림의 크기: 가로 621pixel, 세로 980pixel

Fig. 3. Circuit states. (a) T0 is ON and T1 is OFF. (b) T0 is OFF and T1 is ON. (c) T0 and T1 are OFF.


그림입니다.
원본 그림의 이름: image6.png
원본 그림의 크기: 가로 618pixel, 세로 253pixel

Fig. 4. Equivalent circuit when T0 is OFF and T1 is ON.


During the positive half-cycle, assuming that the initial state of the inverter is T0 freewheeling. T0 is in the turn-on state with a load current and T1 is in the turn-off state. At the initial state, the output voltage is zero. At time zero, T0 is turned off with ZVS due to a parallel-connection with Cr. T1 is turned on with ZCS since this switch is in a series- connection with Lr1. From this moment, the resonant process begins. Ignoring the voltage drop of the power semiconductors, an equivalent circuit during the resonant process is shown in Fig. 4. The relationship between the voltage of resonant capacitor and the current of the resonant inductor is described by (1) and (2). The initial conditions of the resonant process are given as 그림입니다.
원본 그림의 이름: image3.png
원본 그림의 크기: 가로 878pixel, 세로 335pixel and 그림입니다.
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원본 그림의 크기: 가로 805pixel, 세로 335pixel.

그림입니다.
원본 그림의 이름: image7.png
원본 그림의 크기: 가로 1389pixel, 세로 518pixel          (1)

그림입니다.
원본 그림의 이름: image8.png
원본 그림의 크기: 가로 1587pixel, 세로 518pixel          (2)

By defining the characteristic impedance and resonant frequency of the resonant network, which are 그림입니다.
원본 그림의 이름: image9.png
원본 그림의 크기: 가로 836pixel, 세로 635pixel and 그림입니다.
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원본 그림의 크기: 가로 1024pixel, 세로 601pixel, the capacitor voltage 그림입니다.
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원본 그림의 크기: 가로 273pixel, 세로 301pixel and inductor current 그림입니다.
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원본 그림의 크기: 가로 221pixel, 세로 301pixel can be given by (3) and (4), respectively.

그림입니다.
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원본 그림의 크기: 가로 2975pixel, 세로 518pixel          (3)

그림입니다.
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원본 그림의 크기: 가로 3173pixel, 세로 584pixel          (4)

(3) and (4) can be further simplified and given as (5) and (6).

그림입니다.
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원본 그림의 크기: 가로 2276pixel, 세로 518pixel          (5)

그림입니다.
원본 그림의 이름: image16.png
원본 그림의 크기: 가로 2077pixel, 세로 567pixel          (6)

where:

그림입니다.
원본 그림의 이름: image17.png
원본 그림의 크기: 가로 2057pixel, 세로 434pixel          (7)

그림입니다.
원본 그림의 이름: image18.png
원본 그림의 크기: 가로 1692pixel, 세로 335pixel          (8)

To obtain ZVS for the neutral point branch and ZCS for the arm branch, (9) and (10) should be satisfied. (9) makes sure the neutral point switch voltage can be decreased to zero, and (10) makes sure the arm switch current can be decreased to a negative value. According to the definition in (7), it is possible to find that (9) and (10) are always satisfied.

그림입니다.
원본 그림의 이름: image19.png
원본 그림의 크기: 가로 742pixel, 세로 301pixel          (9)

그림입니다.
원본 그림의 이름: image20.png
원본 그림의 크기: 가로 909pixel, 세로 301pixel          (10)

During the resonant process, the maximum voltage on the neutral point switch and the maximum current on the arm switch are given by (11) and (12). The voltage stress and current stress provide a guide to select semiconductor switches. Typically, a high resonant impedance gives a high voltage stress and a low current stress on the switches, while a low resonant impedance gives a low voltage stress and a high current stress on the switches. The current stress for the neutral point switches is the same as the conventional T-type converter.

그림입니다.
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원본 그림의 크기: 가로 1504pixel, 세로 518pixel          (11)

그림입니다.
원본 그림의 이름: image22.png
원본 그림의 크기: 가로 1326pixel, 세로 567pixel          (12)

If T1 is turned off when the free-wheeling diode is conducting, i.e. iLr is negative, ZCS of T1 is achieved. The beginning of this interval is given as (13), and (14) shows the ending of this interval. The middle time point T1on is defined and given by (15).

그림입니다.
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원본 그림의 크기: 가로 972pixel, 세로 567pixel          (13)

그림입니다.
원본 그림의 이름: image24.png
원본 그림의 크기: 가로 659pixel, 세로 567pixel          (14)

그림입니다.
원본 그림의 이름: image25.png
원본 그림의 크기: 가로 1889pixel, 세로 567pixel          (15)

The instant when the resonant capacitor voltage uCr decreases to zero is given by (16). This moment is defined as Ton, and it is a constant value. If T0 is turned on at this moment, ZVS for T0 can be achieved.

그림입니다.
원본 그림의 이름: CLP000000e822e3.bmp
원본 그림의 크기: 가로 246pixel, 세로 149pixel          (16)

After T0 is turned on, the freewheeling state can be sustained as long as necessary.

The interval of the freewheeling state where T0 turns on is defined as Toff, which is a controllable input variable for the proposed soft-switching T-type inverter. The next resonant cycle repeats after the freewheeling state ends. This resonant principle guarantees soft-switching operation for all of the switches.

In the following, a principle based on pulse density modulation is presented to generate a sinusoidal voltage for an AC load. The average output voltage, during the resonant process, can be calculated by (17).

그림입니다.
원본 그림의 이름: CLP000003043b04.bmp
원본 그림의 크기: 가로 1233pixel, 세로 357pixel         (17)

During the interval of the freewheeling state, the output voltage is zero. This interval can be sustained as long as necessary. Therefore, the output voltage can be modulated by selecting an appropriate T0ff. (18) shows how an appropriate T0ff is chosen according to the pulse density modulation theorem.

그림입니다.
원본 그림의 이름: image30.png
원본 그림의 크기: 가로 2703pixel, 세로 584pixel          (18)

where Vref is the reference output voltage magnitude. Therefore, Toff can be expressed by (19).

그림입니다.
원본 그림의 이름: image31.png
원본 그림의 크기: 가로 2453pixel, 세로 734pixel          (19)

A diagram of the proposed modulation method is shown in Fig. 5 and is summarized as follows.


그림입니다.
원본 그림의 이름: CLP000000e80001.bmp
원본 그림의 크기: 가로 952pixel, 세로 888pixel

Fig. 5. Modulation principle of the proposed soft-switching T-type inverter.


At the beginning of each resonant cycle, the load current IL is sampled and the turn on time of T1 is calculated through (15). Then the turn on time of T0 is calculated by (19). The turn off time of T0 is calculated by (16), which is a constant value. Then T1 turns on, T0 turns off and the resonant cycle begins. Two timers are required to implement the modulation algorithm. Timer1 counts T1on and after the T1on interval, T1 turns off with ZCS. Timer2 counts Ton and after the Ton interval, T0 turns on with ZVS. Then timer2 resets and Toff starts counting. After the Toff interval, the load current is sampled again and the same calculations should be done for the next pulse cycle.

The aforementioned principle can be applied to the negative half-cycle with minor changes, where 그림입니다.
원본 그림의 이름: image33.png
원본 그림의 크기: 가로 1222pixel, 세로 335pixel has a negative sign. It should be noted that the reference direction of IL should be changed when calculating the turn-on time of the lower arm switch T2. Fig. 6 shows a typical waveform for this operation principle.


그림입니다.
원본 그림의 이름: image32.png
원본 그림의 크기: 가로 926pixel, 세로 691pixel

Fig. 6. Operation principle of the proposed soft-switching T-type inverter. (a) uCr and T0 gate signal. (b) iLr and T1 gate signal. (c) Load current.


C. Proposed Three-Phase Soft-Switching T-Type Inverter

Fig. 7 shows a topology diagram of the proposed three- phase soft-switching T-type inverter. Each of the phases is modulated and controlled individually, which is similar to single-phase modulation. The only difference is that the modulating signals should be phase-shifted by 120 degrees.


그림입니다.
원본 그림의 이름: image38.png
원본 그림의 크기: 가로 1047pixel, 세로 529pixel

Fig. 7. Topology diagram of the proposed three-phase soft- switching T-type inverter.


In order to improve the voltage utilization of the DC-link, the third-harmonic can be injected into the modulation scheme. With the help of third-harmonic injection modulation, the output voltage magnitude can be 15.5% higher than the modulation algorithm given by (18) and (19) at the same voltage rating of the DC-link. A modulation algorithm with third-harmonic injection is given by (20) and (21).

그림입니다.
원본 그림의 이름: 20.PNG
원본 그림의 크기: 가로 1099pixel, 세로 352pixel그림입니다.
원본 그림의 이름: 20.PNG
원본 그림의 크기: 가로 1099pixel, 세로 352pixel             (20)

그림입니다.
원본 그림의 이름: 21.PNG
원본 그림의 크기: 가로 1333pixel, 세로 364pixel그림입니다.
원본 그림의 이름: 21.PNG
원본 그림의 크기: 가로 1333pixel, 세로 364pixel         (21)



Ⅲ. DESIGN CONSIDERATIONS FOR THE SOFT-SWITCHING T-TYPE INVERTER


A. Parameters Design of the Soft-Switching T-Type Inverter

The critical parameters of the soft-switching T-type inverter include the output current, output voltage, DC-link voltage, characteristic impedance and resonant frequency. To reduce the DC-link voltage and the voltage stress of the components, third-harmonic injection modulation is implemented when designing the parameters of the soft-switching T-type inverter.

For a 2.4-kW prototype with an output phase voltage of 110Vrms and a line frequency of 60Hz, the line current can be calculated by (22). At unit power factor, the line current is calculated as 7.3Arms.

그림입니다.
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원본 그림의 크기: 가로 1869pixel, 세로 584pixel          (22)

With the third-harmonic injection modulation, the minimum DC-link voltage is given by (23). For a 110Vrms output voltage, the minimum DC-link voltage is 270V, and consider the voltage fluctuation of the neutral point, the DC-link voltage is selected as 300V.

그림입니다.
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원본 그림의 크기: 가로 1577pixel, 세로 368pixel          (23)

The resonant frequency determines the size of the resonant components and the size of the output filter. A higher resonant frequency can significantly decrease the inductance and the capacitance of the resonant network. To show the advantages of the proposed soft-switching T-type inverter, the resonant frequency is selected in the range from 50kHz to 100kHz.

The characteristic impedance determines the voltage stress of the resonant capacitor and the current stress of the resonant inductor. Since the neutral point switch is paralleled with the resonant capacitor, they have the same voltage stress. Since the arm switch is in series with the resonant inductor, they have the same current stress. When compared with the conventional hard-switching T-type inverter, the proposed soft-switching T-type inverter has extra voltage stress for the neutral point switch as given in (24), and extra current stress for the arm switch as given in (25).

그림입니다.
원본 그림의 이름: image41.png
원본 그림의 크기: 가로 2609pixel, 세로 434pixel          (24)

그림입니다.
원본 그림의 이름: image42.png
원본 그림의 크기: 가로 2088pixel, 세로 734pixel          (25)

To limit the voltage stress, it is fair to assume that (26) is satisfied, so the extra voltage stress is less than the DC-link voltage.

그림입니다.
원본 그림의 이름: image43.png
원본 그림의 크기: 가로 3026pixel, 세로 434pixel          (26)

To limit the current stress, it is fair to assume that (27) is satisfied, so the extra current stress is less than twice the peak line current.

그림입니다.
원본 그림의 이름: image44.png
원본 그림의 크기: 가로 2557pixel, 세로 734pixel          (27)

For most applications, the range of the characteristic impedance can be calculated and is given by (28).

그림입니다.
원본 그림의 이름: image45.png
원본 그림의 크기: 가로 1670pixel, 세로 635pixel          (28)

Considering that the resonant inductor is heavier and occupies a larger area than the resonant capacitor, for the first prototype, a lower characteristic impedance is selected which is given by (29). It should be noted that 그림입니다.
원본 그림의 이름: image46.png
원본 그림의 크기: 가로 210pixel, 세로 301pixel is the peak line current.

그림입니다.
원본 그림의 이름: image47.png
원본 그림의 크기: 가로 774pixel, 세로 567pixel          (29)

The resonant frequency is selected to be around 70kHz. According to the definition of the characteristic impedance and resonant frequency, the parameters of the resonant network are calculated as 그림입니다.
원본 그림의 이름: image48.png
원본 그림의 크기: 가로 1045pixel, 세로 301pixel and 그림입니다.
원본 그림의 이름: image49.png
원본 그림의 크기: 가로 1045pixel, 세로 301pixel.


B. Voltage and Current Stress of the Components

With the design parameters, the voltage and current stress of the passive components and semiconductor switches can be calculated. The neutral point switch and the resonant capacitor have the same voltage stress, which is given by (30).

그림입니다.
원본 그림의 이름: image50.png
원본 그림의 크기: 가로 2995pixel, 세로 518pixel          (30)

According to (30), the voltage stress of the neutral point branch is 317.7V. The current stress of the neutral point switch is the peak line current, which is 10.3A.

The arm switch and the resonant inductor have the same current stress, which is given by (31).

그림입니다.
원본 그림의 이름: image51.png
원본 그림의 크기: 가로 2223pixel, 세로 734pixel          (31)

According to (31), the current stress of the arm branch is 33.4A. The voltage stress of the arm switch is given by (32), which is calculated as 467.7V for the prototype.

그림입니다.
원본 그림의 이름: image54.png
원본 그림의 크기: 가로 2892pixel, 세로 434pixel          (32)

With the calculated voltage and current stress, the passive components and semiconductor switches can be selected.



Ⅳ. SIMULATION RESULTS AND LOSS ANALYSIS


A. Simulation Results

To verify the proposed modulation algorithm of the soft- switching T-type inverter, simulation studies are implemented through MATLAB/Simulink. The simulation parameters are given as 그림입니다.
원본 그림의 이름: image55.png
원본 그림의 크기: 가로 920pixel, 세로 301pixel, 그림입니다.
원본 그림의 이름: image48.png
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Fig. 8 shows simulation results of the output voltage and current. For a comparison with a conventional hard-switching converter, a FFT analysis is implemented for the phase voltage, and the result is shown in Fig. 9. It can be seen that the high frequency noise is effectively suppressed. Unlike the conventional hard-switching converter, which has high harmonics located at the switching frequency and its extension, the proposed soft-switching converter utilizes pulse density modulation and the harmonics caused by the switching action are spread to a wide range. These characteristics make it easier for the proposed soft-switching converter to meet EMI standards when connected to a power grid.


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Fig. 8. Simulation results of the proposed three-phase soft- switching T-type inverter. (a) Voltage from the terminal to the neutral point VABCO. (b) Line-to-line voltage VAB, VBC, and VCA. (c) Output current iabc.


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Fig. 9. FFT analysis of simulated phase voltage.


According to the obtained simulation results, the THD of the terminal to neutral point voltage VABCO is 117.59%, the THD of the line-to-line voltage is 95.02%, and the THD of the output current iabc is 0.99%.


B. Loss Calculation and Comparison

In order to compare the efficiency of the proposed inverter with a conventional hard-switching inverter, a conventional T-type inverter was also designed and simulated at the same voltage and power ratings.

The power switches of both inverters are IKW40N120H3. The bidirectional switch is constructed by two IGBTs that are connected in anti-series. The switching frequency of the hard- switching T-type inverter is 20 kHz. Based on the datasheet of the IKW40N120H3, the voltage drop and switching loss are given in Table II.


TABLE II  LOSS PARAMETERS OF THE IKW40N120H3

 

Expression

VCE (V)

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VF (V)

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Eon (mJ)

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Eoff (mJ)

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The conduction loss for one switch is calculated by (33), where T is a fundamental period. The total conduction loss is the sum of three neutral point switches and six arm switches.

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The switching loss for one switch is calculated by (34). Since the reverse recovery loss is not given in the datasheet, this loss is ignored when calculating the total loss of the hard- switching T-type inverter. The total switching loss is the sum of three neutral point switches and six arm switches.

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Considering the ESR of resonant inductors, the loss of the resonant inductors must be calculated. The resonant inductors utilized in these experiments are SRP1770TA-2R2Ms which give a total ESR of 19.2mΩ for each arm [32]. The resonant inductor loss for one arm is calculated by (35). The total ESR loss of the resonant inductors is the sum of six arms.

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The core loss of the resonant inductor is also estimated. According to the Steinmetz equation, which is given in (36), the core loss is related to the core material (그림입니다.
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Considering the voltage drop on the semiconductors and the ESR of the resonant inductors, the voltage of the resonant capacitor cannot go back to zero exactly after one resonant period is over. The remaining voltage on the resonant capacitor causes extra switching loss for the soft-switching T-type inverter. The extra switching loss for one neutral point switch is calculated by (37), where VCr0 is the remaining voltage of the resonant capacitor, which is about 5V. The total extra switching loss is the sum of three neutral point switches.

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For the conventional hard-switching T-type inverter, the conduction loss and switching loss are considered. For the proposed soft-switching T-type inverter, the conduction loss, the extra switching loss, and resonant inductor loss are considered. The results of the loss calculation are shown in Table III. As can be seen from the table, the dominant power loss in the proposed soft-switching inverter is the conduction loss of the arm switches. Meanwhile, for the hard-switching inverter, the dominant power loss is the switching loss of both the arm switches and the neutral point switches.


TABLE III  POWER LOSS COMPARISON BETWEEN THE PROPOSED SOFT-SWITCHING INVERTER AND A CONVENTIONAL HARD-SWITCHING INVERTER

Load

 

Power Loss (W)

25%

50%

75%

100%

Hard Switching

Inverter

Proposed

ZVZCS

Inverter

Hard Switching

Inverter

Proposed

ZVZCS

Inverter

Hard Switching

Inverter

Proposed

ZVZCS

Inverter

Hard Switching

Inverter

Proposed

ZVZCS

Inverter

Conduction losses of arm switches

4.62

37.79

10.01

40.26

16.04

44.48

22.55

50.15

Conduction losses of neutral point switches

4.64

4.57

9.85

9.47

15.67

14.74

22.10

20.40

Switching losses of arm switches

33.64

-

49.71

-

65.96

-

82.18

-

Switching loss of neutral point switches

33.85

7.20

50.43

7.20

67.22

7.20

84.16

7.20

Resonant inductor losses

-

7.73

-

8.82

-

10.55

-

12.86

Efficiency

87.87%

91.07%

90.40%

94.76%

91.07%

95.83%

91.25%

96.23%


It can be seen that although the proposed soft-switching T-type inverter has higher conduction losses, the total power losses have been significantly reduced when compared with the conventional hard-switching inverter, which is about 5% in the full-load condition.

It should also be noted that the switching frequency of the proposed inverter is almost three time higher than that of the hard-switching inverter. Thus, the proposed inverter has a better output THD for a given output filter.



Ⅴ. EXPERIMENTS

A prototype of the proposed inverter with a rated output power of 2.4 kW was made to verify the feasibility of the new topology. To show the advantage of the soft-switching inverter, the resonant frequency was set to a relative high value, which is 66.8 kHz. All of the design parameters of the prototype are the same as those of the simulation model. The selection of the passive components and semiconductor switch are shown in Table IV.


TABLE IV  PARAMETERS OF THE EXPERIMENT SETUP

Component

Value

Resonant Inductor

SRP1770TA-2R2M

Resonant Capacitor

B32654A7334J

IGBT

IKW40N120H3


The resonant inductor is constructed by 8 high current shielded SMD inductors that are connected in series. The part number of the resonant inductor is SRP1770TA-2R2M. The capacitance of the resonant capacitor is 0.33μF, which gives a characteristic impedance of 7.3Ω. According to (32) and (31), the voltage stress of the arm switches is 467.7V, and the current stress of the arm switches is 33.4A. 1200V 40A IGBT IKW40N120H3s are selected for both the neutral point switches and the arm switches since they can provide enough of a voltage margin. It should be noted that 650V IGBTs can also be utilized, and that they achieve a higher operation efficiency.

The experiment setup is shown in Fig. 10. In the power circuit, 6 arm switches and 3 neutral point switches are driven by 9 isolated gate drivers. It should be noted that, since all of the switches are working in soft-switching mode, a 0-Ω external gate resistor can be chosen. The inverter is controlled by a TMS320F28335. The three-phase load is constructed by power resistors and inductors. For each phase, it contains a resistor bank and an inductor bank, which give a total resistance of 15Ω and a total inductance of 6mH.


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Fig. 10. Experimental setup.


To validate the soft-switching operation, the gate signals and resonant voltage/current signals are measured. Fig. 11 shows gate signals of the neutral point switch and the voltage on the resonant capacitor. It can be observed that the neutral point switch is turned on when the resonant period ends. However, because of the voltage drops of the switches and the ESR of the resonant inductor, the resonant voltage cannot go back to zero exactly. The remaining resonant voltage causes extra switching losses of the neutral point switches, which is considered in loss analysis in Table III.


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Fig. 11. Gate signals and resonant voltage/current signals during the positive half period.


The gate signal of the upper arm switch and the current of the resonant branch can also be observed in Fig. 11. It can be seen that the arm switch is turned off when the current goes through the freewheeling diode, which means zero-current switching is obtained for the arm switches.

Fig. 12 shows the same signals during the negative half period. During the negative half period, the upper arm switch is never turned on.


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Fig. 12. Gate signals and resonant voltage/current signals during the negative half period.


After the soft-switching operation is validated, the three- phase operation is implemented. In Fig. 13, the line currents and one of the phase voltages are shown. Fig. 14 shows the phase voltages and one of the line currents. It can be seen that the peak of the voltage pulses is no longer constant, since the maximum resonant voltage is related to the load current. Fig. 15 shows the line-to-line voltages of the inverter.


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Fig. 13. Line current iabc and phase voltage VAO.


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Fig. 14. Phase voltage VABCO and line current ia.


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Fig. 15. Line-to-line voltage VAB, VBC, and VCA.


In Fig. 16, the DC-link voltages, the phase voltage, and line current are shown. It can be seen that the well-known 6th harmonic voltage ripple appears on the DC-link.


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Fig. 16. DC-link voltage Vdc1, Vdc2; phase voltage VAO; line current ia.


A FFT analysis of the experimental phase voltage is implemented and shown in Fig. 17. It can be seen that the proposed soft-switching T-type inverter spreads the switching noise to a wide range around the resonant frequency of 66.8kHz. The harmonics roll off at a rate of -40dB/decade when the frequency is higher than the resonant frequency.


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Fig. 17. FFT analysis of the experimental phase voltage.


The efficiency of the prototype is also measured. In the full-load operation, the input power from the DC source is 2400W and the output from the inverter is 2275.9W, which gives an efficiency of 94.8% when compared with an analytical value of 96.23%. Efficiency curves at load conditions of 25%, 50%, 75% and 100% are shown in Fig. 18. The efficiency of the proposed inverter can be further increased by selecting a higher characteristic impedance, which can decrease the resonant current. The conduction loss of the semiconductor switches and the loss of the resonant inductors are decreased with a lower resonant current, which is at the cost of a higher voltage stress.


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Fig. 18. Efficiency curve of the proposed soft-switching T-type inverter.



Ⅵ. CONCLUSIONS

This paper presents a new soft-switching T-type multilevel inverter. Soft-switching operation for all of the switches is obtained through series-connecting the arm switches with resonant inductors and parallel-connecting the neutral point switches with resonant capacitors. The proposed inverter has a simple structure including two resonant inductors and one resonant capacitor for each phase. It can eliminate switching losses and accommodate the series connection of switches for high voltage applications. It can also decrease dv/dt at the output voltage. The pulse density based modulation algorithm also reduces the control complexity. The design considerations of the proposed soft-switching T-type inverter are illustrated. Simulation studies verify the operation of the proposed soft-switching T-type inverter. Loss calculation shows that the proposed soft-switching T-type inverter has a higher efficiency than conventional hard-switching T-type inverters. Experimental results show the feasibility of implementation for the proposed inverter.



ACKNOWLEDGMENT

This work is done in the Renewable Energy and Vehicular Technology Laboratory, the University of Texas at Dallas, Richardson, TX, United States. The authors would like to thank the founding director Dr. Babak Fahimi for his support.



REFERENCES

[1] B. Wu, and M. Narimani, High-Power Converters and AC Drives, 2nd ed., IEEE Press, Chap. 6, 2017.

[2] R. Vargas, P. Cortés, U. Ammann, J. Rodríguez, and J. Pontt, “Predictive control of a three-phase neutral-point- clamped inverter,” IEEE Trans. Ind. Electron., Vol. 54, No. 5, pp. 2697-2705, Oct. 2007.

[3] P. Alemi, Y.-C. Jeung, and D.-C. Lee, “DC-link capacitance minimization in T-type three-level AC/DC/AC PWM converters,” IEEE Trans. Ind. Electron., Vol. 62, No. 3, pp. 1382-1391, Mar. 2015.

[4] K. Tian, B. Wu, M. Narimani, D. D. Xu, Z. Cheng, and N. R. Zargari, “A capacitor voltage-balancing method for nested neutral point clamped (NNPC) inverter,” IEEE Trans. Power Electron., Vol. 31, No. 3, pp. 2575-2583, Mar. 2016.

[5] P. Cortes, A. Wilson, S. Kouro, J. Rodriguez, and H. Abu- Rub, “Model predictive control of multilevel cascaded H- bridge inverters,” IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2691-2699, Aug. 2010.

[6] S. Rohner, S. Bernet, M. Hiller, and R. Sommer, “Modulation, losses, and semiconductor requirements of modular multilevel converters,” IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2633-2642, Aug. 2010.

[7] M. Schweizer and J. Kolar, “Design and implementation of a highly efficient three-level T-type converter for low- voltage applications,” IEEE Trans. Power Electron., Vol. 28, No. 2, pp. 899-907, Feb. 2013.

[8] H. Zhu, J.-S. Lai, A. R. Hefner, Y. Tang, and C. Chen “Modeling-based examination of conducted EMI emissions from hard and soft-switching PWM inverter,” IEEE Trans. Ind. App., Vol. 37, No. 5, pp. 1383-1393, Sep. 2001.

[9] J. M. Erdman, R. J. Kerkman, D. W. Schlegel, and G. L. Skibinski, “Effect of PWM inverters on AC motor bearing currents and shaft voltage,” IEEE Trans. Ind. App., Vol. 32, No. 2, pp. 250-259, Mar. 1996.

[10] S. Chen, and T. A. Lipo, “Bearing currents and shaft voltages of an induction motor under hard-and soft-switching inverter excitation,” IEEE Trans. Ind. App., Vol. 34, No. 5, pp. 1042-1048, Sep. 1998.

[11] S. Sato, Y. Suehiro, S-I. Nagai, and K. Morit, “High efficiency soft-switching 3-phase PWM rectifier,” in Telecommunications Energy Conference, pp. 453-460, 2000.

[12] S. Pan, J. Pan, and Z. Tian, “A shifted SVPWM method to control DC-link resonant inverters and its FPGA realization,” IEEE Trans. Ind. Electron., Vol. 59, No. 9, pp. 3383-3391, Sep. 2012.

[13] S. Mandrek and P. J. Chrzan, “Quasi-resonant dc-link inverter with a reduced number of active elements,” IEEE Trans. Ind. Electron., Vol. 54, No. 4, pp. 2088-2094, Aug. 2007.

[14] J. Kedarisetti and P. Mutschler, “A motor-friendly quasi- resonant DC-link inverter with lossless variable zero- voltage duration,” IEEE Trans. Power Electron., Vol. 27, No. 5, pp. 2613-2622, May 2012.

[15] R. W. D. Doncker and J. P. Lyons, “The auxiliary resonant commutated pole converter,” in Industry Applications Society Annual Meeting, pp. 1228-1235, 1990.

[16] S. Karys. “Selection of resonant circuit elements for the ARCP inverter,” in Electrical Power Quality and Utilisation, pp. 1-6, 2009.

[17] T. D. Batzel and K. Adams, “Variable timing control for ARCP voltage source inverters operating at low DC voltage,” in Transportation Electrification Conference and Expo (ITEC), pp. 1-8, 2012.

[18] M. Amirabadi, J. Baek, H. A. Toliyat, and W. C. Alexander, “Soft-switching AC-link three-phase AC–AC buck–boost converter,” IEEE Trans. Ind. Electron., Vol. 62, No. 1, pp. 3-14, Jan. 2015.

[19] M. Amirabadi, J. Baek, and H. A. Toliyat, “Bidirectional soft-switching series ac-link inverter,” IEEE Trans. Ind. App., Vol. 51, No. 3, pp. 2312-2320, May 2015.

[20] M. Amirabadi, J. Baek, and H. A. Toliyat, “Sparse ac-link buck–boost inverter,” IEEE Trans. Power Electron., Vol. 29, No. 8, pp. 3942-3953, Aug. 2014.

[21] H. Xi, A. Chen, H. Wu, Y. Deng, and R. Zhao, “Simple passive lossless snubber for high power multilevel inverters,” IEEE Trans. Ind. Electron., Vol. 53, No. 3, pp. 727-735, June, 2006.

[22] M. W. Gekeler, “Soft switching three level inverter with passive snubber circuit (S3L),” in Power Electronics and Applications (EPE 2011), pp. 1-10, 2011.

[23] F. G. Stein and Y. R. Novaes, “Analysis of a snubber for the T-Type NPC Converter”, in International Symposium on Industrial Electronics (ISIE 2015), pp. 239-244, 2015.

[24] D. Leuenberger and J. Biela, “Comparison of a soft- switched TCM T-type inverter to hard switched inverter for a 3 phase PV grid interface”, in Power Electronics and Motion Control Conference (EPEPEMC), pp.1-8, 2012.

[25] X. Yuan, H. Stemmler and I. Barbi, “Evaluation of soft switching techniques for the neutral-point-clamped inverter,” in Proc. IEEE PESC, pp. 659-664, 1999.

[26] Y. Sahin, N. S. Ting, E. Akboy, and I. Aksoy, “A new soft switching three level T-type inverter,” in 2016 10th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG), pp. 314-318, 2016.

[27] T. Chen and M. Narimani, “A new ZVZCS three-level inverter,” in Industrial IECON 2017-43rd Annual Conference of the IEEE, pp. 601-606, 2017.

[28] D. Maksimovic and S. Cuk, “Constant-frequency control of quasi-resonant converters,” IEEE Trans. Power Electron., Vol. 6, No. 1, pp. 141-150, Jan. 1991.

[29] D. Maksimovic and S. Cuk, “A general approach to synthesis and analysis of quasi-resonant converters,” IEEE Trans. Power Electron., Vol. 6, No. 1, pp. 127-140, Jan. 1991.

[30] W. A. Tabisz and F. C. Y. Lee, “Zero-voltage-switching multiresonant technique-a novel approach to improve performance of high-frequency quasi-resonant converters,” IEEE Trans. Power Electron., Vol. 4, No. 4, pp. 450-458, Oct. 1989.

[31] E. Dallago, R. Quaglino, and G. Sassone, “Single-cycle quasi-resonant converter with controlled timing of the power switches,” IEEE Trans. Power Electron., Vol. 11, No. 2, pp. 292-298, Mar. 1996.

[32] BOURNS, SRP1770TA Series Datasheet, https://www. bourns.com/docs/product-datasheets/srp1770ta.pdf?sfvrsn=228d91f1_28, 2019.

[33] Micrometals, General Material Properties, https://www. micrometals.com/materials, 2019.



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Tianyu Chen received his B.S. degree from the Huazhong University of Science and Technology, Wuhan, China, in 2014; and his M.Eng. degree from Texas A&M University, College Station, TX, USA, in 2017. Since 2017, he has been working towards his Ph.D. degree in the Renewable Energy and Vehicular Technology (REVT) Lab, University of Texas at Dallas, Richardson, TX, USA. His current research interests include soft-switching inverters and wide bandgap device based converters.


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Mehdi Narimani received his Ph.D. degree in Electrical Engineering from the University of Western Ontario, London, ON, Canada, in 2012. He is presently working as an Assistant Professor in the Department of Electrical and Computer Engineering, McMaster University, Hamilton, ON, Canada. Prior joining McMaster University, he was a Power Electronics Engineer with Rockwell Automation, Cambridge, ON, Canada. He has authored/coauthored more than 60 papers in journals and conference proceeding, coauthored a Wiley–IEEE Press book, and holds more than four issued/pending U.S./European patents. His current research interests include power conversion, high- power converters, the control of power electronics converters, and renewable energy systems.