https://doi.org/10.6113/JPE.2019.19.5.1278

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Non-Isolated Unidirectional Three-Port Cuk-Cuk Converter for Fuel Cell/Solar PV Systems

Balaji Chandrasekar^†, N. Chellammal^*, and Bhargavi Nallamothu^*

^†,*Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Chennai, India

Abstract

A DC-DC Non-Isolated Three-Port Cuk-Cuk (NI-TPCC) converter for interfacing renewable energy sources (RESs) such as Fuel Cell (FC) and Photovoltaic (PV) energy with a DC load is presented in this paper. It features single-stage power conversion from both of the input ports to the load port. The proposed NI-TPCC converter is designed based on the classical Cuk converter. The operational modes and power flow are analyzed in the continuous conduction mode (CCM), and the relationships among the port voltages are derived. Continuous currents in all three ports with less ripple enhance the performance of a fuel cell and its operating life. Furthermore, the output inductor is shared with both of the input ports, which reduces the number of active and passive components. The effectiveness of the designed NI-TPCC converter has been validated through simulation and experimental results.

Key words: Cuk–Cuk converter, DC-DC, Non-isolated, Unidirectional, Three-port

Manuscript received Dec. 13, 2018; accepted May 29, 2019

Recommended for publication by Associate Editor M. Vilathgamuwa.

^†Corresponding Author: balaji2work@gmail.com Tel: +91-9176056974, SRM Institute of Science and Technology

^*Dept. of Electr. and Electron. Eng., SRM Inst. of Sci. and Tech., India

Ⅰ. INTRODUCTION

The combustion of fossil fuels leads to the emission of sulphur oxides, nitrogen and carbon gases which in turn causes global warming and health risks. The limited existence of fossil fuels and climate change due to contaminants has triggered a great deal of interest in the development of more efficient power systems using Renewable Energy Sources (RESs) namely solar, fuel cell, etc. Many conventional DC-DC Single Input Single Output (SISO) converters with single and multiple inductors have been designed to integrate RESs with loads [1], [2]. Nevertheless, the stochastic nature of these sources and the unpredictable demand at the load side necessitate integrated Multi-Port Converters (MPC) to integrate backup sources to continuously feed the load. Fig. 1. illustrates the structures of classical and MPC power systems. MPCs are adopted due to their advantageous features such as component sharing, compact structure, reduced cost and fewer conversion stages. MPCs, or to be more concise, Three-Port Converters (TPC) are either isolated [3], [4] or non-isolated type converters [5]-[7]. The former TPC utilizes a transformer for magnetic coupling between the input and the output. Meanwhile, the later TPC has a common DC bus.

Fig. 1. Power system structures. (a) Classical. (b) MPC.

(a)

(b)

The standard design procedure for transforming SISO converters into Multiple Input Single Output (MISO) converters with several assumptions and conditions was introduced in [8]. MISO converters with parallel connected pulsating voltage source cells have fewer components than other MISO converters derived from the same SISO converters [9]. Topologies for integrated TPC and their development procedures were discussed in [10].

The buck-boost feature of the Cuk converter leads to its use in standalone and grid-tied applications with time-varying and unpredictable load demands. Similar voltage waveforms on the inductors and continuous current at the source and load ports are the prominent features of the Cuk converter [11]. Owing to these advantages, modified Cuk converters are derived using switched-inductors and switched-capacitors to achieve a greater step up capability than the classical Cuk or boost converters [12]. In addition, they have reduced voltage stress on the switch.

A TPC with a high-gain that can handle FC, battery and stacked outputs has been introduced in [5]. Series connected output sections, a single boost inductor and reduced voltage stresses on the switches are the advantageous features of this converter. However, it uses a transformer, which makes the converter bulky. A new non-isolated TPC that has a simple topology, high power density and centralized control for RESs was proposed in [6]. In this converter, one of the two inductors and a switch are shared in various switching states, which leads to cost and weight reductions. In [7], a topology with a high voltage gain based on the integration of boost and Cuk converters is proposed. In this topology, the voltage stresses on the semiconductor devices are low. A TPC has been designed for high step-up applications in [13]. Using coupled inductors, a high voltage gain and a reduction in the switching voltage stress at the input side are achieved by this converter. However, in the above literature, the non-isolated TPCs use a large number of components, which increases both the complexity and the losses, and reduces reliability.

An integrated three-port three-switch DC-DC converter was proposed by utilizing a coupled inductor [14]. A modified switching strategy, soft switching and a simple control are the merits of this converter. A variable structure TPC with a broad operational range for standalone renewable energy system was presented in [15]. It operates with a single inductor, and structure changes to achieve buck, boost and buck-boost operations. In [16], a double-input TPC using complementary energy sources was proposed with a single inductor, three switches and three diodes. It is claimed that the converter has a wide input voltage range. A multi-input converter for hybrid systems that integrates energy storage devices with different V-I characteristics was presented in [17]. However, the aforementioned non-isolated three port converters fail to achieve continuous current at all of their ports.

The input ripple current of a converter/inverter has been reported to significantly affect FC performance and operating life [18]. Hence minimizing the peak-peak current ripple (I_ripple) has drawn the attention of a lot of researchers. In general, separate filters with inductors and capacitors are employed to minimize the input current ripple effects on FC operation as a DC power source, which increases the order of the converter. Furthermore, it is necessary to supply continuous current with less ripple to the load. It is understood from (1) that less ripple reduces the power loss (P_Loss) and the unpredictable temperature rise (T_Rise). In addition, it enhances the operating life of the electrolytic capacitors present in a system [19]. In this case, R_P is the Ohmic resistance of electrodes and the electric resistance caused by liquid electrolytes, and R_tr is the thermal resistance in °C/W.

          (1)

In order to supply a continuous current and reduce the ripples in the currents at either side (input and output) of the converter, the Three-Port Cuk-Cuk converter is selected in this work.

Key features of the NI-TPCC converter are as follows.

  Extendable to a larger number of input sources.

  Reduced number of components due to sharing of the output inductor with the input ports.

  Continuous current with less ripple in all of the ports.

  Independent power control of each input.

  Buck-boost operational mode.

The power control modes and operational analysis are common and explained in detail in many articles. However, utilizing the Cuk-Cuk topology to integrate the input and output ports is new. Hence, the objectives of this paper are to design, model, analyze and fabricate the proposed converter, and to check its performance, which has not been realized yet.

Ⅱ. PROPOSED CONVERTER STRUCTURE

A. Synthesis of the NI-TPCC Converter

The procedure to derive the proposed converter is described in this section. It is known that the conventional Cuk converter is composed of three sections namely the input, energy buffer and output sections which are depicted in Fig. 2(a). The generalized n-port configuration can be derived by taking the common output section and connecting the number of input and buffer sections as illustrated in Fig. 2(b). The resulting ‘n’ port converter has ‘n-1’ input sources, ‘n’ inductors, ‘n’ capacitors, ‘n-1’ switches and a single diode.

Fig. 2. Diagrams. (a) Conventional Cuk converter. (b) Generalized ‘n’ port configuration. (c) Proposed TPC.

(a)

(b)

(c)

For ease of analysis and understanding, a TPC with two input ports and a single output port has been considered and presented in Fig. 2(c). It comprises of a total of nine components: three inductors (L₁, L₂ and L₀), three capacitors (C₁, C₂ and C₀), two switches (S₁ and S₂) and a diode (D₀). The power sources V₁ and V₂ are connected to the unidirectional input ports.

B. Operating Principles

The proposed converter has two operational modes, Single Input-Single Output Mode (SISOM) and Dual Input-Single Output Mode (DISOM), depending on available power from sources. For instance, assuming that the power from source 1 is more than the load demand, it works in the SISOM, and a single source (V₁) feeds the load. In this case, the power management controller adjusts the duty ratio accordingly and the converter is operated with a reduced duty ratio. On the other hand, if the load demand is more than source 1, both sources contribute to the power demanded by the load in DISOM. Both of these operational modes can be achieved using suitable control signals.

1) SISO Mode

A power circuit diagram of the NI-TPCC converter in the SISOM is illustrated in Fig. 3(a), and the equivalent circuits are depicted in Fig. 3(b) and (c). The output voltage is decided by controlling the driving signal (d₁) of the switch S₁. Key waveforms of the voltage and currents are not presented here since they are the same as those of the conventional Cuk converter.

Fig. 3. Diagrams. (a) Power circuit in the SISOM. (b) Equivalent circuit in State 1. (c) Equivalent circuit in State 2.

(a)

(b)

(c)

State 1

As illustrated in Fig. 3(b), the switch S₁ and the diode D₀ are ON and OFF, respectively. The inductor L₁ is magnetized by the input source V₁. Thus, the inductor current i_L1 linearly increases. It is worth mentioning that C₁ is assumed to be pre-charged and discharging its energy to the load through the inductor L₀. In addition, depending on the magnitudes of the output inductor current and load current, i.e., i_C0 = i_L0 − I_o, the output capacitor C₀ is charged or discharged. I_o denotes the load current (assumed to be constant). The size of the capacitor is assumed to be large enough to maintain a constant load current. The following equations (2) are valid in this state.

          (2)

State 2

As shown in Fig. 3(c), the switch S₁ and the diode D₀ are OFF and ON, respectively. The source V₁ and the stored energy of the inductor L₁ deliver power to charge the capacitor C₁ through D₀. Therefore, the inductor demagnetizes and consequently decreases its current. In addition, the diode D₀ provides a path for the output inductor L₀ to feed the load. Various currents and voltages can be expressed by (3).

          (3)

          (4)

Using the desired values of the input and output voltages, the duty ratio, the value of the inductor currents and the load resistance can be calculated from (4).

2) DISO Mode

A controlled output voltage necessitates better usage of the energy sources. When the load demand is more than the available power of a single source, both of the sources feed the load based on the time multiplexing of the respective switches of the input ports. As shown in Fig. 4(a)-(c), the following gate signal generation methods can change the switching pattern: (a) synchronization at the rising edge, (b) synchronization at the falling edge and (c) intermediate synchronization. Any of these switching patterns can be used.

Fig. 4. Switching patterns. (a) Rising edge. (b) Falling edge. (c) Intermediate synchronization.

(a)

(b)

(c)

The rising edge synchronization method has been chosen in this paper for analysis of the proposed converter. The use of other methods provides similar results.

Fig. 5. Equivalent circuits. (a) State 1. (b) State 2. (c) State 3.

(a)

(b)

(c)

State 1

As depicted in Fig. 5(a), both of the switches are ON, and the diode D₀ is OFF. The voltage sources V₁ and V₂ magnetize the respective inductors L₁ and L₂, and consequently increase their currents. As assumed earlier, the capacitors C₁ and C₂ are pre-charged and release their energies to the load through the output inductor L₀. The following equations (5) are derived for this mode.

          (5)

State 2

The switching conditions and the corresponding equivalent circuit of this state are shown in Fig. 4(a) and 5(b), respectively. Owing to the voltage across the capacitor C₂, the diode is reverse biased. The source V₁ and the stored energy of the inductor L₁, deliver power to charge the capacitor C₁. Meanwhile, V₂ is magnetizing the inductor L₂ and consequently linearly increasing its current. The capacitor C₂ meets the load demand through the output inductor L₀. The corresponding dynamic equations are obtained as in (6).

          (6)

State 3

The equivalent circuit corresponding to this interval is depicted in Fig. 5(c). Both of the switches are in the OFF condition. However, the diode freewheels. The capacitor C₁ is charged by the voltage source V₁ along with the stored energy of the inductor L₁. Similarly, the source V₂ and the energy stored in the inductor L₂ charge the capacitor C₂. The Diode D₀ provides a path for the inductor current i_L0 to feed the load. The following equations (7) define this state.

          (7)

Ⅲ. MODELLING AND ANALYSIS OF THE CONVERTER

The derivation of various parameters and the modeling of the proposed NI-TPCC converter are provided in this section. The expressions are deduced for the voltage gain and output voltage in terms of the duty ratio under the following assumptions.

  Ideal operating conditions in the steady state.

  Continuous conduction mode (CCM).

A. Voltage Gain

The relationship between the output and the input voltages in terms of the duty ratio can be derived using the Energy Survival Law (ESL).

          (8)

          (9)

          (10)

The expression of the output voltage can be derived from equations (8), (9) and (10). The voltage equation in terms of the duty cycles is:

          (11)

Considering that V₁=V₂=V in (11), the output voltage is derived as in (12), and the voltage gain is plotted in Fig. 6.

          (12)

With equal input voltages, selecting the same duty ratio d₁=d₂=d for both of the switches lead to the output voltage being equal to the one in the classical Cuk converter as derived in (13).

          (13)

The voltage gain for the n-port Cuk-Cuk topology can be achieved as in (14).

          (14)

Applying the charge-sec balance principle on the capacitors, the following equations are obtained.

          (15)

     (16)

Fig. 6. Voltage gain as a function of the duty cycles of the NI-TPCC converter.

B. Current Ripples of the Inductors

Current ripples and the Inductor Volt-Second Balance (IVSB) principle are used to design the inductors. The inductor current ripple equations are modified to obtain equations for the inductor values (17)-(19).

          (17)

          (18)

          (19)

The values of the inductors can be determined with known values of the output voltage, source voltages, desired ripples, switching frequency and duty cycle.

C. Voltage Ripples of Capacitors

Voltage ripples and the Capacitor Charge-Second Balance (CCSB) principle are used to design the capacitors. The voltage ripple equations are modified to obtain equations for the capacitor values (20)-(22).

          (20)

          (21)

The output capacitor can be determined from the output voltage ripple.

          (22)

The values of the capacitors can be calculated with the values of the source and load voltages, expected percentage ripples, duty cycle and switching frequency. The current ripples in the inductors and the voltage ripples in the buffer capacitors, C₁ and C₂, are considered to be 5%, and the voltage ripple in the output capacitor C₀ is 1%. The specifications of the converter are listed in Table I. The converter in the DISOM operation explained in Section 2.2 B is simulated, and waveforms of the switching pulses, the currents of the inductors i_L1, i_L2 and i_L3, the capacitor voltages V_C1 and V_C2, and the output voltage V₀ are presented in Fig. 7(a)-(h).

TABLE I COMPONENTS OF THE PROPOSED CONVERTER

S.No	Component	Symbol	Simulation	Hardware
1	Input port voltages	V1 andV2	18-30 & 12V	18-30 & 12V
2	Output port voltage	V0	24V	24V
3	Output power	P0	100W	100W
4	Inductors	L1 and L2	0.8 & 1.9mH	1 & 2mH
5	Capacitors	C1 and C2	46.3 μF & 63 μF	50μF,63V&72 μF, 50V
6	Output Inductor	L0	2 mH	2 mH
7	Output Capacitor	C0	1.7 μF	2.2 μF, 35 V
8	Load Resistance	R	5.76 Ω	6 Ω
9	Switching Frequency	fsw	20kHz	20kHz

Fig. 7. Simulated waveforms in mode 2. (a) and (b) gate signals of the switches S₁ and S₂. (c), (d) and (e) voltage across the capacitors. (f), (g) and (h) inductor currents.

D. Small Signal Modeling

Voltage regulation should be maintained irrespective of changes in the input and output parameters in any power converter, which necessitates a design of feedback controller. Modelling plays an important role in providing information about the dynamic behavior of the converter and in deriving a feedback control system.

The proper design of a controller requires a small signal model of the converter. The State-Space Averaging (SSA) method is mostly employed to design the control loops. The workflow used is shown in Fig. 8.

Fig. 8. State space to transfer function workflow.

First order small signal perturbation terms are used to create the matrices A and B, which denote the converter model as in (23).

          (23)

Where X, U, Y and = dx/dt represent the state vector, the input or control vector, the output vector, and derivative of X, respectively. The matrices A, B, C and D are the system, control, output and feed-forward matrices, respectively. A and B are used to extract various transfer functions of the system.

          (24)

          (25)

From the dynamic equations (5)-(7) in Section 2 and based on circuit theory, the state space model in matrix form is formulated and presented in (26).

          (26)

The open loop transfer functions related to the control of the converter are derived using (27) as shown in (28)-(29). To obtain the step response and to avoid human errors, MATLAB software is used. Fig. 9. illustrates the response of the converter to a unit step input.

          (27)

          (28)

          (29)

The step response for both of the input voltages are plotted and illustrated in Fig. 9(a) and (b). The negative output verifies the output of the Cuk converter. It has a steady-state error of 33.26% and an overshoot of 62.7284% for Source 1, as shown in the waveform of Fig. 9(a). A steady state error of 0.7 % and a overshoot of 62.64% are obtained for Source 2, as can be seen in Fig. 9(b).

Fig. 9. Open loop step behavior. (a) With V₁. (b) With V₂.

(a)

(b)

Fig. 10. Diagrams. (a) Reaction curve. (b) Closed-loop converter with a PI controller.

(a)

(b)

Ⅳ. DESIGN OF THE CONTROLLER

The control strategy utilizes a PI controller for reducing the steady state error indicated in Fig. 9 and for regulating the output voltage. The controller parameters, the proportional gain k_P and the integral gain k_I, which decide the dynamic response of the closed-loop system, are tuned using Ziegler- Nichols reaction curve methodology. The delay time L and the time constant T are extracted from the reaction curve and presented in Fig. 10(a). The recommended optimum settings for the PI controller (30) have been used. A closed-loop block diagram with the designed PI controller and converter is illustrated in Fig. 10 (b).

          (30)

The step responses of the closed-loop system are observed with a disturbance in the source voltages V₁ and V₂, and the results are depicted in Fig. 11(a) and (b). It is clear that successful regulation has been obtained using a PI controller and that the steady-state error is minimized. In addition, reduced overshoots (0.0013% and 0.0068%) are achieved.

Fig. 11. Open-loop step behavior. (a) With V₁. (b) With V₂.

(a)

(b)

Effective utilization of power sources is achieved by choosing different duty cycles. For instance, if V₁> V₂, then the duty ratio is chosen as d₁＜ d₂. The parameters and the obtained output voltage waveform are shown in Fig. 12.

Fig. 12. Output voltage of the three-port Cuk-Cuk converter.

Ⅴ. RESULTS AND DISCUSSION

The operational modes discussed in Section II have been validated using a hardware prototype of a 0.1 kW, 20 kHz converter. The entire setup includes the fabricated converter, DC supplies simulating PV and fuel cell systems, a Field Programmable Gate Array (FPGA) controller and a resistive load. A digital photograph of the experimental prototype is presented in Fig. 13, and the related specifications are given in Table I.

Fig. 13. Experimental prototype setup.

The hardware is tested with an input voltage of 18V under the SISOM. Various currents and voltages are recorded in the boost mode (duty ratio d= 60%) and the buck mode (d=40%). Figs. 14 and 15 clearly illustrate these results. A similar experiment carried out with an input voltage of 12V also produced satisfying results, which verifies the theoretical calculations. However, the corresponding measurements are not shown here.

Fig. 14. Experimental measurements of Mode 1 under the boost mode with source 1 (top to bottom). (a) Inductor currents, load current and gate signal. (b) Capacitor voltages across C₁ and C₀, and gate signal. (c) Gate signal, source voltage and output voltage.

(a)

(b)

(c)

Fig. 15. Experimental measurements of Mode 1 under the buck mode with source 1 (top to bottom). (a) Switching signal, inductor currents through L₁ and L₀, and load current. (b) Switching signal, and capacitor voltages across C₁ and C₀. (c) gate signal, source voltage and output voltage.

(a)

(b)

(c)

The inductor currents i_L1 and i_L2, the load current I₀ and switching pulses are shown in Fig. 14(a) under step-up operation. The measured current ripples of the inductors Δi_L1 and Δi_L0 are 4% and 4.9%, respectively. In addition, the average measured values are closer to the theoretical average values (5.55A and 3.71A) from (2) and (3). The buffer capacitor voltage V_C1, the output capacitor voltage V_C0 and the gate signal are presented in Fig. 14(b). It is observed from this figure that the average capacitor voltages V_C1 and V_C0 are 44V and -26.2V. The corresponding ripples are 3.8% and 1%, respectively. This shows close agreement with the theoretical calculations from (1) and (2). The generated switching pulses, source and load voltages are 15V, 18V and -26.2V as shown in Fig. 14(c).

The inductor currents i_L1 and i_L0, the load current I₀ and switching pulses are shown in Fig. 15(a) under step down operation. The measured current ripples of the inductors Δi_L1 and Δi_L0 are 4.7% and 5%, respectively. In addition, the average measured values are 1.4A, 2.2A and 2.17A, which match the theoretical average values (1.39A, 2.08A and 2.08A) from (2) and (3). The buffer capacitor voltage V_C1, the output voltage V_C0 and the gate signal are presented in Fig. 15(b). It is observed that the capacitor voltage ripples are 4.8% for C₁ and 1% for C₀. The generated switching pulses, source and load voltages are 15V, 18V and -11.2V as presented in Fig. 15(c).

The performance of the converter is tested in the DISOM and the corresponding voltage and current signals are shown in Fig. 16. The current through the inductors L₁ and L₂ with gate signals applied to both of the switches are shown in Fig. 16(a). It can be observed that the average inductor currents 11A and 4.7A match the results from (3), (14) and (15), and that the corresponding ripples are 4% and 4.2%. The inductor current i_L0 and the load current i₀ are shown in Fig. 16(b). The average currents are 4.03A and 4.02A, which match the results from (3), (14) and (15). The inductor current ripple is 4.5% which coincides with the designed value of 5 %. The voltage across the capacitors C₁, C₂ and C₀ are 40V, 34V and -24V, as shown in Fig. 16(c).

Fig. 16. Experimental measurements of Mode 2 with both sources (top to bottom). (a) Gate pulses, and inductor currents through L₁ and L₂. (b) Gate signals of S₁ and S₂, inductor current through L₀, and load current I₀. (c) Capacitor voltages across C₁ and C₂, and output voltage V₀.

(a)

(b)

(c)

It can be seen that the ripples of the capacitors are 4.2% for C₁, 4.8% for C₂ and 1% for C₀. The measured voltage ripples are in close approximation with the designed value. In addition, it can be observed that the current of all the ports, I_L1, I_L2 and I₀ are continuous with less ripples.

The load regulation and dynamic transition response between the SISOM and the DISOM of the converter are tested and presented in Fig. 17(a) and (b), respectively. During load regulation, the load current is increased from 0.6A to 3.8A and then reduced to 0.8A as shown in Fig. 17(a). In both instances, it can be seen that the load voltage is disturbed for a short duration and returns to 23.9V. In Fig. 17(b), both of the sources are initially catering the load simultaneously. Then, the step changes (18V to 0V followed by 0V to 18V) are created in the source V₁. The controller maintains the output voltage and the load current to same values in both transitions with dips of short duration.

Fig. 17. Dynamic responses. (a) With a change in the load (top to bottom): voltage of source 1, current of source 1, load voltage V₀ and load current I₀. (b) Between the SISOM and the DISOM (top to bottom): load voltage V₀ and load current I₀.

(a)

(b)

Fig. 18(a) and (b) present comparison plots among the theoretical, simulation and experiment data of the voltage gains as a function of the duty ratio for the SISOM and the DISOM. It is obvious that both the theoretical and experimental voltage gains increase as the duty ratio increases. In addition, the voltage gain obtained from the experiment closely approximates both the theoretical and simulation results between 0.3 and 0.5, whereas a slight deviation has been observed in the duty ratio beyond 0.5 with an increasing voltage difference. It is worth mentioning that this difference is due to component losses. Thus, the results are consistent with the theoretical analysis and demonstrate the good feasibility of the expected operation.

Fig. 18. Performance curves. (a) Voltage ratio Vs duty cycle in the SISOM. (b) Voltage ratio Vs duty cycle in the DISOM. (c) Conversion efficiency for various modes.

(a)

(b)

(c)

Experiments were conducted to determine the conversion efficiency of the NI-TPCC converter under various operational modes. The power loss in the gate drivers and switches are not accounted for in the measurement. A Fluke 362 clamp meter and a Rishmulti 15S multimeter are employed for the measurement of the port voltages and currents at different power levels. The voltages of input Port-1, input Port-2 and the load port are 18V, 12V and 24V, respectively. From the corresponding results illustrated in Fig. 18(c), it is observed that the converter operates with maximum efficiency in the SISOM with V₁ (Port-1 to the load port) and V₂ (Port-2 to the load Port) sources at 92.74% and 91.15%. In addition, for Mode 2 it is 90.43%. Compared with the efficiencies obtained through simulation, the efficiencies for Mode 1 (SISOM) with individual contribution of the V₁ and V₂ sources are 94.13% and 93.66%. In addition, for Mode 2 it is 92.21%. The achieved conversion efficiency is obvious for single stage conversion from the input to output ports.

Table II shows a comparison of the NI-TPCC converter and other state-of-the-art TPCs in terms of components, continuous current at all of the ports and expandability. The TPC proposed in [20] provides continuous current at all of the ports. The converter in [6] can be extendable to more ports. However, it is justified that the total number of components are less in the proposed NI-TPCC converter.

TABLE II COMPARISON OF THE NI-TPCC CONVERTER WITH STATE OF THE ART TPCS

Converter in Reference	Active switches	Diodes	Inductors	Capacitors	Switching frequency	Reported power rating	Continuous current at all ports	Extendable	Efficiency
[5]	4	5	1, 1 transformer	3	20 kHz	300W	No	No	96.6
[6]	4	2	2	3	100 kHz	400W	No	Yes	96
[7]	3	4	2	3	40 kHz	200W	No	No	92.7
[13]	5	0	4	3	50 kHz	200W	No	No	90.1
[14]	3	0	1, 1 coupled	2	100 kHz	200W	No	No	97.4
[15]	3	3	1	2	20 kHz	120W	No	No	94.2
[16]	3	3	1	1	30 kHz	100W	No	No	94.16
[17]	4	2	2	1	20 kHz	1000W	No	No	95.5
[20]	3	1	3	4	100 kHz	1.2kW	Yes	No	93.5
Proposed in this paper	2	1	3	3	20 kHz	0.1kW	Yes	Yes	92.74

Ⅵ. CONCLUSION

The NI-TPCC converter is designed by integrating two classical Cuk converters. An analysis and the workings of the converter have been presented in detail. The proposed converter has lesser number of active and passive components. Due to the inductors at the source and load sides, the input and output currents are continuous. Hence, this converter is a good candidate for applications like fuel cell systems, which require less or zero ripple input current. Owing to the low ripple, the power loss and temperature rise are reduced. In addition, the life of the electrolytic capacitors used in both the converter and the fuel cell can be enhanced. Experimental measurements of the NI-TPCC converter are provided to verify its feasibility. This paper focuses on the design and operational principle of the proposed unidirectional converter. However, its bidirectional operation can be dealt with in the future.

ACKNOWLEDGMENT

The authors wish to thank the reviewers for their comments and suggestions that have led to various improvements in the presentation of the paper.

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Balaji Chandrasekar was born in Arakkonam, Tamil Nadu, India. He received his B.E. degree in Electrical and Electronics Engineering from I.F.E.T College of Engineering, Villupuram, India; and his M.E. degree in Control and Instrumentation Engineering from the College of Engineering, Guindy, Anna University, Chennai, India. He is presently working towards his Ph.D. degree in the Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Chennai, India. His current research interests include multi-port power electronic converters and renewable energy systems.

N. Chellammal received her M.S. degree in Electrical Drives and Automation from Tashkent State Technical University, Tashkent, CIS (a former USSR) and her Ph.D. degree in Power Electronics from the Faculty of Engineering, SRM Institute of Science and Technology, Chennai, India. She is presently working as an Associate Professor at the SRM Institute of Science and Technology. Her current research interests include modeling of power electronic converters and drives, grid integration of renewable energy resources and design of controllers.

Bhargavi Nallamothu was born in Andhra Pradesh, India. She received her B.Tech degree in Electrical and Electronics Engineering from Bapatla Women's Engineering College, Andhra Pradesh; and her M.Tech. degree from the Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Chennai, India. She is presently working at Continental Automotive Pvt. Ltd., Bangalore, India. Her current research interests include computer vision and machine learning.