https://doi.org/10.6113/JPE.2019.19.6.1477

ISSN(Print): 1598-2092 / ISSN(Online): 2093-4718

Common-Mode Voltage and Current Harmonic Reduction for Five-Phase VSIs with Model Predictive Current Control

Huu-Cong Vu^{*} and Hong-Hee Lee^{†}

^{†,*}School of Electrical Engineering, University of Ulsan, Ulsan, Korea

Abstract

This paper proposes an effective model predictive current control (MPCC) that involves using 10 virtual voltage vectors to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI). In the proposed scheme, 10 virtual voltage vectors are included to reduce the CMV and low-order current harmonics. These virtual voltage vectors are employed as the input control set for the MPCC. Among the 10 virtual voltage vectors, two are applied throughout the whole sampling period to reduce current ripples. The two selected virtual voltage vectors are based on location information of the reference voltage vector, and their duration times are calculated using a simple algorithm. This significantly reduces the computational burden. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

Key words: Common-mode voltage (CMV), Five-phase voltage source inverter, Model predictive current control (MPCC), Reduced current harmonics

Manuscript received Jul. 28, 2019; accepted Aug. 20, 2019

Recommended for publication by Associate Editor Sung-Jin Choi.

^{†}Corresponding Author: hhlee@mail.ulsan.ac.kr Tel: +82-52-259-2187, Fax: +82-52-259-1686, University of Ulsan

^{*}School of Electrical Engineering, University of Ulsan, Korea

Ⅰ. INTRODUCTION

Over the last decade, a number of five-phase drives have been developed for various applications such as naval propulsion systems, more-electric aircraft, electric vehicle traction drives and offshore turbines due to their advantages over their three-phase counterparts: enhanced faulty tolerance, lower torque pulsation, higher torque density, reduced per phase current without an increased per phase voltage, and lower dc-link current harmonics [1]-[6]. Typically, five-phase drives are supplied by a two-level five-phase voltage source inverter (VSI).

Some of the modulation and control schemes that have been developed for five-phase VSIs include space vector pulse-width modulation (PWM) [7], carrier-based PWM [8], and model predictive current control [9]. Among these, model predictive current control (MPCC) is the most effective and simplest current control scheme for five-phase VSIs due to its simple principle, quick response, and control flexibility [10]- [12]. In the MPCC for five-phase VSIs, the output current is predicted for all of the possible voltage vectors of a five-phase VSI, while the optimal voltage vector is selected using a predefined cost function with error terms between the predicted output current and the reference. Finally, the optimal voltage vector is applied during the sampling time period to drive the five-phase VSI.

Despite these advances, the MPCC for five-phase VSIs still suffers some certain problems, namely high computational burden, low-order current harmonics, and common-mode voltage (CMV). CMV causes electromagnetic interference effect where the fault activation of current detector circuits and common-mode currents leads to motor bearing failures [13], [14]. Some MPCC schemes have been developed in attempts to reduce the CMV for five-phase VSIs by selecting suitable voltage vectors for the input control set [15], [16]. When compared to the conventional MPCC scheme, the peak CMV of these schemes is reduced by 80%. However, large low-order current harmonics are inevitable due to the fact that only one voltage vector is applied during one sampling period to drive the VSI. In [17], virtual voltage vectors were employed as an input control set of MPCC to reduce low-order current harmonics. Although the low-order current harmonics were significantly reduced in this scheme, the computation time remained relatively high since it involved a large number of current predictions and cost function evaluations. Furthermore, the CMV problem was not considered.

In order to overcome these limitations, this paper proposes an effective MPCC scheme using 10 virtual voltage vectors to reduce the CMV and current harmonics for a five-phase VSI. In the proposed scheme, 10 virtual voltage vectors are used as an input control set for the MPCC scheme to simultaneously reduce the CMV and low-order current harmonics. Furthermore, two of the 10 virtual voltage vectors are applied during one sampling period to reduce current ripples. The two virtual voltage vectors are determined according to the location of the reference voltage vector. In addition, their duration times are calculated using a simple algorithm. This considerably reduces the computation time. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

Fig. 1. Two-level five-phase voltage source inverter.

Ⅱ. CONVENTIONAL MPCC SCHEME OF A TWO-LEVEL FIVE-PHASE VSI

A. Model of Two-Level Five-Phase VSI

An electrical diagram of a two-level five-phase VSI is shown in Fig. 1. The switching function of each phase S_{i} (i=A1, A2, A3, A4, A5) is defined as:

Then, the inverter pole voltages are expressed as:

where V_{dc} is the DC-link voltage.

The inverter phase voltages are written as functions of the inverter pole voltages:

The five-phase VSI generates 32 switching state combinations. Each switching state combination corresponds to a voltage vector, which is mapped into both the (α-β) and (x-y) planes using a Clarke transformation as follows [13]:

where δ=2π/5.

Figs. 2(a)-2(b) show the space vectors for the five-phase VSI in the (α-β) and (x-y) planes. The obtained voltage vectors are classified into four groups, as shown in Table I: zero vectors (ZV), small vectors (SV), medium vectors (MV), and large vectors (LV).

Group |
Voltage vectors |
|V |
|V |
|V |

ZV |
V |
0 |
0 |
0.5V |

SV |
V V V V V |
0.2472V |
0.6472V |
0.1V |

MV |
V V V V V |
0.4V |
0.4V |
0.3V |

LV |
V V V V V |
0.6472V |
0.2472V |
0.1V |

B. Common-Mode Voltage Analysis

The common-mode voltage (CMV) in a five-phase VSI is expressed as:

The absolute value of the CMV for each voltage vector group is:

From Table I, it can be clearly seen that the large voltage vector group provides the lowest CMV with the highest output voltage in the (α-β) planes.

C. Conventional MPCC Scheme

As shown in Fig. 1, the relationships between the output voltage and current of a five-phase VSI with an RL load in the (α-β) and (x-y) planes are expressed as follows:

where i_{αβ} and V_{αβ }are the current and voltage vectors in the (α-β) plane; i_{xy} and V_{xy }are current and voltage vectors in the (x-y) plane; and R and L are the load resistance and inductance, respectively.

The derivatives of the currents in (7) and (8) are approximated using a forward Euler approximation with a sampling period T_{s} as follows:

By substituting (9) into (7) and (10) into (8), the relationship between the output voltage and current in the discrete-time domain can be obtained as follows:

A one-step delay compensation method is adopted to compensate for the time delay caused by the digital implementation, where the currents and voltages in (11) and (12) are shifted one step forward in time to obtain the currents at the instant (k+2), as in [18]:

In the MPCC for a five-phase VSI, four current components must be simultaneously controlled in two planes, and the cost function g is defined as follows:

where i_{α}, i_{β}, i_{x }and i_{y }are the α, β, x and y components of the current vector; , , and are the α, β, x and y components of the reference current vector; and λ_{xy}_{ }is a weighting factor.

A block diagram of the conventional MPCC scheme for a five-phase VSI is shown in Fig. 3, where an optimal voltage vector that minimizes the cost function (15) is selected to drive a five-phase VSI. Since a larger number of current predictions and cost function evaluations are required to select the optimal voltage vector, the computation time of the MPCC scheme is high. Furthermore, only one voltage vector is applied during one sampling period. This means that the i_{x} and i_{y} currents cannot be eliminated. Thus, large low-order harmonics are inevitable in the output current.

Fig. 3. Block diagram of the conventional MPCC scheme.

Ⅲ. PROPOSED MPCC SCHEME

In order to minimize the CMV and reduce the low-order current harmonics, 10 virtual voltage vectors with eliminated voltage components in the (x-y) sub-plane, which are synthesized from the voltage vectors of the LV group, are used as the input control set in the MPCC scheme. Then, two of the 10 virtual voltage vectors are applied throughout the whole sampling period to reduce the output current ripples. They are selected based on the location information of a reference voltage vector without current predictions. In addition, a new cost function is used to calculate the durations of the selected virtual voltage vectors. Therefore, the computational burden is significantly reduced. Fig. 4 shows a block diagram of the proposed MPCC scheme, which comprises three main parts: 1) the synthesized virtual vectors, 2) the selected virtual vectors and the calculation of their duration times, and 3) the generated switching pulse.

Fig. 4. Block diagram of the proposed MPCC scheme.

A. Synthesized Virtual Vectors

In order to minimize CMV, 10 voltage vectors of the LV group with the lowest CMV and highest length in the (α-β) plane are employed to construct the input control set of the proposed MPCC scheme. The input control set consists of 10 virtual voltage vectors, and each virtual voltage vector is obtained by combining three adjacent voltage vectors of the LV group to eliminate the x and y voltage components in order to reduce the low-order current harmonics.

For example, the virtual voltage vector V_{v1}, which is formed by a combination of voltage vectors V_{17}, V_{25} and V_{24}, is expressed as:

The factors d_{1} and d_{2 }are calculated using the following constraint:

From (17), the factors d_{1} and d_{2} are given as follows:

By inserting (18)_{ }into (16), the virtual voltage vector V_{v1} is given as:

The other virtual voltage vectors can be derived similarly based on the relationships presented in Table II. The 10 virtual voltage vectors have the minimum CMV as well as zero x and y voltage components. Therefore, the CMV is minimized and the i_{x}, and i_{y} currents are automatically nullified by employing these virtual voltage vectors as the input control set. As a result, the low-order current harmonics are significantly reduced and only the α and β current components need to be controlled.

Virtual voltage vector |
Virtual voltage vector synthesis |
|V |
|V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

V |
d |
0 |
0.1V |

B. Selected Virtual Vectors and Their Duration Time Calculation

By employing 10 virtual voltage vectors as the input control set, the low-order current harmonics are significantly reduced. However, if only a single virtual voltage vector is applied to drive a five-phase VSI, the output current ripples can remain high due to the absence of a zero voltage vector. In order to reduce the output current ripples, two virtual voltage vectors are selected to drive the five-phase VSI based on location information of the reference voltage vector. The reference voltage vector is obtained from the output current equation in (13):

In the proposed MPCC scheme, the two virtual voltage vectors nearest the reference voltage vector are selected to drive the five-phase VSI. After calculating the reference voltage vector from (20), its location and the two virtual voltage vectors can be determined from the (α-β) plane in Fig. 5, which is divided into 10 sectors.

Fig. 5. Distributed virtual voltage vectors in the (α-β) plane.

For example, when the reference voltage vector is located in sector 1, the virtual voltage vectors V_{v1 }and V_{v2 }are selected to drive the five-phase VSI. Then, in order to calculate the duration time of V_{v1 }and V_{v2}, a new cost function is defined as:

where and are the α and β components of the reference voltage vector, while and are the α and β components of the virtual voltage vector i, respectively.

The cost function value in (21) of V_{v1 }and V_{v2 }is expressed as:

Then, the duration times of the two virtual voltage vectors, which are inversely proportional to their cost function values, are expressed as follows:

where T_{1} and T_{2 }are the duration times of V_{v1 }and V_{v2}, respectively.

It can be clearly seen that in the proposed scheme, the current predictions and weighting factor tuning are avoided and that the duration times of the selected virtual voltage vectors are calculated according to their cost function values. As a result, the computational burden is considerably reduced.

C. Generated Switching Pulse

After determining the two virtual voltage vectors, the corresponding switching pulses are required to drive the five-phase VSI. Typically, symmetrical switching pulses are adopted to reduce the output current harmonics [17]. To this end, the dwell times of the voltage vectors, which are used to synthesize the two selected virtual voltage vectors, must be determined. For example, when the virtual voltage vectors V_{v1} and V_{v2} are selected, the dwell times of the voltage vectors V_{17}, V_{25}, V_{24} and V_{28} are as follows:

where d_{V}_{17}, d_{V}_{25}, d_{V}_{24 }and d_{V}_{28 }are the dwell times of the voltage vectors V_{17}, V_{25},_{ }V_{24 }and V_{28}, respectively. Fig. 6 shows the symmetrical switching pulses in sector 1, which are used to control the five-phase VSI.

Fig. 6. Generated switching pulse in sector 1.

Ⅳ. SIMULATION RESULTS

Simulations were conducted using PSIM software to verify the effectiveness of the proposed MPCC scheme. The simulated parameters are as follows: the dc-link voltage Vdc is 120V; the R-L load has R = 13 Ω and L = 15 mH; the output frequency is 50 Hz; and the sampling period is 100us. For the sake of simplicity, the conventional MPCC scheme directly evaluates 11 voltage vectors consisting of one zero voltage vector and 10 voltage vectors of the LV group with the cost function presented in (15).

Fig. 7 shows the steady-state performances of the conventional and the proposed MPCC schemes when the amplitude of the reference current is 4A. From top to the bottom, the waveforms show the phase current i_{A1} as well as the currents in the (α-β) plane and (x-y) plane for both schemes. As shown in the figure, the currents in the (α-β) plane are sinusoidal for both schemes. Meanwhile, the currents in the (x-y) plane of the proposed scheme are effectively eliminated by using virtual voltage vectors. Therefore, the phase current i_{A1} is sinusoidal with the proposed scheme. On the other hand, the phase current i_{A1} is distorted with the conventional scheme due to the large magnitudes of the x and y current components. In addition, CMV waveforms delivered by the two MPCC schemes are shown in Fig. 8. In the conventional scheme, the absolute peak value of the CMV is about 60V, which is 0.5V_{dc}. Meanwhile, the absolute peak value of the CMV is reduced to 12V in the proposed scheme. This represents an 80% reduction in the absolute peak value of the CMV. In addition, Fig. 9 shows the dynamic performance when the amplitude of the reference current is suddenly changed from 2A to 4A. It can be clearly seen that the proposed scheme has a dynamic response that is similar to that of the conventional scheme.

(a) |

(b) |

(a) |

(b) |

(a) |

(b) |

Ⅴ. EXPERIMENTAL RESULTS

In order to validate the simulation results, a prototype of a five-phase VSI is implemented in the laboratory as shown in Fig. 10. The proposed scheme is realized using a DSP 32-bit floating-point TI TMS320F28335 and a CPLD Altera EPM7128SLC81-15. The parameters used in the experiment are the same as those used in the simulation.

Fig. 10. Experimental system for a five-phase VSI.

Fig. 11 shows experimental results of the conventional and the proposed MPCC schemes at the steady-state when the amplitude of the reference current is 4A. From top to bottom, the waveforms contain phase current i_{A1}, its fast Fourier transform (FFT), and the x and y current components for both schemes. As shown in the figure, the x and y current components of the conventional scheme are substantially higher than those of the proposed scheme due to the fact that only one voltage vector is applied during the whole sampling period in the conventional scheme. As a result, the output current phase i_{A1} with the conventional scheme, which consists of high magnitude low-order harmonics (particularly third order), is seriously distorted. On the other hand, the output current phase i_{A1} is sinusoidal with the proposed scheme due to the utilization of two virtual voltage vectors in each sampling period. When compared with the conventional scheme, the total harmonic distortion (THD) of the output current with the proposed scheme is effectively reduced. In addition, the CMV waveforms generated by the conventional and the proposed MPCC schemes are shown in Fig. 12. It can be seen that the proposed scheme reduced the absolute peak value by 80% when compared to the conventional scheme. This is attributed to the fact that only the voltage vectors of the LV group are used to construct the input control set in the proposed scheme.

(a) |

(b) |

(a) |

(b) |

Fig. 13 shows experimental results for both of the MPCC schemes when the amplitude of the reference current instantly changes from 2A to 4A. It can be clearly seen that the dynamic performances of both schemes are similar. However, the proposed scheme provides lower current ripples. Furthermore, a computational cost comparison of two schemes is provided in Table III. Since the proposed scheme eliminates current predictions and the duration times of selected virtual voltage vectors are determined according to their cost function values, the computation time is significantly reduced when compared to that of the conventional scheme, as presented in Table III.

(a) |

(b) |

Parameters |
Conventional scheme |
Proposed scheme |

Number of voltage vectors |
11 |
10 |

Number of current predictions calculations |
44( 44=11*4) |
0 |

Number of voltage reference calculations |
0 |
2(2=1*2) |

Number of cost function calculations |
11 |
2 |

Computation time (us) |
31.5 |
22.4 |

Ⅵ. CONCLUSION

This paper proposed an effective MPCC scheme to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI) without using a weighting factor. Since 10 virtual voltage vectors synthesized from the voltage vectors of the LV group are employed as the input control set of the proposed scheme, the absolute peak value of the CMV with the proposed scheme is reduced by 80% when compared to that of the conventional scheme. In the proposed scheme, two of the 10 virtual voltage vectors are selected based on location information of the reference voltage vector and are used to drive five-phase VSI. In addition, their duration times are calculated according to their cost function values. Therefore, the current harmonics and computational burden are considerably reduced. The effectiveness of the proposed scheme has been verified by the simulation and experimental results. When compared to the conventional scheme, the proposed scheme shows the same dynamic performance along with reductions in the current harmonics and computation time.

ACKNOWLEDGMENT

This work was supported by the National Research Foundation of Korea Grant funded by the Korean Government (NRF-2018R1D1A1A09081779).

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Huu-Cong Vu was born in Hai Duong Province, Vietnam, in 1990. He received his B.S. degree in Control and Automation Engineering from the Hanoi University of Science and Technology, Hanoi, Vietnam, in 2013. He is presently working towards his Ph.D. degree in the School of Electrical Engineering, University of Ulsan, Ulsan, Korea. His current research interests include AC-AC converters, DC-AC inverters, pulse-width modulation and control techniques.

Hong-Hee Lee received his B.S., M.S. and Ph.D. degrees in Electrical Engineering from Seoul National University, Seoul, Korea, in 1980, 1982 and 1990, respectively. From 1994 to 1995, he was a Visiting Professor at Texas A&M University, College Station, TX, USA. Since 1985, he has been with the Department of Electrical Engineering, University of Ulsan, Ulsan, Korea, where he is presently working as a Professor in the School of Electrical Engineering. He was also the Director of the Network-based Automation Research Center (NARC), which is sponsored by the Ministry of Trade, Industry and Energy. His current research interests include power electronics, network-based motor control and renewable energy. Dr. Lee is a Member of the Institute of Electrical and Electronics Engineers (IEEE), the Korean Institute of Power Electronics (KIPE), the Korean Institute of Electrical Engineers (KIEE), and the Institute of Control, Robotics and Systems (ICROS). He was the President of KIPE in 2014.