A virtual space vector modulation strategy for suppressing common‑mode voltage in dual‑output T‑type three‑level converters

Rutian Wang; Yue Gao; Xuedong Wu; Xiuyun Wang

A virtual space vector modulation strategy for suppressing common‑mode voltage in dual‑output T‑type three‑level converters

Vol. 24, No. 8, pp. 1189-1200, Aug. 2024

10.1007/s43236-024-00800-w

Common-mode voltage suppression

Dual-output converter

Switching sequence optimization

Virtual Space Vector

Abstract

Dual-output three-level converters are widely used in multiphase motor drives, and their common-mode voltage (CMV) and neutral point (NP) balance problems can affect the safe and stable operation of systems. Owing to their unique structure, certain disabled switching states exist. Suppressing the CMV to comply with operational constraints is worthy of further investigation. In this paper, an improved time-sharing virtual space vector (ITVSV) modulation strategy is proposed. In addition, the working principle of the converter is analyzed and divided into two effective working modes. The proposed strategy defines two kinds of virtual vector synthesis methods, using virtual vectors instead of the basic small vector of large CMV to reduce the degrees of freedom of voltage fluctuation. The switching loss can be reduced by adjusting the switching sequence in some areas. Furthermore, it is demonstrated that the NP voltage is self-balancing within one primitive period. Finally, the effectiveness of the ITVSV for suppressing CMV and NP voltage balance is verified by experimental results.

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Cite this article

[IEEE Style]

R. Wang, Y. Gao, X. Wu, X. Wang, "A virtual space vector modulation strategy for suppressing common‑mode voltage in dual‑output T‑type three‑level converters," Journal of Power Electronics, vol. 24, no. 8, pp. 1189-1200, 2024. DOI: 10.1007/s43236-024-00800-w.

[ACM Style]

Rutian Wang, Yue Gao, Xuedong Wu, and Xiuyun Wang. 2024. A virtual space vector modulation strategy for suppressing common‑mode voltage in dual‑output T‑type three‑level converters. Journal of Power Electronics, 24, 8, (2024), 1189-1200. DOI: 10.1007/s43236-024-00800-w.