Low static power consumption GaN‑based CMOS‑like inverter design

Zilong Wang; Jiawei Chen; Yue Su; Xu Zhang; Lixia Zhao

Low static power consumption GaN‑based CMOS‑like inverter design

Vol. 24, No. 11, pp. 1802-1808, Nov. 2024

10.1007/s43236-024-00847-9

GaN-based CMOS-like inverter

Noise margin

Integrated circuits

Abstract

It is necessary to achieve current matching for GaN-based CMOS-like inverters. However, due to the low hole mobility of GaN p-FET devices, the weak output capacity of GaN p-FET devices makes it difficult to obtain current matching with n-FET devices in the off-state, which hinders the development of GaN-based CMOS-like inverters. In this study, a GaNbased CMOS-like device with an AlGaN back barrier layer is designed and its off-state leakage current is compared with that without an AlGaN back-barrier layer. The results show that the 2DEG confinement in the GaN-based n-FET device with an AlGaN back barrier layer can be enhanced and the leakage current is reduced from 10 –3 A to 10 –6 A in the off -state. This is accomplished without influencing the current of the GaN-based p-FET device in the off-state, resulting in a good current consistency between the n-FET device and the p-FET device in the off-state. The static power consumption is 4.5 μW for GaN-based CMOS-like inverters with an AlGaN back barrier structure when it is operated at V dd = 5 V. The rise time (t r ) and fall time (t f ) of the GaN-based CMOS-like inverters are 4 μs and 0.12 μs, respectively. The low noise margin (NM L ) is 1.90 V and the high noise margin (NM H ) is 2.55 V. This work lays a foundation for the development of the future of GaNbased integrated ICs.

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Cite this article

[IEEE Style]

Z. Wang, J. Chen, Y. Su, X. Zhang, L. Zhao, "Low static power consumption GaN‑based CMOS‑like inverter design," Journal of Power Electronics, vol. 24, no. 11, pp. 1802-1808, 2024. DOI: 10.1007/s43236-024-00847-9.

[ACM Style]

Zilong Wang, Jiawei Chen, Yue Su, Xu Zhang, and Lixia Zhao. 2024. Low static power consumption GaN‑based CMOS‑like inverter design. Journal of Power Electronics, 24, 11, (2024), 1802-1808. DOI: 10.1007/s43236-024-00847-9.