Synchronous rectification for two‑transformer active‑clamp forward‑flyback converters to remove voltage spikes on secondary‑side field‑effect transistors


Vol. 25, No. 2, pp. 216-225, Feb. 2025
10.1007/s43236-024-00924-z




 Abstract

The paper proposes a new synchronous rectification (SR) technique for two-transformer active-clamp forward-fl yback converters (ACFFs). The proposed technique overlaps the gate signals of two secondary-side field-eff ect transistors (SR FETs) to remove the voltage spikes on the SR FETs in the discontinuous conduction mode or in the low-power condition. The overlap duration is fixed regardless of operation conditions of the ACFF, and no additional voltage or current sensors are required. The performance of the proposed SR is verified by an experimental 800 V–13.5 V ACFF prototype.


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Cite this article

[IEEE Style]

S. Kim, S. Lee, J. Shin, W. Kim, "Synchronous rectification for two‑transformer active‑clamp forward‑flyback converters to remove voltage spikes on secondary‑side field‑effect transistors," Journal of Power Electronics, vol. 25, no. 2, pp. 216-225, 2025. DOI: 10.1007/s43236-024-00924-z.

[ACM Style]

Seokwon Kim, Sujeong Lee, Jong-Won Shin, and Wonhee Kim. 2025. Synchronous rectification for two‑transformer active‑clamp forward‑flyback converters to remove voltage spikes on secondary‑side field‑effect transistors. Journal of Power Electronics, 25, 2, (2025), 216-225. DOI: 10.1007/s43236-024-00924-z.