Line‑commutated converter topology to mitigate commutation failures
Vol. 25, No. 9, pp. 1641-1652, Sep. 2025
10.1007/s43236-025-01011-7
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High-voltage direct current Resistor capacitor sub-module Line-commutated converter Commutation failure
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Cite this article
[IEEE Style]
H. Shu and Y. Jiang, "Line‑commutated converter topology to mitigate commutation failures," Journal of Power Electronics, vol. 25, no. 9, pp. 1641-1652, 2025. DOI: 10.1007/s43236-025-01011-7.
[ACM Style]
Hongchun Shu and Yaoxi Jiang. 2025. Line‑commutated converter topology to mitigate commutation failures. Journal of Power Electronics, 25, 9, (2025), 1641-1652. DOI: 10.1007/s43236-025-01011-7.






