Thermal‑control method for two‑level inverters based on modulation with adjusted discontinuous region

Kyoung-Gu Lee; Mun-Gyeom Park; Hye-Won Choi; Kyo-Beum Lee

Thermal‑control method for two‑level inverters based on modulation with adjusted discontinuous region

Vol. 25, No. 9, pp. 1653-1662, Sep. 2025

10.1007/s43236-025-01128-9

Abstract

This study proposes a thermal-control method for two-level inverters based on modulation by adjusting the discontinuous regions. Improvements in the reliability and efficiency of inverter systems have a high potential to decrease the cost of various applications. Appropriate thermal management is important for the reliability and efficiency of the entire inverter system. Conventional approaches for achieving thermal control include active gate drivers, additional controllers, and modified modulation schemes. Thermal-control methods that use an active gate driver or controllers increase the burden on systems due to additional hardware and software. However, modified modulation schemes reduce the thermal properties of power devices by generating reference signals for the modulator without complicated designs. This study analyzes the power losses of SiC modules based on the modulation schemes. The switching losses of DPWM at the clamping regions and angles are analyzed to reduce the thermal properties of the SiC module. In addition, the thermal properties of the SiC module are controlled by appropriately modifying the clamping regions for DPWM. The proposed thermal-control method is verified through simulations and experiments.

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Cite this article

[IEEE Style]

K. Lee, M. Park, H. Choi, K. Lee, "Thermal‑control method for two‑level inverters based on modulation with adjusted discontinuous region," Journal of Power Electronics, vol. 25, no. 9, pp. 1653-1662, 2025. DOI: 10.1007/s43236-025-01128-9.

[ACM Style]

Kyoung-Gu Lee, Mun-Gyeom Park, Hye-Won Choi, and Kyo-Beum Lee. 2025. Thermal‑control method for two‑level inverters based on modulation with adjusted discontinuous region. Journal of Power Electronics, 25, 9, (2025), 1653-1662. DOI: 10.1007/s43236-025-01128-9.