Analyzing and Designing a Current Controller for Circulating Current Reduction in Parallel Three-Phase Voltage-Source Inverters

Kiryong Kim; Dongsul Shin; Hee-Je Kim; Jong-Pil Lee

Analyzing and Designing a Current Controller for Circulating Current Reduction in Parallel Three-Phase Voltage-Source Inverters

Vol. 18, No. 2, pp. 502-510, Mar. 2018

10.6113/JPE.2018.18.2.502

Circulating current

Parallel operation

Voltage source inverter (VSI)

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Abstract

A circulating current is a major problem caused by directly connecting voltage-source inverters (VSIs) in parallel. This circulating current occurs as a zero-sequence current between the inverters by speciﬁc switch states. Several studies have presented alternatives using hardware and software methods. When coupled inductors (CIs) are employed for the high-frequency circulating current, a controller is required to prevent the low-frequency circulating current from saturating the CIs. In this study, the zero-sequence circulating current and its alternatives are investigated using hardware and mathematical description. A high-performance circulating current controller is proposed by applying a repetitive controller to the zero-sequence current control loop. The proposed controller can effectively minimize the low-frequency circulating current without any data sharing between the inverters in unfavorable conditions. It can also be applicable to the modular conﬁguration of parallel three-phase VSIs. Experimental results verify the performance of the proposed controller.

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Cite this article

[IEEE Style]

K. Kim, D. Shin, H. Kim, J. Lee, "Analyzing and Designing a Current Controller for Circulating Current Reduction in Parallel Three-Phase Voltage-Source Inverters," Journal of Power Electronics, vol. 18, no. 2, pp. 502-510, 2018. DOI: 10.6113/JPE.2018.18.2.502.

[ACM Style]

Kiryong Kim, Dongsul Shin, Hee-Je Kim, and Jong-Pil Lee. 2018. Analyzing and Designing a Current Controller for Circulating Current Reduction in Parallel Three-Phase Voltage-Source Inverters. Journal of Power Electronics, 18, 2, (2018), 502-510. DOI: 10.6113/JPE.2018.18.2.502.