New Generalized PWM Schemes for Multilevel Inverters Providing Zero Common-Mode Voltage and Low Current Distortion

Nho-Van Nguyen; Tam-Khanh Tu Nguyen

New Generalized PWM Schemes for Multilevel Inverters Providing Zero Common-Mode Voltage and Low Current Distortion

Nho-Van Nguyen

Tam-Khanh Tu Nguyen

Vol. 19, No. 4, pp. 907-921, Jul. 2019

10.6113/JPE.2019.19.4.907

Pulse width modulation (PWM)

PWM inverters

PWM sequences

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Abstract

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

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Cite this article

[IEEE Style]

N. Nguyen and T. T. Nguyen, "New Generalized PWM Schemes for Multilevel Inverters Providing Zero Common-Mode Voltage and Low Current Distortion," Journal of Power Electronics, vol. 19, no. 4, pp. 907-921, 2019. DOI: 10.6113/JPE.2019.19.4.907.

[ACM Style]

Nho-Van Nguyen and Tam-Khanh Tu Nguyen. 2019. New Generalized PWM Schemes for Multilevel Inverters Providing Zero Common-Mode Voltage and Low Current Distortion. Journal of Power Electronics, 19, 4, (2019), 907-921. DOI: 10.6113/JPE.2019.19.4.907.