Real-time test-bed system development using power hardware-in-the-loop (PHIL) simulation technique for reliability test of DC nano grid
Vol. 20, No. 3, pp. 784-793, May 2020
10.1007/s43236-020-00075-x
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Power hardware-in-the-loop (PHIL) simulation DC nano grid DC bus signaling (DBS) Grid power failure DC/DC converter AC/DC converter
Abstract
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Cite this article
[IEEE Style]
K. Heo, H. Choi, J. Jung, "Real-time test-bed system development using power hardware-in-the-loop (PHIL) simulation technique for reliability test of DC nano grid," Journal of Power Electronics, vol. 20, no. 3, pp. 784-793, 2020. DOI: 10.1007/s43236-020-00075-x.
[ACM Style]
Kyung-Wook Heo, Hyun-Jun Choi, and Jee-Hoon Jung. 2020. Real-time test-bed system development using power hardware-in-the-loop (PHIL) simulation technique for reliability test of DC nano grid. Journal of Power Electronics, 20, 3, (2020), 784-793. DOI: 10.1007/s43236-020-00075-x.