Correction method for calculating junction temperature considering parasitic effects in SiC MOSFETs
Vol. 23, No. 4, pp. 688-699, Apr. 2023
10.1007/s43236-022-00562-3
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Cite this article
[IEEE Style]
F. Liu, M. Du, J. Yin, C. Dong, Z. Ouyang, "Correction method for calculating junction temperature considering parasitic effects in SiC MOSFETs," Journal of Power Electronics, vol. 23, no. 4, pp. 688-699, 2023. DOI: 10.1007/s43236-022-00562-3.
[ACM Style]
Fan Liu, Mingxing Du, Jinliang Yin, Chao Dong, and Ziwei Ouyang. 2023. Correction method for calculating junction temperature considering parasitic effects in SiC MOSFETs. Journal of Power Electronics, 23, 4, (2023), 688-699. DOI: 10.1007/s43236-022-00562-3.