High-breakdown-voltage GaN-based vertical FinFET design

Zilong Wang; Liang Liu; Peiyue Qi; Jiawei Chen; Lixia Zhao

High-breakdown-voltage GaN-based vertical FinFET design

Vol. 24, No. 3, pp. 448-455, Mar. 2024

10.1007/s43236-023-00735-8

GaN-based vertical FinFET

Breakdown voltage

Specifi c on-state resistance

Baliga optimum FOM

Abstract

In this study, GaN-based vertical FinFET device using HfO 2 as a high-κ dielectric gate layer to improve the breakdown voltage is designed. Simulation results show that a breakdown voltage as high as 2139 V can be achieved for the optimized GaN-based FinFET with a fin channel width of 200 nm, a channel doping concentration of 1 × 10 16 cm −3 , and a drift layer thickness of 10 μm. In addition, the proposed device has a low specific on-state resistance of 0.84 mΩ cm 2 , resulting in a large Baliga optimum figure of merit (FOM) 5.45 GW cm −2 . This work could lay a foundation to further improve the electrical performance of GaN-based vertical FinFET devices.

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Cite this article

[IEEE Style]

Z. Wang, L. Liu, P. Qi, J. Chen, L. Zhao, "High-breakdown-voltage GaN-based vertical FinFET design," Journal of Power Electronics, vol. 24, no. 3, pp. 448-455, 2024. DOI: 10.1007/s43236-023-00735-8.

[ACM Style]

Zilong Wang, Liang Liu, Peiyue Qi, Jiawei Chen, and Lixia Zhao. 2024. High-breakdown-voltage GaN-based vertical FinFET design. Journal of Power Electronics, 24, 3, (2024), 448-455. DOI: 10.1007/s43236-023-00735-8.