Hardware implementation of reliable designs for full SiC inverter‑fed motor drive systems

This paper presents a hardware implementation for the reliable design of a full silicon carbide (SiC) inverter-fed motor drive system. SiC MOSFETs have been widely used in various applications due to their low switching losses, high voltage capabilities, and high-temperature operation capability. However, SiC MOSFETs are vulnerable to the overvoltage and overcurrent caused by the high switching frequencies and faults of parasitic inductance. The high speed of switching transitions causes high dv/dt, which leads to insulation failures of motor windings. In addition, the high di/dt, according to the parasitic inductance, can destroy the switching devices under short-circuit faults. A gate driver with desaturation protection is required to prevent short-circuit faults, and a passive filter should be installed to reduce the dv/dt to within prescribed values. This paper presents an optimized design process for a full SiC inverter-fed motor drive system with improved reliability. The effectiveness and validity of the process are verified through experimental results under various conditions.

Statistics

Show / Hide Statistics

Cumulative Counts from September 30th, 2019
Multiple requests among the same browser session are counted as one view. If you mouse over a chart, the values of data points will be shown.

Cite this article

[IEEE Style]

Y. Bae, H. Choi, Y. Kang, C. Park, K. Lee, "Hardware implementation of reliable designs for full SiC inverter‑fed motor drive systems," Journal of Power Electronics, vol. 24, no. 5, pp. 767-777, 2024. DOI: 10.1007/s43236-024-00794-5.

[ACM Style]

Yun-Jae Bae, Hye-Won Choi, Yong-Jin Kang, Cheol-Hyun Park, and Kyo-Beum Lee. 2024. Hardware implementation of reliable designs for full SiC inverter‑fed motor drive systems. Journal of Power Electronics, 24, 5, (2024), 767-777. DOI: 10.1007/s43236-024-00794-5.