Analyzing and mitigating parasitic capacitances in planar transformers for high‑frequency operation
Vol. 24, No. 6, pp. 946-954, Jun. 2024
10.1007/s43236-024-00804-6
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Multi-layer PCB Planar transformer High frequency Parasitic capacitance Resonance Impedance analysis
Abstract
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Cite this article
[IEEE Style]
S. Lee, S. Kim, J. Shin, W. Kim, "Analyzing and mitigating parasitic capacitances in planar transformers for high‑frequency operation," Journal of Power Electronics, vol. 24, no. 6, pp. 946-954, 2024. DOI: 10.1007/s43236-024-00804-6.
[ACM Style]
Sujeong Lee, Seokwon Kim, Jongwon Shin, and Wonhee Kim. 2024. Analyzing and mitigating parasitic capacitances in planar transformers for high‑frequency operation. Journal of Power Electronics, 24, 6, (2024), 946-954. DOI: 10.1007/s43236-024-00804-6.