Analysis of Synchronous Rectification Discontinuous PWM for SiC MOSFET Three Phase Inverters

Wide band gap semiconductor devices such as SiC MOSFETs are becoming the preferred devices for high frequency and high power density converters due to their excellent performances. However, the proportion of the switching loss that accounts for the whole inverter loss is growing along with an increase of the switching frequency. In view of the third quadrant working characteristics of a SiC MOSFET, synchronous rectification discontinuous pulse-width modulation is proposed (SRDPWM) to further reduce system losses. The SRDPWM has been analyzed in detail. Based on a frequency domain mathematical model, a quantitative mathematical analysis of the harmonic characteristic is conducted by double Fourier transform. Meanwhile, a switching loss model and a conduction loss model of inverter for SRDPWM have been built. Simulation and experimental results verify the result of the harmonic analysis of the double Fourier analysis and the accuracy of the loss models. The efficiencies of the SRDPWM and the SVPWM are compared. The result indicates that the SRDPWM has fewer losses and a higher efficiency than the SVPWM under high switching frequency and light load conditions as a result of the reduced number of switching transitions. In addition, the SRDPWM is more suitable for SiC MOSFET converters.

Statistics

Show / Hide Statistics

Cumulative Counts from September 30th, 2019
Multiple requests among the same browser session are counted as one view. If you mouse over a chart, the values of data points will be shown.

Cite this article

[IEEE Style]

P. Dai, C. Shi, L. Zhang, J. Zhang, "Analysis of Synchronous Rectification Discontinuous PWM for SiC MOSFET Three Phase Inverters," Journal of Power Electronics, vol. 18, no. 5, pp. 1336-1346, 2018. DOI: 10.6113/JPE.2018.18.5.1336.

[ACM Style]

Peng Dai, Congcong Shi, Lei Zhang, and Jiahang Zhang. 2018. Analysis of Synchronous Rectification Discontinuous PWM for SiC MOSFET Three Phase Inverters. Journal of Power Electronics, 18, 5, (2018), 1336-1346. DOI: 10.6113/JPE.2018.18.5.1336.