Analysis of Phase Error Effects Due to Grid Frequency Variation of SRF-PLL Based on APF


Vol. 16, No. 1, pp. 18-26, Jan. 2016
10.6113/JPE.2016.16.1.18


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 Abstract

This paper proposes a compensation algorithm for reducing a specific ripple component on synchronous reference frame phase locked loop (SRF-PLL) in grid-tied single-phase inverters. In general, SRF-PLL, which is based on all-pass filter to generate virtual voltage, is widely used to estimate the grid phase angle in a single-phase system. In reality, the estimated grid phase angle might be distorted because the phase difference between actual and virtual voltages is not 90 degrees. That is, the phase error is caused by the difference between cut-off frequency of all-pass filter and grid frequency under grid frequency variation. Therefore, the effects on phase angle and output current attributed to the phase error are mathematically analyzed in this paper. In addition, the proportional resonant (PR) controller is adapted to reduce the effects of phase error. The validity of the proposed algorithm is verified through several simulations and experiments.


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Cite this article

[IEEE Style]

U. Seong and S. Hwang, "Analysis of Phase Error Effects Due to Grid Frequency Variation of SRF-PLL Based on APF," Journal of Power Electronics, vol. 16, no. 1, pp. 18-26, 2016. DOI: 10.6113/JPE.2016.16.1.18.

[ACM Style]

Ui-Seok Seong and Seon-Hwan Hwang. 2016. Analysis of Phase Error Effects Due to Grid Frequency Variation of SRF-PLL Based on APF. Journal of Power Electronics, 16, 1, (2016), 18-26. DOI: 10.6113/JPE.2016.16.1.18.