An Accurate Modeling Approach to Compute Noise Transfer Gain in Complex Low Power Plane Geometries of Power Converters

Tung Ngoc Nguyen; Handy Fortin Blanchette; Ruxi Wang

An Accurate Modeling Approach to Compute Noise Transfer Gain in Complex Low Power Plane Geometries of Power Converters

Tung Ngoc Nguyen

Handy Fortin Blanchette

Ruxi Wang

Vol. 17, No. 2, pp. 411-421, Mar. 2017

10.6113/JPE.2019.17.2.411

Electromagnetic interference

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Abstract

An approach based on a 2D lumped model is presented to quantify the voltage transfer gain (VTG) in power converter low power planes. The advantage of the modeling approach is the ease with which typical noise reduction devices such as decoupling capacitors or ferrite beads can be integrated into the model. This feature is enforced by a new modular approach based on effective matrix partitioning, which is presented in the paper. This partitioning is used to decouple power plane equations from external device impedance, which avoids the need for rewriting of a whole set of equation at every change. The model is quickly solved in the frequency domain, which is well suited for an automated layout optimization algorithm. Using frequency domain modeling also allows the integration of frequency-dependent devices such inductors and capacitors, which are required for realistic computation results. In order to check the precision of the modeling approach, VTGs for several layout configurations are computed and compared with experimental measurements based on scattering parameters.

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Cite this article

[IEEE Style]

T. N. Nguyen, H. F. Blanchette, R. Wang, "An Accurate Modeling Approach to Compute Noise Transfer Gain in Complex Low Power Plane Geometries of Power Converters," Journal of Power Electronics, vol. 17, no. 2, pp. 411-421, 2017. DOI: 10.6113/JPE.2019.17.2.411.

[ACM Style]

Tung Ngoc Nguyen, Handy Fortin Blanchette, and Ruxi Wang. 2017. An Accurate Modeling Approach to Compute Noise Transfer Gain in Complex Low Power Plane Geometries of Power Converters. Journal of Power Electronics, 17, 2, (2017), 411-421. DOI: 10.6113/JPE.2019.17.2.411.